iio: accel: fix ADXL355 startup race condition

There is an race-condition where device is not full working after SW reset.
Therefore it's necessary to wait some time after reset and verify shadow
registers values by reading and comparing the values before/after reset.
This mechanism is described in datasheet at least from revision D.

Fixes: 12ed27863e ("iio: accel: Add driver support for ADXL355")
Signed-off-by: Valek Andrej <andrej.v@skyrain.eu>
Signed-off-by: Kessler Markus <markus.kessler@hilti.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Valek Andrej
2025-10-14 09:13:44 +02:00
committed by Jonathan Cameron
parent e2cc390a66
commit c92c1bc408

View File

@@ -56,6 +56,8 @@
#define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
#define ADXL355_SELF_TEST_REG 0x2E
#define ADXL355_RESET_REG 0x2F
#define ADXL355_BASE_ADDR_SHADOW_REG 0x50
#define ADXL355_SHADOW_REG_COUNT 5
#define ADXL355_DEVID_AD_VAL 0xAD
#define ADXL355_DEVID_MST_VAL 0x1D
@@ -294,7 +296,12 @@ static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
static int adxl355_setup(struct adxl355_data *data)
{
unsigned int regval;
int retries = 5; /* the number is chosen based on empirical reasons */
int ret;
u8 *shadow_regs __free(kfree) = kzalloc(ADXL355_SHADOW_REG_COUNT, GFP_KERNEL);
if (!shadow_regs)
return -ENOMEM;
ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, &regval);
if (ret)
@@ -321,14 +328,41 @@ static int adxl355_setup(struct adxl355_data *data)
if (regval != ADXL355_PARTID_VAL)
dev_warn(data->dev, "Invalid DEV ID 0x%02x\n", regval);
/*
* Perform a software reset to make sure the device is in a consistent
* state after start-up.
*/
ret = regmap_write(data->regmap, ADXL355_RESET_REG, ADXL355_RESET_CODE);
/* Read shadow registers to be compared after reset */
ret = regmap_bulk_read(data->regmap,
ADXL355_BASE_ADDR_SHADOW_REG,
shadow_regs, ADXL355_SHADOW_REG_COUNT);
if (ret)
return ret;
do {
if (--retries == 0) {
dev_err(data->dev, "Shadow registers mismatch\n");
return -EIO;
}
/*
* Perform a software reset to make sure the device is in a consistent
* state after start-up.
*/
ret = regmap_write(data->regmap, ADXL355_RESET_REG,
ADXL355_RESET_CODE);
if (ret)
return ret;
/* Wait at least 5ms after software reset */
usleep_range(5000, 10000);
/* Read shadow registers for comparison */
ret = regmap_bulk_read(data->regmap,
ADXL355_BASE_ADDR_SHADOW_REG,
data->buffer.buf,
ADXL355_SHADOW_REG_COUNT);
if (ret)
return ret;
} while (memcmp(shadow_regs, data->buffer.buf,
ADXL355_SHADOW_REG_COUNT));
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_DRDY_MSK,
FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));