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arm64: dts: qcom: sm8350: Fix the PCI I/O port range
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses
(0x60200000, 0x40200000) specified in the ranges property for I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 6daee40678 ("arm64: dts: qcom: sm8350: add PCIe devices")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-14-manivannan.sadhasivam@linaro.org
This commit is contained in:
committed by
Bjorn Andersson
parent
f57903c8f4
commit
cf4e716e9a
@@ -1495,8 +1495,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
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<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
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<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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@@ -1589,8 +1589,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>,
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<0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
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<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
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interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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