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dtoverlays: adjust inbound windows for MIP1 on Pi 5 with 32-bit PCIe DMA

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Upstream bcm2712 support added/split out the inbound window for MIP1 into
a separate range. For the pcie-32bit-dma overlay to work, both the MIP
and RC ranges need to agree.

Shift the MIP window to the top 4K page below 4GB.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This commit is contained in:
Jonathan Bell
2025-09-15 16:43:42 +01:00
committed by Dom Cobley
parent b84db82fd2
commit e688e39b67
1 changed files with 14 additions and 1 deletions
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15
arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts
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@@ -19,8 +19,21 @@
#address-cells = <3>;
#size-cells = <2>;
dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
0x0 0x80000000>;
0x0 0x80000000>,
<0x02000000 0x00 0xfffff000 0x10 0x00131000
0x00 0x00001000>;
};
};
fragment@1 {
target = <&mip1>;
__overlay__ {
/*
* The MIP driver uses the reg property to derive the target
* address for MSI writes - place this below 4GB.
*/
reg = <0x10 0x00131000 0x00 0xc0>,
<0x00 0xfffff000 0x00 0x1000>;
};
};
};