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arm64: dts: qcom: sdm845: Fix the PCI I/O port range
[ Upstream commit67aa109eee] For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes:42ad231338("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller") Fixes:5c538e09cb("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY") Reported-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-2-manivannan.sadhasivam@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
71b6a329ac
commit
ed39fbfb7d
@@ -2226,8 +2226,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
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<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
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<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@@ -2331,7 +2331,7 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
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ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
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<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
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interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
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