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mmc: sdhci-brcmstb: add hs400_downgrade callback for bcm2712

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The attached PHY performs parameter validation, so the switch from HS200
to HS (before selecting HS400/HS400es) with a 200MHz clock fails to
update pad timings and results in CRC errors from the card.

Underclocking the interface is safe, so do that in the downgrade callback.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This commit is contained in:
Jonathan Bell
2024-06-04 09:51:17 +01:00
committed by Dom Cobley
parent 23b9d45f9d
commit eedb8bb3bd
1 changed files with 16 additions and 0 deletions
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16
drivers/mmc/host/sdhci-brcmstb.c
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@@ -243,6 +243,20 @@ static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host,
sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
}
static void sdhci_bcm2712_hs400_downgrade(struct mmc_host *mmc)
{
struct sdhci_host *host = mmc_priv(mmc);
/*
* The eMMC PHY and its internal controller parses and validates
* the uhs_mode, divisor, pin_sel, and sampling clock select
* output from the SD controller. It will refuse to update its
* config if HS timings are selected while the clock is >52MHz.
* so bump the clock down now before card/controller setup is
* performed.
*/
sdhci_bcm2712_set_clock(host, 52000000);
}
static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -262,6 +276,8 @@ static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
reg &= ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE;
reg |= SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE;
writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
host->mmc_host_ops.hs400_downgrade = sdhci_bcm2712_hs400_downgrade;
}
if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||