Documentation for APM X-Gene standby GPIO controller DTS binding.
Signed-off-by: Y Vo <yvo@apm.com>
[Some spelling and various fixes]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
this company already provided some products, so it make sense to add
them to vendor-prefixes.txt list
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The module 0 style clocks, or storage module clocks as named in the
official SDK, are almost the same as the module 0 clocks on earlier
Allwinner SoCs. The only difference is wider mux register bits.
As with earlier Allwinner SoCs, mmc module clocks are a special case
of mod0 clocks, with phase controls for 2 child clocks, output and
sample.
This patch adds support for both.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The network coprocessor (NetCP) is a hardware accelerator that processes
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
switch sub-module to send and receive packets. NetCP also includes a packet
accelerator (PA) module to perform packet classification operations such as
header matching, and packet modification operations such as checksum
generation. NetCP can also optionally include a Security Accelerator(SA)
capable of performing IPSec operations on ingress/egress packets.
Keystone SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which
includes a 3-port Ethernet switch sub-module capable of 10Gb/s and
1Gb/s rates per Ethernet port.
NetCP Subsystem device tree layout looks something like below:
-----------------------------
NetCP subsystem(10G or 1G)
-----------------------------
|
|-> NetCP Devices -> |
| |-> GBE/XGBE Switch
| |
| |-> Packet Accelerator
| |
| |-> Security Accelerator
|
|
|
|-> NetCP Interfaces -> |
|-> Ethernet Port 0
|
|-> Ethernet Port 1
|
|-> Ethernet Port 2
|
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: David Miller <davem@davemloft.net>
Cc: Santosh Shilimkar <santosh.shilimkar@kernel.org>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Merge "at91: dt for 3.20 #1" from Nicolas Ferre:
First batch of DT changes for 3.20:
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: dts: sama5d3: add ov2640 camera sensor support
ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK
ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}
ARM: at91: dts: sama5d3: move the isi mck pin to mb
ARM: at91: dts: sama5d3: add missing pins of isi
ARM: at91: dts: sama5d3: split isi pinctrl
ARM: at91: dts: sama5d3: add isi clock
ARM: at91/dt: ethernut5: use at91sam9xe.dtsi
ARM: at91/dt: Add a dtsi for at91sam9xe
ARM: at91/dt: add SRAM nodes
ARM: at91/dt: at91rm9200ek: enable RTC
ARM: at91/dt: rm9200: add RTC node
ARM: at91/dt: at91sam9n12: Add RTC node
ARM: at91: sama5d4: Add SFR
ARM: at91: sama5d3: Add SFR
ARM: at91: Add Special Function Registers binding documentation
ARM: at91/dt: sam9263: Fix typo: ac91_clk -> ac97_clk
ARM: at91/dt: sama5d3: enable D2 as the heartbeat LED
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "CSR atlas7 init dts for 3.20" from Barry Song:
Drop Marco and add init dts stuff for Atlas7
CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.
So we drop Marco dts stuff, and add dts stuff for Atlas7.
* tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: add init dts file for CSR atlas7 SoC
ARM: dts: drop MARCO platform DT stuff
Signed-off-by: Olof Johansson <olof@lixom.net>
Current sx150x gpio expander driver doesn't support
DTS. Now we added dts support for this driver.
Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Audio IPs on Exynos7 require gpios available in AUDIO
pin controller block. So adding the AUDIO pinctrl support.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This binding describes how to add child nodes to the
devicetree to supply this information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[hdegoede@redhat.com: Documented the need for #address- and #size-cells]
[hdegoede@redhat.com: Added a real world example]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The touchscreen controller has a temperature sensor embedded in the SoC,
which already has hwmon support in the driver.
Add DT thermal zone support so we can use it with cpufreq for thermal
throttling.
This also adds a comment stating that we do not know the actual formula
for calculating the temperature.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The driver allows using CDCE706 in its default configuration recorded in
EEPROM and adjusting of synthesized clocks by consumers.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm.
However several other properties needs to be documented such as lpcpd.
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Certain PHY settings need to be configurable by UEFI depending on the
platform being used. Add new device tree / ACPI properties that, if
present, will override the pre-determined values currently used.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The auto negotiation logic was geared to being the initiator of the
auto negotiation. This presented problems when auto negotiation was
initiated by the remote end. Change the auto negotiation logic to
make use of the auto negotiation event interrupt thus allowing the
auto negotiation state machine to function properly in either scenario.
This also removes the polling during auto-negotiation.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
settings configured in registers leading to crashes if L2C is enabled
without overriding them. This patch introduces bindings to enable
prefetch settings to be specified from DT and necessary support in the
driver.
[mszyprow: rebased onto v3.18-rc1, added error message when prefetch related
dt property has been provided without any value]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Merge "Samsung exynos7 updates for v3.20" from Kukjin Kim:
- to support ARMv8 based exynos7 SoC
: add initial device tree for pinctrl, PMU, mmc, i2c, rtc,
watchdog, and adc nodes for exynos7 SoC and exynos7 based
espresso board.
* tag 'samsung-dt-64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
arm64: Enable ARMv8 based exynos7 SoC support
arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7
arm64: dts: Add PMU DT node for exynos7 SoC
arm64: dts: Add initial pinctrl support to exynos7
arm64: dts: Add initial device tree support for exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The special function registers gather some registers that allow to tweak
features provided by IPs controlled through another register range.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: reg size: 0x60]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).
Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be accessed by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Call clk_prepare_enable() and clk_disable_unprepare() for cpu dai
clock and codec dai clock in dai statup and shutdown callbacks. This
to make sure the related clock are enabled when the audio device is
used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Merge "mvebu: dt for v3.20" from Andrew Lunn:
mvebu dt changes for v3.20 (part #1)
- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200
* tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add Armada 388 General Purpose Development Board support
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: a38x: Fix node names
Kirkwood: add support for Seagate BlackArmor NAS220
ARM: dts: kirkwood: enable phy driver for SATA controller on 88f6192
ARM: dts: add gpio_poweroff support for Iomega ix2-200
ARM: dts: use all remaining MTD space foor rootfs of Iomega ix2-200
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add DT bindings for Renesas R-Mobile and SH-Mobile memory controllers.
Currently memory controller device nodes are used only to reference PM
domains, and prevent these PM domains from being powered down, which
would crash the system.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Addition of a LED Flash class extension entails the need for flash LED
specific device tree properties. The properties being added are:
max-microamp, flash-max-microamp, flash-timeout-microsec.
(cooloney@gmail.com: remove white spaces)
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.
The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.
Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the
prcm pins are identical between the A31 and the A31s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
