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Author SHA1 Message Date
Shawn Guo
a27a2590f7 arm64: dts: qcom: sm8250: fix number of pins in 'gpio-ranges' 
[ Upstream commit e526cb03e2 ]

The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: 16951b490b ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node")
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-4-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
 2021-05-14 09:50:10 +02:00
Sai Prakash Ranjan
3673e0fa13 arm64: dts: qcom: sm8250: Fix timer interrupt to specify EL2 physical timer 
[ Upstream commit 29a3349543 ]

ARM architected timer interrupts DT property specifies EL2/HYP
physical interrupt and not EL2/HYP virtual interrupt for the 4th
interrupt property. As per interrupt documentation for SM8250 SoC,
the EL2/HYP physical timer interrupt is 10 and EL2/HYP virtual timer
interrupt is 12, so fix the 4th timer interrupt to be EL2 physical
timer interrupt (10 in this case).

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/744e58f725d279eb2b049a7da42b0f09189f4054.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
 2021-05-14 09:50:10 +02:00
Sai Prakash Ranjan
5faf320a2b arm64: dts: qcom: sm8250: Fix level triggered PMU interrupt polarity 
[ Upstream commit 93138ef5ac ]

As per interrupt documentation for SM8250 SoC, the polarity
for level triggered PMU interrupt is low, fix this.

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/96680a1c6488955c9eef7973c28026462b2a4ec0.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
 2021-05-14 09:50:10 +02:00
Amit Kucheria
bac12f2569 arm64: dts: qcom: sm8250: Add thermal zones and throttling support 
sm8250 has 24 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle on
crossing passive temperature thresholds.

Signed-off-by: Amit Kucheria <amitk@kernel.org>
Link: https://lore.kernel.org/r/89b83b3caa4e32db08fe402cfa510feb25232aa0.1599732068.git.amitk@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-24 03:06:48 +00:00
Bjorn Andersson
02ae4a0ed1 arm64: dts: qcom: sm8250: Add cpufreq hw node 
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8250 SoCs.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Amit Kucheria <amitk@kernel.org>
Link: https://lore.kernel.org/r/20200915072423.18437-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-17 03:57:12 +00:00
Sibi Sankar
79a595bb92 arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider 
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SM8250
SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 23:44:34 +00:00
Jonathan Marek
e7e41a207a arm64: dts: qcom: sm8250: add interconnect nodes 
Add the interconnect dts nodes for sm8250.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200728023811.5607-8-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 23:43:58 +00:00
Dmitry Baryshkov
01e869cc0d arm64: dts: sm8250: Add OPP table for all qup devices 
qup has a requirement to vote on the performance state of the CX domain
in sm8250 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200915120203.290295-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 15:08:02 +00:00
Dmitry Baryshkov
08a9ae2d25 arch64: dts: qcom: sm8250: add uart nodes 
Currently sm8250.dtsi only defines default debug uart. Port rest uart
nodes from the downstream dtsi file.

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200909103238.149761-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 04:45:39 +00:00
Jonathan Marek
9ff8b0591f arm64: dts: qcom: sm8250: use the right clock-freqency for sleep-clk 
Downstream has this clock as 32000 rate, but testing shows it is close to
32768.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200903215923.14314-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-13 23:54:50 +00:00
Dmitry Baryshkov
76bd127e6c arm64: dts: qcom: sm8250: add bi_tcxo_ao to gcc clocks 
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200913225135.30366-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-13 23:49:30 +00:00
Manivannan Sadhasivam
bb1dfb4da1 arm64: dts: qcom: sm8250: Rename UART2 node to UART12 
The UART12 node has been mistakenly mentioned as UART2. Let's fix that
for both SM8250 SoC and MTP board and also add pinctrl definition for
it.

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200904063637.28632-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-10 16:40:08 +00:00
Jonathan Marek
0e6aa9db44 arm64: dts: qcom: use sm8250 gpucc dt-bindings 
Constants were used to allow merging separately from the dt-bindings,
switch to symbolic names now that dt-bindings have landed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200818160445.14008-3-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-08-30 17:24:12 +00:00
Jonathan Marek
04a3605b18 arm64: dts: qcom: add sm8250 GPU nodes 
This brings up the GPU. Tested on HDK865 by running vulkan CTS.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200709135251.643-15-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-07-27 23:27:03 -07:00
Bjorn Andersson
dff0f49cda arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon 
Now that we don't need the intermediate syscon to represent the TCSR
mutexes, update the dts to describe the TCSR mutex directly under /soc.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200622075956.171058-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-07-15 21:05:06 -07:00
Bjorn Andersson
23a8903785 arm64: dts: qcom: sm8250: Add remoteprocs 
Add remoteproc nodes for the audio, compute and sensor cores, define
glink for each one and enable them on the MTP with appropriate firmware
defined.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200622222747.717306-6-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-23 12:58:21 -07:00
Bjorn Andersson
8770a2a84e arm64: dts: qcom: sm8250: Add SMP2P nodes 
SMP2P is used for interrupting and being interrupted about remoteproc
state changes related to the audio, compute and sensor subsystems.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200622222747.717306-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-23 12:58:03 -07:00
Bjorn Andersson
087d537aec arm64: dts: qcom: sm8250: Add QMP AOSS node 
Add a node for the QMP AOSS.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200622222747.717306-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-23 12:57:49 -07:00
Bjorn Andersson
e5361e7554 arm64: dts: qcom: sm8250: Add IPCC 
Add the IPCC node, used to send and receive IPC signals with
remoteprocs.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200622222747.717306-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-23 12:57:35 -07:00
Dmitry Baryshkov
e5813b1576 arm64: dts: qcom: sm8250: add I2C and SPI nodes 
Much like SDM845 each serial engine has 4 pins attached. Add all
possible I2C and SPI nodes for all 20 serial engines.

Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200606131300.3874987-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-21 12:38:03 -07:00
Bjorn Andersson
16951b490b arm64: dts: qcom: sm8250: Add TLMM pinctrl node 
Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-21 12:36:35 -07:00
Dmitry Baryshkov
e0d9accee2 arm64: dts: qcom: sm8250: add watchdog device 
Add on-SoC watchdog device node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200604004331.669936-7-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-20 23:47:04 -07:00
Jonathan Marek
6b9afd8f96 arm64: dts: qcom: sm8250: change ufs node name to ufshc 
The ufs-qcom driver checks that the name matches the androidboot.bootdevice
parameter provided by the bootloader, which uses the name ufshc. Without
this change UFS fails to probe.

I think this is broken behavior from the ufs-qcom driver, but using the
name ufshc is consistent with dts for sdm845/sm8150/etc.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200523175232.13721-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-20 23:08:29 -07:00
Jonathan Marek
b9ec8cbcc2 arm64: dts: qcom: sm8250: sort nodes by physical address 
Other dts have nodes sorted by physical address, be consistent with that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200523132223.31108-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-20 23:08:27 -07:00
Jonathan Marek
bccc7dd233 arm64: dts: qcom: sm8250: rename spmi node to spmi_bus 
The pm8150 dtsi files refer to it as spmi_bus, so change it.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200523132104.31046-1-jonathan@marek.ca
[bjorn: Dropped qcom, from node name while we're poking at it]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-20 23:08:26 -07:00
Jonathan Marek
fe3dfc25c1 arm64: dts: qcom: sm8250: use dt-bindings defines for clocks 
Use the dt-bindings defines for qupv3_id_1 node's clocks.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200523131213.18653-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-20 23:08:24 -07:00
Bjorn Andersson
240031967a arm64: dts: qcom: sm8250: Fix PDC compatible and reg 
The pdc node suffers from both too narrow compatible and insufficient
cells in the reg, fix these.

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200415054703.739507-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-04-21 00:18:03 -07:00
Bryan O'Donoghue
b7e2fba066 arm64: dts: qcom: sm8250: Add UFS controller and PHY 
Add nodes for the UFS controller and PHY, and enable these for the MTP
with relevant supplies specified.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20200415061430.740854-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-04-20 23:40:43 -07:00
Bjorn Andersson
b6f78e2709 arm64: dts: qcom: sm8250: Add rpmhpd node 
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200415062154.741179-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-04-20 23:33:39 -07:00
Venkata Narendra Kumar Gutta
60378f1a17 arm64: dts: qcom: sm8250: Add sm8250 dts file 
Add sm8250 devicetree file for SM8250 SoC and SM8250 MTP platform.
This file adds the basic nodes like cpu, psci and other required
configuration for booting up to the serial console.

Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200310050910.506854-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-03-09 23:03:48 -07:00