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44c916d58b
Pull ARM SoC cleanups from Olof Johansson:
"This merge window brings a good size of cleanups on various platforms.
Among the bigger ones:
- Removal of Samsung s5pc100 and s5p64xx platforms. Both of these
have lacked active support for quite a while, and after asking
around nobody showed interest in keeping them around. If needed,
they could be resurrected in the future but it's more likely that
we would prefer reintroduction of them as DT and
multiplatform-enabled platforms instead.
- OMAP4 controller code register define diet. They defined a lot of
registers that were never actually used, etc.
- Move of some of the Tegra platform code (PMC, APBIO, fuse,
powergate) to drivers/soc so it can be shared with 64-bit code.
This also converts them over to traditional driver models where
possible.
- Removal of legacy gpio-samsung driver, since the last users have
been removed (moved to pinctrl)
Plus a bunch of smaller changes for various platforms that sort of
dissapear in the diffstat for the above. clps711x cleanups, shmobile
header file refactoring/moves for multiplatform friendliness, some
misc cleanups, etc"
* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
drivers: CCI: Correct use of ! and &
video: clcd-versatile: Depend on ARM
video: fix up versatile CLCD helper move
MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
MAINTAINERS: Remove Kirkwood
ARM: tegra: Convert PMC to a driver
soc/tegra: fuse: Set up in early initcall
ARM: tegra: Always lock the CPU reset vector
ARM: tegra: Setup CPU hotplug in a pure initcall
soc/tegra: Implement runtime check for Tegra SoCs
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
...
105 lines
2.4 KiB
C
105 lines
2.4 KiB
C
/*
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* linux/arch/arm/mach-pxa/generic.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code common to all PXA machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <mach/hardware.h>
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#include <asm/mach/map.h>
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#include <asm/mach-types.h>
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#include <mach/irqs.h>
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#include <mach/reset.h>
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#include <mach/smemc.h>
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#include <mach/pxa3xx-regs.h>
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#include "generic.h"
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#include <clocksource/pxa.h>
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void clear_reset_status(unsigned int mask)
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{
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if (cpu_is_pxa2xx())
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pxa2xx_clear_reset_status(mask);
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else {
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/* RESET_STATUS_* has a 1:1 mapping with ARSR */
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ARSR = mask;
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}
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}
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unsigned long get_clock_tick_rate(void)
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{
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unsigned long clock_tick_rate;
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if (cpu_is_pxa25x())
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clock_tick_rate = 3686400;
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else if (machine_is_mainstone())
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clock_tick_rate = 3249600;
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else
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clock_tick_rate = 3250000;
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return clock_tick_rate;
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}
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EXPORT_SYMBOL(get_clock_tick_rate);
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/*
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* For non device-tree builds, keep legacy timer init
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*/
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void pxa_timer_init(void)
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{
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pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
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get_clock_tick_rate());
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}
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/*
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* Get the clock frequency as reflected by CCCR and the turbo flag.
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* We assume these values have been applied via a fcs.
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* If info is not 0 we also display the current settings.
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*/
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unsigned int get_clk_frequency_khz(int info)
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{
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if (cpu_is_pxa25x())
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return pxa25x_get_clk_frequency_khz(info);
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else if (cpu_is_pxa27x())
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return pxa27x_get_clk_frequency_khz(info);
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return 0;
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}
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EXPORT_SYMBOL(get_clk_frequency_khz);
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/*
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* Intel PXA2xx internal register mapping.
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*
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* Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
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* and cache flush area.
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*/
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static struct map_desc common_io_desc[] __initdata = {
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{ /* Devs */
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.virtual = (unsigned long)PERIPH_VIRT,
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.pfn = __phys_to_pfn(PERIPH_PHYS),
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.length = PERIPH_SIZE,
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.type = MT_DEVICE
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}
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};
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void __init pxa_map_io(void)
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{
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debug_ll_io_init();
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iotable_init(ARRAY_AND_SIZE(common_io_desc));
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}
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