Thierry Reding 1ec7032ad5 clk: tegra: Add fixed factor peripheral clock type ...

Some of the peripheral clocks on Tegra are derived from one of the top-
level PLLs with a fixed factor. Support these clocks by implementing the
->enable() and ->disable() callbacks using the peripheral clock register
banks and the ->recalc_rate() by dividing the parent rate by the fixed
factor.

Signed-off-by: Thierry Reding <treding@nvidia.com>

2016-04-28 12:41:47 +02:00

3.1 KiB

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