Go to file
Nick Hollinghurst 4bece0141f drm: Add RP1 DSI driver
Add support for the RP1 DSI hardware.

Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>

drm/rp1: depends on, instead of select, MFD_RP1

According to kconfig-language.txt [1], select should be used only for
"non-visible symbols ... and for symbols with no dependencies". Since
MFD_RP1 both is visible and has a dependency, "select" should not be
used and "depends on" should be used instead.

In particular, this fixes the build of this kernel tree on NixOS, where
its kernel config system will try to answer 'M' to as many config as
possible.

[1] https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html

Signed-off-by: Ratchanan Srirattanamet <peathot@hotmail.com>

DRM: rp1: rp1-dsi: Fix escape clock divider and timeouts.

Escape clock divider was fixed at 5, which is correct at 800Mbps/lane
but increasingly out of spec for higher rates. Compute it correctly.

High speed timeout was fixed at 5*512 == 2560 byte-clocks per lane.
Compute it conservatively to be 8/7 times the line period (assuming
there will be a transition to LP some time during each scanline?)
keeping the old value as a lower bound. Increase LPRX TO to 1024,
and BTA TO to 0xb00 (same value as in bridge/synopsys/dw-mipi-dsi).

(No change to LP_CMD_TIM. To do: compute this correctly.)

Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>

drm: rp1: rp1-dsi: Switch to PLL_SYS source for DPI when 8 * lanes > bpp

To support 4 lanes, re-parent DPI clock source between DSI byteclock
(using the new "variable sources" defined in clk-rp1) and PLL_SYS.
This is to cover cases in which byteclock < pixclock <= 200MHz.

Tidying: All frequencies now in Hz (not kHz), where DSI speed is now
represented by byteclock to simplify arithmetic. Clamp DPI and byte
clocks to their legal ranges; fix up HSTX timeout to avoid an unsafe
assumption that it would return to LP state for every scanline.

Because of RP1's clock topology, the ratio between DSI and DPI clocks
may not be exact with 3 or 4 lanes, leading to slightly irregular
timings each time DSI switches between HS and LP states. Tweak to
inhibit LP during Horizontal BP when sync pulses were requested.

Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>

drm: rp1: rp1-dsi: Add DRM_FORMAT_ARGB8888 and DRM_FORMAT_ABGR8888

Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.

Signed-off-by: Jan Kehren <jan.kehren@emteria.com>

drivers: drm: rp1-dsi: Implement more DSI options and flags

Now implementing:
- Per-command selection of LP or HS for commands (previously LP)
- EoTp transmission option (previously EoTp was always disabled)
- Non-continuous clock option (previously always continuous)
- Per-command enabling of ACK request (in command mode only)

Make a plausible (and possibly correct) attempt to measure the
longest LP command that will fit into vertical blanking lines.

DON'T set both "Burst Mode" and "Sync Events" flags together.
This is redundant in the standard IP; in this RP1 variant it
would enable Sync Pulses but may break with some video timings.

Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>

drm/rp1-dsi: Run DRM default client setup

Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

drm/rp1: rp1-dsi: Put all register defines into order

Put particularly the PHY registers into order, bitmasks
defined alongside the registers, and Use tabs for indentation.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

drm/rp1: rp1-dsi: Remove all the unused boilerplate register defines

There was lots of register definition information dumped from
the some source into the driver but unused. Remove it, and
format the remaining lines according to the Linux kernel coding
style.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

drm/rp1: rp1-dsi: Add support for inverting lane polarities

The D-PHY on RP1 support lane polarity swapping, and there
is a standard device tree mechanism for configuring this,
so tie the two together.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
2025-11-24 14:23:18 +00:00
2025-11-24 14:23:18 +00:00
2022-09-28 09:02:20 +02:00
2025-02-19 14:53:27 -07:00
2025-11-23 14:53:16 -08:00
2024-03-18 03:36:32 -06:00

Linux kernel

There are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. Please read Documentation/admin-guide/README.rst first.

In order to build the documentation, use make htmldocs or make pdfdocs. The formatted documentation can also be read online at:

https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.

Build status for rpi-6.1.y: Pi kernel build tests dtoverlaycheck

Build status for rpi-6.6.y: Pi kernel build tests dtoverlaycheck

Build status for rpi-6.12.y: Pi kernel build tests dtoverlaycheck

Description
No description provided
Readme 4.7 GiB
Languages
C 97.7%
Assembly 1.3%
Shell 0.3%
Makefile 0.3%
Python 0.2%
Other 0.1%