Chen-Yu Tsai 845d6b0ff9 clk: sunxi-ng: gate: Support common pre-dividers ...

Some clock gates have a pre-divider between the source input and the
gate itself. A notable example is the HSIC 12 MHz clock found on the
A83T, which has the 24 MHz main oscillator as its input, and a /2
pre-divider.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

2017-03-06 10:25:56 +01:00

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