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This SoC has a DWC3 compatible controllers. It needs "ref" and "susp_clk" for it's operation. Add required changes in exynos dwc3 glue layer to support this SoC. Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://lore.kernel.org/r/20250516071333.3223226-3-pritam.sutar@samsung.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
6.7 KiB
6.7 KiB