Thierry Reding 0cffbde2e3 drm/tegra: hub: Enable all required clocks ...

The display architecture on Tegra186 and Tegra194 requires that there be
some valid clock on all domains before accessing any display register. A
further requirement is that in addition to the host1x, hub, disp and dsc
clocks, all the head clocks (pclk0-2 on Tegra186 or pclk0-3 on Tegra194)
must also be enabled.

Implement this logic within the display hub driver to ensure the clocks
are always enabled at the right time.

Signed-off-by: Thierry Reding <treding@nvidia.com>

2018-11-29 17:25:21 +01:00

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