Yijing Wang 503275bf37 tile/PCI: use cached pci_dev->pcie_mpss to simplify code ...

The PCI core caches the "PCIe Max Payload Size Supported" in
pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

2013-09-24 12:10:04 -06:00

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