TMOD_RO is the receive-only mode that doesn't require data in the
transmit FIFO in order to generate clock cycles. Using TMOD_RO when the
device doesn't care about the data sent to it saves CPU time and memory
bandwidth.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
TMOD_TO is the transmit-only mode that doesn't put data into the receive
FIFO. Using TMOD_TO when the user doesn't want the received data saves
CPU time and memory bandwidth.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
The firmware advertises its features as a string of words separated by
spaces. Ensure that feature names are only matched in their entirety.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
The snps,block-size DT property declares the maximum block size for each
channel of the dw-axi-dmac. However, the driver ignores these when
setting max_seg_size and uses MAX_BLOCK_SIZE (4096) instead.
To take advantage of the efficiencies of larger blocks, calculate the
minimum block size across all channels and use that instead.
See: https://github.com/raspberrypi/linux/issues/6256
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
The Raspberry Pi RP2040 GPIO bridge is an I2C-attached device exposing
both a Tx-only SPI controller, and a GPIO controller.
Due to the relative difference in transfer rates between standard-mode
I2C and SPI, the GPIO bridge makes use of 12 MiB of non-volatile storage
to cache repeated transfers. This cache is arranged in ~8 KiB blocks and
is addressed by the MD5 digest of the data contained therein.
Optionally, this driver is able to take advantage of Raspberry Pi RP1
GPIOs to achieve faster than I2C data transfer rates.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
spi: rp2040-gpio-bridge: Add debugfs progress indicator
Useful for tracking upload progress via userspace.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
spi: rp2040-gpio-bridge: add missing MD5 dependency
rp2040-gpio-bridge relies on the md5 crypto driver. This dependency
cannot be determined automatically as rp2040-gpio-bridge does not
use any of md5's symbols directly.
Declare a soft 'pre' dependency on md5 to ensure that it is included and
loaded before rp2040-gpio-bridge.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
spi: rp2040-gpio-bridge: fix gpiod error handling
In some circumstances, devm_gpiod_get_array_optional() can return
PTR_ERR rather than NULL to indicate failure. Handle these cases.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
spi: rp2040-gpio-bridge: probe: Cfg fast_xfer clk
Fast transfer mode requires that the first bit of data is clocked with a
rising edge. This can cause extra bits of data to be clocked on hardware
where the clock signal uses a pull-up. This change ensures that clk is
driven low before fast data transfer mode is entered.
Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
Offset the backend dev-nodes starting at /dev/video20
onwards to maintain backward compatibility with the
pre-upstreamed kernel driver.
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
Add helpers to set and get vchiq driver data. vchiq_set_drvdata() and
vchiq_get_drvdata() wraps dev_set_drvdata() and dev_get_drvdata()
respectively.
Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Add version 4.17.1 of the Hailo PCIe device drivers.
Sourced from https://github.com/hailo-ai/hailort-drivers/
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
drivers: media: pcie: hailo: Fix include paths
An attempt to fix the include paths - they look reasonable, but the
GitHub auto-builds fail.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: media: pci: Update Hailo accelerator device driver to v4.18.0
Sourced from https://github.com/hailo-ai/hailort-drivers/
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
drivers: media: pci: Add wrapper after removal of follow_pfn
drivers: media: pci: Fix Hailo compile warnings
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: media: pci: Update Hailo accelerator device driver to v4.19
Sourced from https://github.com/hailo-ai/hailort-drivers/
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
drivers: media: pci: Update Hailo accelerator device driver to v4.20
Sourced from https://github.com/hailo-ai/hailort-drivers
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
drivers: pci: hailo: Fix kernel warning when calling find_vdma()
Calling this function without holding the mmap_read_lock causes the
kernel to throw an error message, spamming the dmesg logs when running
the Hailo hardware.
Fix it by adding the approprite lock/unlock functions around find_vdma().
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
drivers: pci: hailo: Better lock handling when calling find_vdma()
Due to possible instabilities, reduce the mmap read lock time to only
cover the call to find_vdma().
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
Pass the DRM connector name to any configured backlight
device so that userspace can associate the two items.
Ideally this should be in drm_panel, but it is bridge/panel
that creates the drm_connector and therefore knows the name.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
drm/bridge: panel: Ensure backlight is reachable
Ensure that the various options of modules vs builtin results
in being able to call into the backlight code.
https://github.com/raspberrypi/linux/issues/6198
Fixes: 573f8fd0ab ("drm/bridge: panel: Name an associated backlight device")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
The naming of backlight devices is not terribly useful for
associating a backlight controller with a display (assuming
it is attached to one).
Add a sysfs node that will return a display name that can be set
by other subsystems.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Even when configured to use only gpiod CS lines, the DW SPI controller
still expects a bit to be set in the SER register, otherwise transfers
stall. For the csgpiod case, nominate bit 0 for the job.
See: https://github.com/raspberrypi/linux/issues/6159
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Reverts 8a4b2fc9c9 ("drm/bridge: tc358762: Split register programming from pre-enable to enable")
as we want the config commands sent before video starts.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
The autodetection of resolution/timing by the TC358762 can lead
to the display being shifted by a pixel or two.
Program the TC358762 with the requested mode timing so that
it can reproduce it accurately.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
"rotation" is listed as a standard property of panels in panel-common.yaml,
therefore it would be logical to process that from within the core
code should a panel driver not implement the get_orientation hook.
Call of_drm_get_panel_orientation from
drm_connector_set_orientation_from_panel to get that information.
This removes the need for any boiler-plate in panel drivers for calling
drm_connector_set_orientation_from_panel or
drm_connector_set_panel_orientation.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This code:
for_each_sg(sgl, sg, sg_len, i)
num_sgs += DIV_ROUND_UP(sg_dma_len(sg), axi_block_len);
determines how many hw_desc are allocated.
If sg_dma_len(sg)=0 we don't allocate for this sgl.
However in the next loop, we will increment loop
for this case, and loop gets higher than num_sgs
and we trample memory.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Newer versions of the DesignWare I2C block support the detection of
stuck signals, and a mechanism to recover from them. Add the required
software support to the driver.
This change was prompted by the observation that reading a single byte
from register 0 of a VEML7700 seems to cause it to issue an ACK too
early, and the controller to complain about losing arbitration. There
is a suspicion that this may be a more widespread problem, but at least
this patch prevents the bus from locking up.
See: https://github.com/raspberrypi/linux/issues/6057
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Recent Integral cards end up with corrupt sectors after a flash erase.
This covers sizes for the A2 range, which can't be differentiated from
the A1 range which might not have the same issue.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Only CMD38 with Arg=0x1 (Discard) is supported when in CQ mode, so
turn it off before issuing a non-discard erase op.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Cards with manufacture dates in 2019 and 2020 have been seen in the wild
that hang indefinitely if issued a cache flush command in CQ mode.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Samsung EVO Plus, Pro Plus and Evo Ultimate cards of this era appear to
have a broken cache-flush implementation when operating in CQ mode.
Unfortunately the cards seem to use a separate CID name string for every
variant and capacity, so nobble the cache feature for this MANFID, OEMID
and year. Turning this off seems to have negligible impact on
random-write throughput in non-CQ mode.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Posted write tracking introduced in the commit below raced with re-use
of the requests between completion and submission, potentially causing
underflow of the pending write count.
Fixes: e6c1e862b2 ("mmc: restrict posted write counts for SD cards in CQ mode")
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Command Queueing requires Write Cache and Power off Notification support
from the card - but using the write cache forms a contract with the host
whereby the card expects to be told about impending power-down.
The implication is that (for performance) the card can do unsafe things
with pending write data - including reordering what gets committed to
nonvolatile storage at what time.
Exposed SD slots and platforms powered by hotpluggable means (i.e.
Raspberry Pis) can't guarantee that surprise removal won't happen.
To limit the scope for cards to invent new ways to trash filesystems,
limit pending writes to 1 (equivalent to the non-CQ behaviour).
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
fixup: mmc: restrict posted write counts for SD cards in CQ mode
Leaving card->max_posted_writes unintialised was a bad thing to do.
Also, cqe_enable is 1 if hsq is enabled as hsq substitutes the cqhci
implementation with its own.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Recovery claims the MMC card so the card-detect work gets significantly
delayed - leading to lots of error recovery loops that can never do
anything but fail.
Explicitly detect the card after CQE has halted and bail if it's not
there.
Also ratelimit a not-very-descriptive warning - one occurrence in dmesg
is enough to signal that something is amiss.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
If the controller is being reset, then the CQE needs to be reset as well.
For removable cards, CQHCI_SSC1 must specify a polling mode (CBC=0)
otherwise it's possible that the controller stops emitting periodic
CMD13s on card removal, without raising an error status interrupt.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This gains about 8-12% sequential write speed with the fastest SD/eMMC
cards, and Class A1/A2 card sequential performance is only assured with
a 4MiB write length.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
The attached PHY performs parameter validation, so the switch from HS200
to HS (before selecting HS400/HS400es) with a 200MHz clock fails to
update pad timings and results in CRC errors from the card.
Underclocking the interface is safe, so do that in the downgrade callback.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
The spec allows for up to two 512-byte pages to be allocated for the
Extension Register General Info block, so allocate accordingly.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Don't attempt to turn on CQ if the other mandatory features are not
indicated as supported by the card. Also make sure that the register write
actually stuck, as some cards claim support but never report back that
the queue engine is enabled.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Certain status bits in these registers may need polling outside of
SD-specific code. Export in sd_ops.h
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
The eMMC spec says that in certain circumstances the controller can't
respond to a halt request - in practice, this occurs if a CMD
timeout happens (card went away/crashed).
Clear the halt request by writing 0 to CQHCI_CTL. Also fix a logic error
testing for halt in cqhci_request.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
For unknown reasons the controller seems to reset the idle polling timer
interval on CQE enable/disable to 8 clocks which is extremely short.
Just use the reset value in the eMMC spec (4096 clock periods which at
200MHz is ~20uS).
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Add a LED_FULL trigger equivalent to mmc_start_request() in
mmc_cqe_start_req(), otherwise it stays off forever.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
The Performance Extension register is regularly accessed in a hot path
to do write cache flushes. Don't invoke kmalloc/kfree for every access,
preallocate a 512B buffer for this purpose.
Also remove an unused alloc in sd_enable_cache().
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Application class A2 cards require CQ to be enabled to realise their
stated performance figures. Add support to enable/disable card CQ via
the Performance Enhancement extension register, and cater for the slight
differences in command set versus eMMC.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Commit 7d239fbf9d broke 802.1X authentication by setting
profile->use_fwsup = NONE whenever PSK is not used. However
802.1X does not use PSK and requires profile->use_fwsup set
to 1X, or brcmf_cfg80211_set_pmk() fails. Fix this by checking
that profile->use_fwsup is not already set to 1X and avoid
setting it to NONE in that case.
Fixes: 7d239fbf9d (brcmfmac: Fix interoperating DPP and other encryption network access)
Fixes: https://github.com/raspberrypi/linux/issues/5964
1. If firmware supports 4-way handshake offload but not supports DPP
4-way offload, when user first connects encryption network, driver will
set "sup_wpa 1" to firmware, but it will further result in DPP
connection failure since firmware won't send EAPOL frame to host.
2. Fix DPP AP mode handling action frames.
3. For some firmware without fwsup support, the join procedure will be
skipped due to "sup_wpa" iovar returning not-support. Check the fwsup
feature before do such iovar.
Signed-off-by: Kurt Lee <kurt.lee@cypress.com>
Signed-off-by: Double Lo <double.lo@cypress.com>
Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com>
In deep sleep mode (DS1) ARM is off and once exit trigger comes than
mailbox Interrupt comes to host and whole reinitiation should be done
in the ARM to start TX/RX.
Also fix below issus for DS1 exit:
1. Sent Tx Control frame only after firmware redownload complete (check
F2 Ready before sending Tx Control frame to Firmware)
2. intermittent High DS1 TX Exit latency time (almost 3sec) ==> This is
fixed by skipping host Mailbox interrupt Multiple times (ulp state
mechanism)
3. RX GlOM save/restore in Firmware
4. Add ULP event enable & event_msgs_ext iovar configuration in FMAC
5. Add ULP_EVENT_RECV state machine for sbwad support
6. Support 2 Byte Shared memory read for DS1 Exit HUDI implementation
Signed-off-by: Praveen Babu C <pucn@cypress.com>
Signed-off-by: Naveen Gupta <nagu@cypress.com>
[Merge from 4.14.77 to 5.4.18; set BRCMF_SDIO_MAX_ACCESS_ERRORS to 20]
Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com>
JIRA: SWWLAN-135583
JIRA: SWWLAN-136577
i2c_mux_add_adapter takes a force_nr parameter that allows an explicit
bus number to be associated with a channel. However, only i2c-mux-reg
and i2c-mux-gpio make use of it.
To help with situations where it is desirable to have a fixed, known
base address for the channels of a mux, create a "base-nr" property.
When force_nr is 0 and base-nr is set and non-zero, form a force_nr
value from the sum of base-nr and the channel ID.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
This patch adds the device ID for the BCM4343A2 module, found e.g. in
the Infineon (Cypress) CYW43439 chip. The required firmware file is
named 'BCM4343A2.hcd'.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
If enabled, DMA_BOUNCE_UNALIGNED_KMALLOC causes the swiotlb buffers
(64MB, by default) to be allocated, even on systems where the DMA
controller can reach all of RAM. This is a huge amount of RAM to
waste on a device with only 512MB to start with, such as the Zero 2 W.
See: https://github.com/raspberrypi/linux/issues/5975
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Add support for non-standard bus speeds by treating them as detuned
versions of the slowest standard speed not less than the requested
speed.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Calculate the HCNT and LCNT values for all modes using the rise and
fall times of SCL, the aim being a 50/50 mark/space ratio.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
There are three parkmode disable bits, one for each bus instance type.
Add FS/LS and parse the quirk out of DT. Also update the slightly
mangled quirk descriptions.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
