Step wise governor increases the mitigation level when the temperature
goes above a threshold and will decrease the mitigation when the
temperature falls below the threshold. If it were a case, where the
temperature hovers around a threshold, the mitigation will be applied
and removed at every iteration. This reaction to the temperature is
inefficient for performance.
The use of hysteresis temperature could avoid this ping-pong of
mitigation by relaxing the mitigation to happen only when the
temperature goes below this lower hysteresis value.
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
drivers: thermal: step_wise: avoid throttling at hysteresis temperature after dropping below it
Signed-off-by: Serge Schneider <serge@raspberrypi.org>
Fix hysteresis support in gov_step_wise.c
Directly get hyst value instead of going through an
optional and, now, unimplemented function.
Signed-off-by: Jürgen Kreileder <jk@blackdown.de>
Users have reported log spam created by "Event Ring Full" xHC event
TRBs. These are caused by interrupt latency in conjunction with a very
busy set of devices on the bus. The errors are benign, but throughput
will suffer as the xHC will pause processing of transfers until the
event ring is drained by the kernel. Expand the number of event TRB slots
available by increasing the number of event ring segments in the ERST.
Controllers have a hardware-defined limit as to the number of ERST
entries they can process, so make the actual number in use
min(ERST_MAX_SEGS, hw_max).
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
With the new support for a chain of sys_off handlers, gpio-poweroff
does not disable a normal shutdown (though it does delay it). There
is therefore no need for the noisy WARN from the kernel.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Certain controllers (dwc-mshc) generate timeout conditions separately to
command-completion conditions, where the end result is interrupts are
separated in time depending on the current SDCLK frequency.
This causes spurious interrupts if SDCLK is slow compared to the CPU's
ability to process and return from interrupt. This occurs during card
probe with an empty slot where all commands that would generate a
response time out.
Add a quirk to squelch command response interrupts when a command
timeout interrupt is received.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
For situations where there are multiple DRM cards in a system,
add a query of DT for "drm_fb" designations for cards to set
their preferred /dev/fbN designation.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
drm/fb_helper: Change query for FB designation from drm_fb to drm-fb
Fixes: 1216ea56c2 ("drm/fb-helper: Look up preferred fbdev node number from DT")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Add a flag custom_fb_num to denote that the client has
requested a specific fbdev node number via node.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Vision Components have made an OV9281 module which blocks reading
back the majority of registers to comply with NDAs, and in doing
so doesn't allow auto-increment register reading as used when
reading the chip ID.
Use two reads and manually combine the results.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Add binding for the new RTC driver for Raspberry Pi.
This platform has an RTC managed by firmware, and this RTC
driver provides the simple mailbox interface to access it.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
dt: bindings: update rpi-rtc binding
Add property for bcm2712 firmware RTC driver charger control
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This supports setting and reading the real time clock
and supports wakeup alarms.
To support wake up alarms you want this bootloader config:
POWER_OFF_ON_HALT=1
WAKE_ON_GPIO=0
You can test with:
echo +600 | sudo tee /sys/class/rtc/rtc0/wakealarm
sudo halt
That will halt (in an almost no power state),
then wake and restart after 10 minutes.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
drivers: rtc-rpi: add battery charge circuit control and readback
Parse devicetree for a charger voltage and apply it. If nonzero and a
valid voltage, the firmware will enable charging, otherwise the charger
circuit is disabled.
Add sysfs attributes to read back the supported charge voltage range,
the measured battery voltage, and the charger setpoint.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
We currently see these regularly:
[ 25.157560] irq 31, desc: 00000000c15e6d2c, depth: 0, count: 0, unhandled: 0
[ 25.164658] ->handle_irq(): 00000000b1775675, brcmstb_l2_intc_irq_handle+0x0/0x1a8
[ 25.172352] ->irq_data.chip(): 00000000fea59f1c, gic_chip_mode1+0x0/0x108
[ 25.179166] ->action(): 000000003eda6d6f
[ 25.183096] ->action->handler(): 000000002c09e646, bad_chained_irq+0x0/0x58
[ 25.190084] IRQ_LEVEL set
[ 25.193142] IRQ_NOPROBE set
[ 25.196198] IRQ_NOREQUEST set
[ 25.199255] IRQ_NOTHREAD set
with:
$ cat /proc/interrupts | grep 31:
31: 1 0 0 0 GICv2 129 Level (null)
The interrupt is described in DT with IRQ_TYPE_LEVEL_HIGH
But the current compatible string uses the controller in edge triggered mode
(as that config matches our register layout).
Add a new compatible structure for level driven interrupt with our register layout.
We had already been using this compatible string in device tree, so no change needed
there.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Add a driver for BCM2712 IOMMUs.
There is a small driver for the Shared IOMMU TLB Cache.
Each IOMMU instance is a separate device.
IOMMUs are set up with a "pass-through" range covering
the lowest 40BGytes (which should cover all of SDRAM)
for the benefit of non-IOMMU-aware devices that share
a physical IOMMU; and translation for addresses in the
range 40GB to 42GB.
An optional parameter adds a DMA offset (which otherwise
would be lost?) to virtual addresses for DMA masters on a
bus such as PCIe.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
iommu: bcm2712-iommu: Map and unmap multiple pages in a single call
For efficiency, the map_pages() and unmap_pages() calls now pay
attention to their "count" argument.
Remove a special case for a "pass-through" address range, which
the DMA/IOMMU subsystem isn't told exists and should never use.
Fix a bug where we omitted to set *mapped to 0 in error cases.
Minor style fixes and tidying.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
iommu/bcm2712: don't allow building as module
Since bcm2712-iommu{,-cache}.c doesn't have usual module descriptors
such as `MODULE_LICENSE`, configuring this as 'M' fails the build with
`ERROR: modpost: missing MODULE_LICENSE() in <...>/bcm2712-iommu.o`.
Since it seems like the code is not intended to be built as a module
anyway (it registers the driver with `builtin_platform_driver()`), don't
allow building this code as a module.
Signed-off-by: Ratchanan Srirattanamet <peathot@hotmail.com>
iommu: bcm2712-iommu: Add locking; fix address offset; tidy
- Now using spin_lock_irqsave in map, unmap, sync and iova_to_phys.
- Simplify bounds checks as all allocations should be in aperture.
- Use iommu_iotlb_gather_add_range(); NB gather range is inclusive.
- Fix missing address offset in bcm2712_iommu_sync_all.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style
DMA controller that supports 40 bits DMA addresses.
We need it for HDMI audio to work, but this breaks BCM2835-38 so we
should rework this later.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
dmaengine: bcm2835: Fix dma driver for BCM2835-38
The previous commit broke support on older devices.
Make the breaking parts of patch conditional on
the device being used.
Fixes: 6e1856ac7c39 ("dmaengine: bcm2835: HACK: Support DMA-Lite channels")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
BCM2712 has 6 40-bit channels - DMA6 to DMA11. Add a new compatible
string to indicate that the current platform is BCM2712.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Formerly the delay was omitted as bit-banged SPI seldom achieved
even one Mbit/s; but some modern platforms can run faster, and
some SPI devices may need to be clocked slower.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Formerly, if configured using DT, CS GPIOs were driven from spi.c
and it was possible for CS to be asserted (low) *before* starting
to drive SCK. CS GPIOs have been brought under control of this
driver in both ACPI and DT cases, with a fixup for GPIO polarity.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
BCM2712 has a PM block but neither ASB nor RPIVID_ASB. Use the absence
of the "asb" register range to indicate BCM2712 and its different PM
register range.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
BCM2712 lacks the "asb" and "rpivid_asb" register ranges, but still
requires the use of the bcm2835-power driver to reset the V3D block.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: hwmon: rp1-adc: check conversion validity before supplying value
The SAR ADC architecture may complete a conversion but instability in the
comparator can corrupt the result. Such corruption is signalled in the CS
ERR bit, asserted alongside each conversion result.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Add optional properties to tune the AXI interface -
cdns,aw2w-max-pipe, cdns,ar2r-max-pipe and cdns,use-aw2b-fill.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
This supports reading and writing OTP using the firmware
mailbox interface.
It needs supporting firmware to run.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Add support for the RP1 VEC hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-vec: Allow non-standard modes with various crops
Tweak sync timings in the advertised modelines.
Accept other, custom modes, provided they fit within the active
area of one of the existing hardware-supported TV modes.
Instead of always padding symmetrically, try to respect the user's
[hv]sync_start values, allowing the image to be shifted around
the screen (to fine-tune overscan correction).
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1: depends on, instead of select, MFD_RP1
According to kconfig-language.txt [1], select should be used only for
"non-visible symbols ... and for symbols with no dependencies". Since
MFD_RP1 both is visible and has a dependency, "select" should not be
used and "depends on" should be used instead.
In particular, this fixes the build of this kernel tree on NixOS, where
its kernel config system will try to answer 'M' to as many config as
possible.
[1] https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html
Signed-off-by: Ratchanan Srirattanamet <peathot@hotmail.com>
drm: rp1: Use tv_mode from the command line and fix for Linux 6.6
Use the standard enum drm_connector_tv_mode instead of a private
enum and switch from the legacy to the standard tv_mode property.
Remove the module parameter "tv_norm". Instead, get tv_mode from
the command line and make this the connector's default TV mode.
Don't restrict the choice of modes based on tv_mode, but interpret
nonstandard combinations as NTSC or PAL, depending on resolution.
Thus the default tv_mode=NTSC effectively means "Auto".
Tweak the advertised horizontal timings for 625/50 to match Rec.601
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: VEC and DPI drivers: Fix bug #5901
Rework probe() to use devm_drm_dev_alloc(), embedding the DRM
device in the DPI or VEC device as now seems to be recommended.
Change order of resource allocation and driver initialization.
This prevents it trying to write to an unmapped register during
clean-up, which previously could crash.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: vec: Support more video modes in the RP1 VEC driver
Support a wider range of pixel clock rates. The driver will round
pixclock up to 108MHz/n but tries to honour the desired image width
and position (of the centre of the display relative to HSYNC_STARTs).
This adds complexity but removes the need for separate 13.5MHz and
15.428MHz modes.
Support "fake" double-rate progressive modes (in which only every
2nd scanline is displayed). To work around aspect ratio issues.
Add Monochrome TV mode support. Add "vintage" modes (544x380i for
System A; 848x738i for System E) when configured for Monochrome.
Add a way to create a "custom" display mode from a module parameter.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-vec: Add DRM_FORMAT_ARGB8888 and DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
drivers: drm: rp1-vec: Increase width limit, for PAL 16:9 @ 18MHz
There was no technical reason for the DRM mode's width limit of 848;
increase it to 960 (720*18MHz/13.5MHz) to support ~square pixels on
16:9 screens. Tweak the PAL active window to start slightly earlier.
(The maximum number of visible columns at 18MHz is about 942.)
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/vc4: Make VEC progressive modes readily accessible
Add predefined modelines for the 240p (NTSC) and 288p (PAL) progressive
modes, and report them through vc4_vec_connector_get_modes().
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
drm/rp1-vec: Run DRM default client setup
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
drm: rp1: Enable VEC->GPIO output; cosmetic change to registers
In the VEC driver, enable mapping VEC (not DPI) to DPI GPIOs.
This is to support VEC output over GPIO on Raspberry Pi CM5.
It is harmless as DPI and VEC could not be used concurrently,
and the output is anyway conditional on pinctrl.
Also, tweak the style of VIDEO_OUT_CFG register definitions
(in both DPI and VEC drivers) to be more Linux-friendly.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Add support for the RP1 DPI hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1: depends on, instead of select, MFD_RP1
According to kconfig-language.txt [1], select should be used only for
"non-visible symbols ... and for symbols with no dependencies". Since
MFD_RP1 both is visible and has a dependency, "select" should not be
used and "depends on" should be used instead.
In particular, this fixes the build of this kernel tree on NixOS, where
its kernel config system will try to answer 'M' to as many config as
possible.
[1] https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html
Signed-off-by: Ratchanan Srirattanamet <peathot@hotmail.com>
drm: rp1: VEC and DPI drivers: Fix bug #5901
Rework probe() to use devm_drm_dev_alloc(), embedding the DRM
device in the DPI or VEC device as now seems to be recommended.
Change order of resource allocation and driver initialization.
This prevents it trying to write to an unmapped register during
clean-up, which previously could crash.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: dpi: Add support for MEDIA_BUS_FMT_RGB565_1X24_CPADHI
This new format corresponds to the Raspberry Pi legacy DPI mode 3.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-dpi: Add DRM_FORMAT_ARGB8888 and DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
drm: rp1: rp1-dpi: Add interlaced modes and PIO program to fix VSYNC
Implement interlaced modes by wobbling the base pointer and VFP width
for every field. This results in correct pixels but incorrect VSYNC.
Now use PIO to generate a fixed-up VSYNC by sampling DE and HSYNC.
This requires DPI's DE output to be mapped to GPIO1, which we check.
When DE is not exposed, the internal fixup is disabled. VSYNC/GPIO2
becomes a modified signal, designed to help an external device or
PIO program synthesize CSYNC or VSYNC.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-dpi: Fix optional dependency on RP1_PIO
Add optional dependency to Kconfig, and conditionally compile
PIO-dependent code. Add a mode validation function to reject
interlaced modes when RP1_PIO is not present.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-dpi: Add "rgb_order" property (to match VC4 DPI)
As on VC4, the OF property overrides the order implied by media
bus format. Only 4 of the 6 possible orders are supported. New
add-on hardware designs should not rely on this "legacy" feature.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1: DPI interlace: Improve precision of PIO-generated VSYNC
Instead of trying to minimize the delay between seeing HSYNC edge
and asserting VSYNC, try to predict the next HSYNC edge precisely.
This eliminates the round-trip delay but introduces mode-dependent
rounding error. HSYNC->VSYNC lag reduced from ~30ns to -5ns..+10ns
(plus up to 5ns synchronization jitter as before).
This may benefit e.g. SCART HATs, particularly those that generate
Composite Sync using a XNOR gate.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1-dpi: Run DRM default client setup
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
drm/rp1/rp1_dpi: Move Composite Sync generation into the kernel
Move RP1 DPI's PIO-assisted Composite Sync generation code,
previously released as a separate utility, into the kernel driver.
There are 3 variants for progressive, generic interlaced and TV-
style interlaced CSync, alongside the existing VSync fixup.
Check that all of GPIOs 1-3 are mapped to DPI, so PIO won't try
to snoop on a missing output, or override another device's pins.
Add "force_csync" module parameter, for convenience of testing,
as few tools can set DRM_MODE_FLAG_CSYNC.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drm: rp1: Enable VEC->GPIO output; cosmetic change to registers
In the VEC driver, enable mapping VEC (not DPI) to DPI GPIOs.
This is to support VEC output over GPIO on Raspberry Pi CM5.
It is harmless as DPI and VEC could not be used concurrently,
and the output is anyway conditional on pinctrl.
Also, tweak the style of VIDEO_OUT_CFG register definitions
(in both DPI and VEC drivers) to be more Linux-friendly.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Add support for the RP1 DSI hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1: depends on, instead of select, MFD_RP1
According to kconfig-language.txt [1], select should be used only for
"non-visible symbols ... and for symbols with no dependencies". Since
MFD_RP1 both is visible and has a dependency, "select" should not be
used and "depends on" should be used instead.
In particular, this fixes the build of this kernel tree on NixOS, where
its kernel config system will try to answer 'M' to as many config as
possible.
[1] https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html
Signed-off-by: Ratchanan Srirattanamet <peathot@hotmail.com>
DRM: rp1: rp1-dsi: Fix escape clock divider and timeouts.
Escape clock divider was fixed at 5, which is correct at 800Mbps/lane
but increasingly out of spec for higher rates. Compute it correctly.
High speed timeout was fixed at 5*512 == 2560 byte-clocks per lane.
Compute it conservatively to be 8/7 times the line period (assuming
there will be a transition to LP some time during each scanline?)
keeping the old value as a lower bound. Increase LPRX TO to 1024,
and BTA TO to 0xb00 (same value as in bridge/synopsys/dw-mipi-dsi).
(No change to LP_CMD_TIM. To do: compute this correctly.)
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-dsi: Switch to PLL_SYS source for DPI when 8 * lanes > bpp
To support 4 lanes, re-parent DPI clock source between DSI byteclock
(using the new "variable sources" defined in clk-rp1) and PLL_SYS.
This is to cover cases in which byteclock < pixclock <= 200MHz.
Tidying: All frequencies now in Hz (not kHz), where DSI speed is now
represented by byteclock to simplify arithmetic. Clamp DPI and byte
clocks to their legal ranges; fix up HSTX timeout to avoid an unsafe
assumption that it would return to LP state for every scanline.
Because of RP1's clock topology, the ratio between DSI and DPI clocks
may not be exact with 3 or 4 lanes, leading to slightly irregular
timings each time DSI switches between HS and LP states. Tweak to
inhibit LP during Horizontal BP when sync pulses were requested.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm: rp1: rp1-dsi: Add DRM_FORMAT_ARGB8888 and DRM_FORMAT_ABGR8888
Android requires this.
As the underlying hardware doesn't support alpha blending,
we ignore the alpha value.
Signed-off-by: Jan Kehren <jan.kehren@emteria.com>
drivers: drm: rp1-dsi: Implement more DSI options and flags
Now implementing:
- Per-command selection of LP or HS for commands (previously LP)
- EoTp transmission option (previously EoTp was always disabled)
- Non-continuous clock option (previously always continuous)
- Per-command enabling of ACK request (in command mode only)
Make a plausible (and possibly correct) attempt to measure the
longest LP command that will fit into vertical blanking lines.
DON'T set both "Burst Mode" and "Sync Events" flags together.
This is redundant in the standard IP; in this RP1 variant it
would enable Sync Pulses but may break with some video timings.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
drm/rp1-dsi: Run DRM default client setup
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Don't assume that DMA addresses of devices are the same as their
physical addresses - convert correctly.
The CFG2 register layout is used when there are more than 8 channels,
but also when configured for more than 16 target peripheral devices
because the index of the handshake signal has to be made wider.
Reset the DMAC on probe
The driver goes to the trouble of tracking when transfers have been
paused, but then doesn't report that state when queried.
Not having APB registers is not an error - for most use cases it's
not even of interest, it's expected. Demote the message to debug level,
which is disabled by default.
Each channel has a descriptor pool, which is shared between transfers.
It is unsafe to treat the total number of descriptors allocated from a
pool as the number allocated to a specific transfer; doing so leads
to releasing buffers that shouldn't be released and walking off the
ends of descriptor lists. Instead, give each transfer descriptor its
own count.
Support partial transfers:
Some use cases involve streaming from a device where the transfer only
proceeds when the device's FIFO occupancy exceeds a certain threshold.
In such cases (e.g. when pulling data from a UART) it is important to
know how much data has been transferred so far, in order that remaining
bytes can be read from the FIFO directly by software.
Add the necessary code to provide this "residue" value with a finer,
sub-transfer granularity.
In order to prevent the occasional byte getting stuck in the DMA
controller's internal buffers, restrict the destination memory width
to the source register width.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
dmaengine: dw-axi-dmac: Fix a non-atomic update
dw_axi_dma_interrupt disables interrupts for the duration of the channel
handling. It does so by clearing a bit in the DMA_CFG register - an
action that involves a read-modify-write. That in itself would be safe
because there will be no further interrupts, hence no reentrancy, were
it the only bit of code accessing that register.
The only neighbour of INT_EN is DMAC_EN - the main enable for the block.
That's not the sort of thing you would expect to be modified during the
normal course of operation, but bizarrely it is set at the start of the
transfer of every block, in axi_chan_block_xfer_star, by a call to
axi_dma_enable. This can lead to INT_EN being accidentally cleared,
which causes all DMA transfers to time out.
One might think that the enabling was being delayed until the first
transfer, but the probe function calls axi_dma_resume which in turn
calls axi_dma_enable, so that isn't the case.
Fix the atomicity problem by removing the spurious call to
axi_dma_enable.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
The SMBUS emulation code turns an SMBUS quick command into a zero-
length read. This controller can't do zero length accesses, but it
can do quick commands, so reverse the emulation. The alternative
would be to properly implement the SMBUS support but that is a lot
more work, and unnecessary just to get i2cdetect working.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Liam Fraser <liam@raspberrypi.com>
mmc: sdhci-of-dwcmshc: rp1 sdio changes
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: mmc: sdhci-of-dwcmshc: add RP1 dt ID and quirks
Differentiate the RP1 variant of the Designware MSHC controller(s).
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
ARM: pl011: Add rs485 to the RP1 support
pl011_axi_probe, added for RP1 support, lacks the rs485 additions that
appeared during its development.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
tty/serial: pl011: restrict RX burst FIFO threshold
If the associated DMA controller has lower burst length support than the
level the FIFO is set to, then bytes will be left in the RX FIFO at the
end of a DMA block - requiring a round-trip through the timeout interrupt
handler rather than an end-of-block DMA interrupt.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
tty/serial: pl011: Also unregister pl011_axi_platform_driver
See: https://github.com/raspberrypi/linux/issues/6379
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
dwc3 allocates scratch and event buffers in the top-level driver. Hack the
probe function to set the DMA mask before trying to allocate these.
I think the event buffers are only used in device mode, but the scratch
buffers may be used if core hibernation is enabled.
usb: dwc3: add support for new DT quirks
Apply the optional axi-pipe-limit and dis-in-autoretry-quirk properties
during driver probe.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
phy: phy-brcm-usb: Add 2712 support
usb: dwc3: if the host controller instance number is present in DT, use it
If two instances of a dwc3 host controller are specified in devicetree,
then the probe order may be arbitrary which results in the device names
swapping on a per-boot basis.
If a "usb" alias with the instance number is specified, then use
that to construct the device name instead of autogenerating one.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
rp1 dwc3 changes
drivers: usb: dwc3: allow setting GTXTHRCFG on dwc_usb3.0 hardware
Equivalent register fields exist in the SuperSpeed Host version of the
hardware, so allow the use of TX thresholds if specified in devicetree.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
drivers: usb: dwc3: remove downstream quirk dis-in-autoretry
Upstream have unilaterally disabled the feature.
Partially reverts 6e9142a26ee0fdc3a5adc49ed6cedc0b16ec2ed1 (downstream)
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
macb: Add device tree properties that allow configuration of the AXI max pipeline register
net: macb: add support for ethtool interrupt moderation configuration
Only global throttling of rx or tx by time quanta is supported.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
macb: add platform device shutdown function. Prevents AXI master over PCIE from hanging when the host is rebooted.
net: macb: increase polling interval for MDIO completion
MDIO is a slow bus (single-digit MHz). Polling at 1us intervals
is a bit aggressive, so increase to 100us as the transaction
usually takes 100-200us to complete.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
net: macb: Several patches for RP1
64-bit RX fix
Also set DMA coherent mask
Add device tree properties that allow configuration of the AXI max
pipeline register
Add support for ethtool interrupt moderation configuration
Only global throttling of rx or tx by time quanta is supported.
Add platform device shutdown function. Prevents AXI master over PCIE
from hanging when the host is rebooted.
Increase polling interval for MDIO completion
MDIO is a slow bus (single-digit MHz). Polling at 1us intervals
is a bit aggressive, so increase to 100us as the transaction
usually takes 100-200us to complete.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
net: macb: Support the phy-reset-gpios property
Allow a PHY to be reset with an optional GPIO. The reset duration can
be specified in milliseconds - the default is 10ms.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: net: macb: close device on driver shutdown
Fix some suspicious locking and instead call into macb_close, which
deregisters and frees all resources the corresponding macb_open
claimed.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
net: macb: add hack to prevent TX stalls in a quiet system
See https://github.com/raspberrypi/linux-2712/issues/89
There is some critical window during TX where a further write to the
TSTART bit while TX is active does not cause newly queued TX descriptors
to be consumed.
For now "wait a bit, then try anyway" seems to work.
Requires further investigation, but this unsticks NFS reliably.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
net: macb: set default interrupt moderation for GEM hardware
Defaulting to intmod = 0 is antisocial, as the MAC can generate over
130,000 interrupts per second. 50us is a sensible default.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
reset_control_reset should not be used with shared reset controllers.
Add support for reset_control_assert and _deassert to get the desired
behaviour and avoid ugly warnings in the kernel log.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
BCM2712 has an SD Express capable SDHCI implementation and uses
the SDIO CFG register block present on other STB chips.
Add plumbing for SD Express handover and BCM2712-specific functions.
Due to the common bus infrastructure between BCM2711 and BCM2712,
the driver also needs to implement 32-bit IO accessors.
mmc: brcmstb: override card presence if broken-cd is set
Not just if the card is declared as nonremovable.
sdhci: brcmstb: align SD express switchover with SD spec v8.00
Part 1 of the Physical specification, figure 3-24, details the switch
sequence for cards initially probed as SD. Add a missing check for DAT2
level after switching VDD2 on.
sdhci: brcmstb: clean up SD Express probe and error handling
Refactor to avoid spurious error messages in dmesg if the requisite SD
Express DT nodes aren't present.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
mmc: sdhci-brcmstb: only use the delay line PHY for tuneable speeds
The MMC core has a 200MHz core clock which allows the use of DDR50 and
below without incremental phase tuning. SDR50/SDR104 and the EMMC HS200
speeds require tuning.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
mmc: sdhci-brcmstb: remove 32-bit accessors for BCM2712
The reason for adding these are lost to the mists of time (and for a
previous chip revision). Removing these accessors appears to have no ill
effect on production chips, so get rid of the unnecessary RMW cycles.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
drivers: mmc: sdhci-brcmstb: fix usage of SD_PIN_SEL on BCM2712
The SDIO_CFG register SD_PIN_SEL conflates two settings - whether eMMC
HS or SD UHS timings are applied to the interface, and whether or not
the card-detect line is functional. SD_PIN_SEL can only be changed when
the SD clock isn't running, so add a bcm2712-specific clock setup.
Toggling SD_PIN_SEL at runtime means the integrated card-detect feature
can't be used, so this controller needs a cd-gpios property.
Also fix conditionals for usage of the delay-line PHY - no-1-8-v will
imply no bits set in hsemmc_mask or uhs_mask, so remove it.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
drivers: sdhci-brcmstb: set CQE timer clock frequency
CQHCI keeps track of tags in flight with internal timers, so the clock
frequency driving the timer needs to be specified. The config registers
default to 0 (100kHz) which means timeouts will be significantly shorter
than they should be. Assume the timer clock comes from the controller
base clock.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
pinctrl: bcm2712: Reject invalid pulls
Reject attempts to set pulls on aon-sgpios, and fix pull shift
values.
pinctrl: bcm2712: Add 7712 support, fix 2712 count
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl-bcm2712: add EMMC pins so pulls can be set
These pins have pad controls but not mux controls. They look enough like
GPIOs to squeeze in at the end of the list though.
pinctrl: bcm2712: correct BCM2712C0 AON_GPIO pad pull control offset
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
pinctrl: bcm2712: on C0 the regular GPIO pad control register moves too
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
pinctrl: bcm2712: Implement (partially) pinconf_get
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Convert to generic pinconf
Remove the legacy brcm,* pin configuration support and replace it with
a proper generic pinconf interface, using named functions instead of
alt function numbers. This is nicer for users, less error-prone, and
immune to some of the C0->D0 changes.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Remove vestigial pull parameter
Now the legacy brcm, pinconf parameters are no longer supported, this
custom pin config parameter is not needed.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Guard against bad func numbers
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: A better attempt at D0 support
The BCM2712D0 sparse pinctrl maps play havoc with the old GPIO_REGS
macro, so make the bit positions explicit. And delete the unwanted
GPIO and pinmux declarations on D0.
Note that a Pi 5 with D0 requires a separate DTS file with "bcm2712d0"
compatible strings.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Delete base register constants
BCM2712D0 deletes many GPIOs and their associated mux and pad bits,
so much so that the offsets to the start of the pad control registers
changes. Remove the constant offsets from the *GPIO_REGS macros,
compensating by adjusting the per-GPIO values.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Fix for sparse GPIOs
BCM2712D0's sparse GPIO map revealed that it is not safe to treat
group_selector as the GPIO number - it is an index into the array of
pinctrl_pin_descs, and the "number" member says which GPIO it refers to.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pinctrl: bcm2712: Fix for the first valid GPIO
A non-zero mux bit number is used to detect a valid entry in the
pin_regs tables, but GPIO 0 (GPIO 1 on D0) is a valid GPIO with a mux
bit number of zero, so add a high-bit on all valid entries to
distinguish this from an uninitialised row in the table.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
drivers: pinctrl: add BCM2712D0 EMMC pins
The pad control registers are concatenated onto the GPIO pad control
registers, as with previous steppings.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
gpio-brcmstb: Report the correct bank width
gpio: brcmstb: Use bank address as gpiochip label
If the path to the device node is used as gpiochip label then
gpio-brcmstb instances with multiple banks end up with duplicated
names. Instead, use a combination of the driver name with the physical
address of the bank, which is both unique and helpful for devmem
debugging.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
gpio: mmio: Add DIRECT mode for shared access
The generic MMIO GPIO library uses shadow registers for efficiency,
but this breaks attempts by raspi-gpio to change other GPIOs in the
same bank. Add a DIRECT mode that makes fewer assumptions about the
existing register contents, but note that genuinely simultaneous
accesses are likely to lose updates.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
gpio: brcmstb: Don't always clear interrupt mask
If the GPIO controller is not being used as an interrupt source
leave the interrupt mask register alone. On BCM2712 it might be used
to generate interrupts to the VPU firmware, and on other devices it
doesn't matter since no interrupts will be generated.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
gpio: brcmstb: Use dynamic GPIO base numbers
Forcing a gpiochip to have a fixed base number now leads to a warning
message. Remove the need to do so by calculating hwirq numbers based
on bank numbers.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Fixes: 3b0213d56e ("gpio: Add GPIO support for Broadcom STB SoCs")
For "Really Good Reasons" [1] the SPI core requires a match
between compatible device strings and the name in spi_device_id.
The ili9486 driver uses compatible strings "waveshare,rpi-lcd-35"
and "ozzmaker,piscreen", but "rpi-lcd-35" and "piscreen" are missing,
so add them.
Compatible string "ilitek,ili9486" is already used by
staging/fbtft/fb_ili9486, therefore leaving it present in ili9486 as an
spi_device_id causes the incorrect module to be loaded, therefore remove
this id.
[1] https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi.c#L487
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Loading the regulatory database from the debian files fails with
"loaded regulatory.db is malformed or signature is missing/invalid"
due to missing certificates. Add these debian-specific certificates
from upstream to fix this error. See #5536 for details.
The certificates have been imported as following:
patch -p1 <<<$(
curl https://salsa.debian.org/kernel-team/linux/-/raw/\
master/debian/patches/debian/\
wireless-add-debian-wireless-regdb-certificates.patch
)
Signed-off-by: Nicolai Buchwitz <n.buchwitz@kunbus.com>
The integrated USB2.0 hub in the VL805 chipset has a bug where it
incorrectly determines the remaining available frame time before the
host next sends a SOF packet with an incremented frame_number.
See the USB2.0 specification sections 11.3 and 11.14.2.3.
The hub's non-periodic TT handler can transmit the IN/OUT handshake
token too late, so a following 64-byte DATA0/1 packet causes the ACK
handshake to collide with the propagated SOF. This causes port babble.
Avoid ringing doorbells for vulnerable endpoints during uFrame 7 if the
TR is Idle to stop one source of babble. An IN transfer for a Running TR
may happen at any time, so there's not much we can do about that.
Ideally a hub firmware update to properly implement frame timeouts is
needed, and to avoid spinning for up to 125us when submitting TDs to
Idle rings.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
xhci: constrain XHCI_VLI_HUB_TT_QUIRK to old firmware versions
VLI have a firmware update for the VL805 which resolves the incorrect
frame time calculation in the hub's TT. Limit applying the quirk to
known-bad firmwares.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
