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Author SHA1 Message Date
popcornmix
47ee7516cc Merge pull request #1011 from notro/sweeping
BCM270x: Clean out unused code
2015-06-07 19:57:05 +01:00
Noralf Trønnes
5f8d28bb03 BCM270x: Remove bcm2708_systemtimer and bcm2708_powerman
These devices do not have a matching driver.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-07 20:42:52 +02:00
Noralf Trønnes
9da7815748 fixup: BCM2709: Remove unused clock implementation 2015-06-07 20:42:35 +02:00
Phil Elwell
51fe8aa9b7 Merge pull request #1008 from notro/uart1
BCM270x: Make uart1 work with Device Tree
2015-06-07 14:07:49 +01:00
popcornmix
049f5696c8 Merge pull request #1010 from notro/hwmon
hwmon: Remove bcm2835-hwmon
2015-06-07 13:59:04 +01:00
Phil Elwell
f1a4b5acde Merge pull request #1009 from notro/clean
BCM270X_DT: Enable 'make clean' on overlays directory
2015-06-07 13:33:28 +01:00
Noralf Trønnes
a26684c0f0 BCM270X_DT: Enable 'make clean' on overlays directory
Always add the overlays directory to subdir so it can be
cleaned with 'make clean'.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-07 13:57:26 +02:00
Noralf Trønnes
3d9bbbd1cb hwmon: Remove bcm2835-hwmon
bcm2835-thermal combined with the configs HWMON=y and
THERMAL_HWMON=y, gives the same functionality.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-07 13:35:33 +02:00
Noralf Trønnes
b3b5b3d8a9 BCM270x: Make uart1 work with Device Tree
Add uart1 to Device Tree. Enable it in AUXENB when it's used.
Remove old platform device.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-06 22:59:28 +02:00
Phil Elwell
2753d14cb8 sdhost-overlay: Move clock declaration out of /soc 2015-06-05 16:30:24 +01:00
Phil Elwell
2985543375 BCM270x_DT: Add a label to the clocks node, and a few aliases 2015-06-05 16:08:43 +01:00
Phil Elwell
6ec99e16a2 bcm270x defconfigs: Remove spurious entries 2015-06-05 15:59:08 +01:00
Phil Elwell
befb87363c BCM270x_DT: Enable UART in the example Compute Module DTS as well 2015-06-05 14:00:54 +01:00
Phil Elwell
b16cafd45c vchiq_arm: ARCH_BCM2835 compatibility
Use virt_to_dma (not ideal, I know) to calculate the virt-to-bus
offset. This will make use of the "dma-ranges" property, if
present.
2015-06-05 09:40:40 +01:00
Phil Elwell
3ff92a0bfe Merge pull request #1005 from pelwell/rpi-4.0.y
BCM270x_DT: Configure UART using DT
2015-06-04 22:04:16 +01:00
Phil Elwell
2408bc9ba7 BCM270x_DT: Configure UART using DT
See: https://github.com/raspberrypi/firmware/issues/393
2015-06-04 18:16:44 +01:00
popcornmix
a9941291c4 Merge pull request #1001 from notro/closer
ARCH_BCM2835 closing in on ARCH_BCM270X
2015-06-03 17:05:55 +01:00
Noralf Trønnes
d0f392c3dd bcm2835: Merge bcm2835_defconfig with bcmrpi_defconfig
These commands where used to make this commit:

./scripts/diffconfig -m arch/arm/configs/bcm2835_defconfig arch/arm/configs/bcmrpi_defconfig > merge.cfg

cat << EOF > filter
CONFIG_ARCH_BCM2708
CONFIG_BCM2708_DT
CONFIG_ARM_PATCH_PHYS_VIRT
CONFIG_PHYS_OFFSET
CONFIG_CMDLINE
CONFIG_BCM2708_WDT
CONFIG_HW_RANDOM_BCM2708
CONFIG_I2C_BCM2708
CONFIG_SPI_BCM2708
CONFIG_SND_BCM2708_SOC_I2S
CONFIG_USB_DWCOTG
CONFIG_LIRC_RPI
EOF

grep -F -v -f filter merge.cfg > filtered.cfg

cat << EOF > added.cfg
CONFIG_WATCHDOG=y
CONFIG_BCM2835_WDT=y
CONFIG_MISC_FILESYSTEMS=y
CONFIG_SND_BCM2835_SOC_I2S=m
EOF

ARCH=arm scripts/kconfig/merge_config.sh arch/arm/configs/bcm2835_defconfig filtered.cfg added.cfg
ARCH=arm make oldconfig

ARCH=arm make savedefconfig
cp defconfig arch/arm/configs/bcm2835_defconfig

rm merge.cfg filter filtered.cfg added.cfg defconfig

ARCH=arm make bcm2835_defconfig
ARCH=arm make oldconfig

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-03 12:36:19 +02:00
Noralf Trønnes
7012d9ea85 bcm2835: Make camera and sound drivers available
Change kconfig dependency to make SND_BCM2708_SOC_* and
VIDEO_BCM2835 available on ARCH_BCM2835.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-03 12:35:55 +02:00
Noralf Trønnes
83d89c2a11 dts: Enable overlays on ARCH_BCM2835
Build Device Tree overlays on ARCH_BCM2835.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-03 12:35:11 +02:00
Noralf Trønnes
55106b1b6f bcm2835: Match BCM270X Device Trees
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-03 12:34:24 +02:00
Noralf Trønnes
fcf95f0983 ARM: bcm2835: Set Serial number and Revision
The VideoCore bootloader passes in Serial number and
Revision number through Device Tree. Make these available to
userspace through /proc/cpuinfo.

Mainline status:

There is a commit in linux-next that standardize passing the serial
number through Device Tree (string: /serial-number):
ARM: 8355/1: arch: Show the serial number from devicetree in cpuinfo

There was an attempt to do the same with the revision number, but it
didn't get in:
[PATCH v2 1/2] arm: devtree: Set system_rev from DT revision

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-03 12:26:13 +02:00
popcornmix
58bf0e4670 Merge pull request #998 from notro/rng-wdog
BCM270x: Make bcm2835-pm-wdt and bcm2835-rng available
2015-06-02 16:59:08 +01:00
popcornmix
5cdc73b432 Merge pull request #995 from notro/thermal
Add thermal sensor support to ARCH_BCM2835
2015-06-02 16:57:55 +01:00
Noralf Trønnes
6325ac192e BCM270X_DT: Add bcm2835-pm-wdt and bcm2835-rng
This makes it possible to use the mainline watchdog and
random generator drivers:
dtparam=watchdog=on
dtparam=random=on

bcm2708_wdog and bcm2708-rng can still be used.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-02 15:51:52 +02:00
Noralf Trønnes
8369d9b296 BCM270x: Enable bcm2835_wdt and bcm2835-rng
Change the kconfig dependency to make bcm2835_wdt and bcm2835-rng
available on ARCH_BCM2708 and ARCH_BCM2709.
Enable them as loadable modules in bcmrpi_defconfig and
bcm2709_defconfig.

There is a commit in linux-next that will move restart/pm_power_off
to bcm2835_wdt for ARCH_BCM2835. This will not affect ARCH_BCM270x
since arm_pm_restart (.restart = bcm2708_restart) and
pm_power_off (=bcm2708_power_off) is set in
arch/arm/mach-bcm270X/bcm270X.c and will take presedence.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-02 15:51:24 +02:00
Noralf Trønnes
d2d32ba746 bcm2835: Add thermal sensor to Device Tree
Add the BCM2835 thermal sensor to Device Tree.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-02 13:55:22 +02:00
Noralf Trønnes
f788490731 BCM270x: Move thermal sensor to Device Tree
Add Device Tree support to bcm2835-thermal driver.
Add thermal sensor device to Device Tree.
Don't add platform device when booting in DT mode.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-02 13:55:05 +02:00
Martin Sperl
f6bb0a7880 added mcp251x module to list of modules to get compiled as well as the corresponding overlay 2015-06-02 10:42:21 +01:00
Phil Elwell
acc12c6b89 Merge pull request #993 from notro/usb
BCM270x: Add USB controller to Device Tree
2015-06-02 10:07:06 +01:00
Phil Elwell
75b4e19a77 Merge pull request #989 from notro/vcmem
BCM270x: Move vc_mem
2015-06-02 10:05:38 +01:00
Noralf Trønnes
392df2a9ee BCM270x: Add USB controller to Device Tree
Add Device Tree support to dwc_otg driver.
Add device to Device Tree.
Don't add platform devices when booting in DT mode.

Tested on Pi1 and Pi2 with and without DT.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-06-01 20:40:11 +02:00
mwilliams03
a7aa1bfff3 Added optional parameter to set resistance of touch plate(x-plate-ohms) 2015-06-01 16:18:44 +01:00
mwilliams03
7892fd3f1e Swap X Y axis of ads7846 touchscreen controller for PiScreen TFT 2015-06-01 16:13:55 +01:00
Phil Elwell
c24f352969 BCM270X_DT: Move the overlays into a subdirectory, adding the README 2015-06-01 12:42:12 +01:00
Noralf Trønnes
87d9c5016c dts: overlay: add support for tinylcd.com 3.5" display
Add Device Tree overlay for 3.5" display by tinylcd.com

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-31 21:52:36 +01:00
Noralf Trønnes
b491510e48 config: add KEYBOARD_GPIO 2015-05-31 21:47:33 +01:00
Phil Elwell
28f888d1f4 scripts/mkknlimg: Add support for ARCH_BCM2835
Add a new trailer field indicating whether this is an ARCH_BCM2835
build, as opposed to MACH_BCM2708/9. If the loader finds this flag
is set it changes the default base dtb file name from bcm270x...
to bcm283y...

Also update knlinfo to show the status of the field.
2015-05-28 18:38:09 +01:00
Noralf Trønnes
68491e9322 BCM270x: Move vc_mem
Make the vc_mem module available for ARCH_BCM2835 by moving it.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-28 18:50:21 +02:00
Phil Elwell
c1cc7d70de scripts: Add mkknlimg and knlinfo scripts from tools repo
The Raspberry Pi firmware looks for a trailer on the kernel image to
determine whether it was compiled with Device Tree support enabled.
If the firmware finds a kernel without this trailer, or which has a
trailer indicating that it isn't DT-capable, it disables DT support
and reverts to using ATAGs.

The mkknlimg utility adds that trailer, having first analysed the
image to look for signs of DT support and the kernel version string.

knlinfo displays the contents of the trailer in the given kernel image.
2015-05-28 13:05:45 +01:00
Phil Elwell
886477a3de Merge pull request #980 from notro/power
BCM270x: Move power module
2015-05-28 12:23:13 +01:00
Phil Elwell
9f3236df81 Merge pull request #987 from msperl/rpi-4.0.y-enable-spi-bcm2835-by-default
device-tree: spi: make spi-bcm2835 the default spi driver and prepare...
2015-05-27 19:13:33 +01:00
Phil Elwell
1e1ac984e2 bcm2835-audio: Create the platform device if the DT node is disabled
For backwards compatibility, allow the built-in ALSA driver to be enabled
either by loading the module from /etc/modules or by enabling the "/audio"
node in DT.
2015-05-27 17:34:24 +01:00
Martin Sperl
656c6494d7 device-tree: spi: make spi-bcm2835 the default spi driver and prepare for dma
* make spi-bcm2835 the default driver for spi
* add a fallback spi-bcm2708 overlay
* add dma entries to device tree for future updates
* add default cs-gpios entry showing how to extend the number of chip-selects.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
2015-05-27 14:39:55 +00:00
Phil Elwell
cc96dc4d51 Merge pull request #981 from HiassofT/dt-audio
bcm270x: add dtparam to enable/disable onboard sound device
2015-05-27 08:50:32 +01:00
Matthias Reichl
f187d961b6 bcm270x: add dtparam for audio node
The audio node is enabled by default and can be disabled
with dtparam=audio=off in config.txt
2015-05-26 14:08:46 +02:00
Noralf Trønnes
833c2d598c dts: overlay: add generic support for ads7846
Add generic support for the ADS7846 touch controller.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-25 18:14:06 +01:00
Noralf Trønnes
a742dce3ee bcm2835: Use empty bootargs in Device Tree
The VideoCore bootloader concatenates the bootargs property together
with /boot/cmdline.txt and includes it's own set of options.
Set bootargs to an empty string to behave like BCM270x.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-23 23:31:40 +02:00
Noralf Trønnes
4d4edcd3aa BCM270x: Move power module
Make the power module available on ARCH_BCM2835 by moving it.
The module turns on USB power making it possible to boot
ARCH_BCM2835 directly with the VC bootloader.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-23 23:30:36 +02:00
popcornmix
ef724874a7 vcsm: Add ioctl for custom cache flushing 2015-05-23 18:13:32 +01:00
Phil Elwell
b4eeb0d675 Improve __copy_to_user and __copy_from_user performance
Provide a __copy_from_user that uses memcpy. On BCM2708, use
optimised memcpy/memmove/memcmp/memset implementations.
2015-05-23 18:13:31 +01:00
popcornmix
5ca5fc8dc9 config: Add CONFIG_FB_SSD1307=m 2015-05-23 18:13:31 +01:00
popcornmix
31ee21187c config: Add CONFIG_CIFS_UPCALL 2015-05-23 18:13:31 +01:00
popcornmix
4f54d3c3b8 Merge pull request #977 from notro/audio
Add onboard sound device to Device Tree
2015-05-23 18:12:50 +01:00
Noralf Trønnes
04bd164afa bcm2835: Add bcm2835-audio to Device Tree
Add onboard sound device to Device Tree.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-21 13:25:32 +02:00
Noralf Trønnes
e21bb15f8f BCM270x: Add onboard sound device to Device Tree
Add Device Tree support to alsa driver.
Add device to Device Tree.
Don't add platform devices when booting in DT mode.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-21 13:24:35 +02:00
Phil Elwell
03d42eb749 vchiq: Change logging level for inbound data 2015-05-21 11:36:31 +01:00
Phil Elwell
821b3f7b8c i2c-bcm2708: When using DT, leave the GPIO setup to pinctrl 2015-05-20 10:28:15 +01:00
Phil Elwell
e72ad4baf3 Merge pull request #973 from notro/vchiq
Enable vchiq on ARCH_BCM2835
2015-05-19 14:18:12 +01:00
Noralf Trønnes
346c1e2b27 bcm2835: Add bcm2835-vchiq to Device Tree
Add vchiq to Device Tree. There are no kernel users yet,
but it's available to userspace (vcgencmd).

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-19 13:32:50 +02:00
Noralf Trønnes
6ca53d1e13 bcm2708: vchiq: Add Device Tree support
Turn vchiq into a driver and stop hardcoding resources.
Use devm_* functions in probe path to simplify cleanup.
A global variable is used to hold the register address. This is done
to keep this patch as small as possible.
Also make available on ARCH_BCM2835.
Based on work by Lubomir Rintel.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-19 13:32:34 +02:00
Noralf Trønnes
cce0a62ba4 BCM270x: Add vchiq device to platform file and Device Tree
Prepare to turn the vchiq module into a driver.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-19 13:31:50 +02:00
Phil Elwell
1dd8cb48a6 BCM2708_DT: Enable mmc and fb in the CM dtsi 2015-05-19 11:41:11 +01:00
Phil Elwell
9112b62cec Merge pull request #970 from notro/fb
bcm2708_fb: Add ARCH_BCM2835 support
2015-05-19 09:17:19 +01:00
Noralf Trønnes
182827458d bcm2835: bcm2835_defconfig use FB_BCM2708
Enable the bcm2708 framebuffer driver.
Disable the simple framebuffer driver, which matches the
device handed over by u-boot.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 19:47:45 +02:00
Noralf Trønnes
16ed47cb1d bcm2835: Add bcm2708-fb to Device Tree
Add framebuffer device to Device Tree.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 19:47:45 +02:00
Eric Anholt
48473996dc ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.
There exists a tiny MMU, configurable only by the VC (running the
closed firmware), which maps from the ARM's physical addresses to bus
addresses.  These bus addresses determine the caching behavior in the
VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top
2 bits.  The bits in the bus address mean:

From the VideoCore processor:
0x0... L1 and L2 cache allocating and coherent
0x4... L1 non-allocating, but coherent. L2 allocating and coherent
0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent

From the GPU peripherals (note: all peripherals bypass the L1
cache. The ARM will see this view once through the VC MMU):
0x0... Do not use
0x4... L1 non-allocating, and incoherent. L2 allocating and coherent.
0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent

The 2835 firmware always configures the MMU to turn ARM physical
addresses with 0x0 top bits to 0x4, meaning present in L2 but
incoherent with L1.  However, any bus addresses we were generating in
the kernel to be passed to a device had 0x0 bits.  That would be a
reserved (possibly totally incoherent) value if sent to a GPU
peripheral like USB, or L1 allocating if sent to the VC (like a
firmware property request).  By setting dma-ranges, all of the devices
below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and
friends return addresses with 0x4 bits and avoid cache incoherency.

This matches the behavior in the downstream 2708 kernel (see
BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h).

Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: popcornmix@gmail.com
2015-05-18 19:47:44 +02:00
Noralf Trønnes
61021b5883 BCM270x_DT: Add bcm2708-fb device
Add bcm2708-fb to Device Tree and don't add the
platform device when booting in DT mode.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 19:47:44 +02:00
Noralf Trønnes
8e4daae277 BCM270x: Remove header file mach/dma.h
This header file can be removed since there are no more users.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 19:47:43 +02:00
Noralf Trønnes
76842aa3ff fbdev: bcm2708_fb: Add ARCH_BCM2835 support
Add Device Tree support.
Pass the device to dma_alloc_coherent() in order to get the
correct bus address on ARCH_BCM2835.
Use the new DMA legacy API header file.
Including <mach/platform.h> is not necessary.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 19:47:43 +02:00
Noralf Trønnes
3048b2ee0c fixup: restore dma-mapping.h
dwc_otg has been fixed, so no need to revert 6ce0d20:
ARM: dma: Use dma_pfn_offset for dma address translation

The pfn_to_dma/dma_to_pfn changes that came with that commit
is needed to use the 'dma-ranges' DT property on ARCH_BCM2835.
dma-ranges is needed by bcm2708_fb and vchiq on ARCH_BCM2835.
If not the mailbox call fails to hand over the correct
bus address to videocore.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:32 +01:00
Noralf Trønnes
d54112e7c3 usb: dwc_otg: Don't use dma_to_virt()
Commit 6ce0d20 changes dma_to_virt() which breaks this driver.
Open code the old dma_to_virt() implementation to work around this.

Limit the use of __bus_to_virt() to cases where transfer_buffer_length
is set and transfer_buffer is not set. This is done to increase the
chance that this driver will also work on ARCH_BCM2835.

transfer_buffer should not be NULL if the length is set, but the
comment in the code indicates that there are situations where this
might happen. drivers/usb/isp1760/isp1760-hcd.c also has a similar
comment pointing to a possible: 'usb storage / SCSI bug'.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:31 +01:00
Phil Elwell
8beaa1d202 BCM2708_DT: Add missing CM aliases 2015-05-18 14:13:29 +01:00
Phil Elwell
aa3396801d bcm2835-mmc: Round up the overclock, so 62 works for 62.5Mhz
Also only warn once for each overclock setting.
2015-05-18 14:13:28 +01:00
Phil Elwell
3948859747 bcm2835-sdhost: Round up the overclock, so 62 works for 62.5Mhz
Also only warn once for each overclock setting.
2015-05-18 14:13:27 +01:00
Phil Elwell
14661407a3 squash: Fix up the mmc overlay 2015-05-18 14:13:26 +01:00
Phil Elwell
8337dfc3f7 BCM2708_DT: Adding starter Compute Module DTS files 2015-05-18 14:13:25 +01:00
Matthias Reichl
c4091326f0 dmaengine: bcm2708: set residue_granularity field
bcm2708-dmaengine supports residue reporting at burst level
but didn't report this via the residue_granularity field.

Without this field set properly we get playback issues with I2S cards.
2015-05-18 14:13:24 +01:00
Phil Elwell
44fa0c9f4f bcm2835-mmc: Adding overclocking option
Allow a different clock speed to be substitued for a requested 50MHz.
This option is exposed using the "overclock_50" DT parameter.
Note that the mmc interface is restricted to EVEN integer divisions of
250MHz, and the highest sensible option is 63 (250/4 = 62.5), the
next being 125 (250/2) which is much too high.

Use at your own risk.
2015-05-18 14:13:23 +01:00
Phil Elwell
628d654d5a bcm2835-sdhost: Adding overclocking option
Allow a different clock speed to be substitued for a requested 50MHz.
This option is exposed using the "overclock_50" DT parameter.
Note that the sdhost interface is restricted to integer divisions of
core_freq, and the highest sensible option for a core_freq of 250MHz
is 84 (250/3 = 83.3MHz), the next being 125 (250/2) which is much too
high.

Use at your own risk.
2015-05-18 14:13:22 +01:00
Phil Elwell
6e2339c634 bcm2835-sdhost: Error handling fix, and code clarification 2015-05-18 14:13:21 +01:00
Gordon Hollingworth
f41cad3436 rpi-ft5406: Add touchscreen driver for pi LCD display 2015-05-18 14:13:20 +01:00
Noralf Trønnes
09221e7dfe mailbox: bcm2708-vcio: Check the correct status register before writing
With the VC reader blocked and the ARM writing, MAIL0_STA reads
empty permanently while MAIL1_STA goes from empty (0x40000000)
to non-empty (0x00000001-0x00000007) to full (0x80000008).

Suggested-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:19 +01:00
Noralf Trønnes
4403b12cce mailbox: bcm2708-vcio: Allocation does not need to be atomic
No need to do atomic allocation in a context that can sleep.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:18 +01:00
Noralf Trønnes
e332ea1b61 bcm2835: Add mailbox bcm2708-vcio to Device Tree
Add mailbox to Device Tree. There are no kernel users yet,
but it's available to userspace.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:16 +01:00
Noralf Trønnes
bd5c181ebf bcm2835: bcm2835_defconfig enable BCM2708_MBOX
Enable the mailbox driver.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:15 +01:00
Noralf Trønnes
85b2c766c1 BCM270x_DT: Add mailbox bcm2708-vcio
Add bcm2708-vcio to Device Tree and don't add the
platform device when booting in DT mode.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:13 +01:00
Noralf Trønnes
ef87af464e BCM270x: Remove arch driver vcio.c
Remove the arch vcio.c driver and header file.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:12 +01:00
Noralf Trønnes
6ca78da96b BCM270x: Use bcm2708-vcio
Use bcm2708-vcio instead of the arch version.
Change affected drivers to use linux/platform_data/mailbox-bcm2708.h

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:11 +01:00
Noralf Trønnes
8707f869b9 BCM270x: power: Change initcall level to subsys
Load ordering of modules are determined by the initcall used.
If it's the same initcall level, makefile ordering decides.
Now that the mailbox driver is being moved, it's no longer
placed before the power driver by the linker.
So use a later initcall level to let the mailbox driver
load first.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:09 +01:00
Noralf Trønnes
68312978cc mailbox: bcm2708: Add bcm2708-vcio
Copy the arch vcio.c driver to drivers/mailbox.
This is done to make it available on ARCH_BCM2835.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:08 +01:00
Noralf Trønnes
9a65fa46d1 BCM2708: vcio: Use device resources
Use device resources instead of hardcoding them.
Use devm_* functions where possible.
Merge dev_mbox_register() with probe function.
Add Device Tree support.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:07 +01:00
Noralf Trønnes
28d0e06ef3 BCM2708: vcio: Do not print messages in module init
It is not common practice to print messages from a
module init function that only register a driver.
Remove obsolete module alias.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:05 +01:00
Noralf Trønnes
d704ecf53a BCM2708: vcio: Only store the register base address
No need to keep pointers to the sub registers. Only
store the base address.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:04 +01:00
Noralf Trønnes
d264726de2 BCM2708: vcio: Move some macros from header to driver
Move some macros that are only used by the driver:
MAJOR_NUM
IOCTL_MBOX_PROPERTY
DEVICE_FILE_NAME

This one becomes superfluous: BCM_VCIO_DRIVER_NAME

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:03 +01:00
Noralf Trønnes
62d6bea512 BCM2708: vcio: Restructure error paths
No need to use if/else clauses on error when return can be used directly.
Also test for errors first if possible.
This is done to enhance readability.
bcm_vcio_probe() is not touched, it will be reworked later.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:02 +01:00
Noralf Trønnes
2292ac3add BCM2708: vcio: Move character device teardown to driver remove
chrdev is created in the probe function, but teared down in module exit.
Move chrdev teardown to happen on device removal.
Also add missing mbox_dev disabling.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:13:01 +01:00
Noralf Trønnes
83b376b1b6 BCM2708: vcio: Remove unused code and compact comments
The config reference SERIAL_BCM_MBOX_CONSOLE does not exist,
so remove the whole clause as it will always be false.

Remove includes that are not needed.
Add <linux/fs.h>.
Also sort include headers alphabetically, since this
is now the preferred coding style.

Remove vc_mailbox->dev since it is not used.

Compact some comments to one line.
Remove superfluous comments.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:59 +01:00
Noralf Trønnes
8a172435f0 BCM2708: vcio: Fix checkpatch issues
checkpatch.pl errors and warnings:
Many whitespace related issues in some form or another.
Consider using <linux/uaccess.h> instead of <asm/uaccess.h>.
braces {} are not necessary for single statement blocks.
Use pr_* instead of printk.
Do not initialise statics to 0 or NULL.
Avoid CamelCase.
sizeof size should be sizeof(size).
break is not useful after a goto or return.
struct file_operations should normally be const
Possible unnecessary 'out of memory' message
Comparison to NULL could be written "!res"
quoted string split across lines.

This has not been adressed:
WARNING: consider using a completion

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:57 +01:00
Noralf Trønnes
c51023e65d video: fbdev: bcm2708_fb: Don't panic on error
No need to panic the kernel if the video driver fails.
Just print a message and return an error.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:56 +01:00
Noralf Trønnes
71f600974d BCM270x: Correct vcio device memory resource and add irq resource
The vcio driver hardcodes these resources, so this is the first
step in correcting this. Spell out the device name so we don't
have to include mach/vcio.h, since this header file will eventually
go away when the driver is later moved to drivers/mailbox.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:55 +01:00
popcornmix
b27d37e078 bcm2835-mmc: Add range of debug options for slowing things down
bcm2835-mmc: Add option to disable some delays

bcm2835-mmc: Add option to disable MMC_QUIRK_BLK_NO_CMD23

bcm2835-mmc: Default to disabling MMC_QUIRK_BLK_NO_CMD23
2015-05-18 14:12:54 +01:00
popcornmix
5d5b216323 bcm2835-mmc: Add locks when accessing sdhost registers 2015-05-18 14:12:52 +01:00
Christopher Freeman
fe120f1eb5 dmaengine: increment privatecnt when using dma_get_any_slave_channel
Channels allocated via dma_get_any_slave_channel were not increasing
the counter tracking private allocations.  When these channels were
released, privatecnt may erroneously fall to zero.  The DMA device
would then lose its DMA_PRIVATE cap and fail to allocate future private
channels (via private_candidate) as any allocations still outstanding
would incorrectly be seen as public allocations.

Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-05-18 14:12:50 +01:00
Noralf Trønnes
4d791a6422 bcm2835: Change to use bcm2835-mmc in Device Tree
Use downstream bcm2835-mmc driver to get increased throughput
and DMA support.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:49 +01:00
Noralf Trønnes
f817f05b33 bcm2835: bcm2835_defconfig enable MMC_BCM2835
Enable the downstream bcm2835-mmc driver and DMA support.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:48 +01:00
Noralf Trønnes
6d00991148 mmc: bcm2835-mmc: Make available on ARCH_BCM2835
Make the bcm2835-mmc driver available for use on ARCH_BCM2835.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:46 +01:00
Noralf Trønnes
3d397e3291 bcm2835: bcm2835_defconfig
Some options in bcm2835_defconfig are now the default and
some have changed. Update to keep functionality.

No longer available: SCSI_MULTI_LUN and RESOURCE_COUNTERS.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:45 +01:00
Noralf Trønnes
418c80102b BCM270x: Remove dmaman device
Remove the dmaman device since the dmaengine now handles
the legacy API manager.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:43 +01:00
Noralf Trønnes
c4c93b3ca7 BCM270x: dma: Remove driver
Remove dma.c driver which is now merged with bcm2708-dmaengine.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:42 +01:00
Noralf Trønnes
eb5eb47acf dmaengine: bcm2708: Merge with arch dma.c driver and disable dma.c
Merge the legacy DMA API driver with bcm2708-dmaengine.
This is done so we can use bcm2708_fb on ARCH_BCM2835 (mailbox
driver is also needed).

Changes to the dma.c code:
- Use BIT() macro.
- Cutdown some comments to one line.
- Add mutex to vc_dmaman and use this, since the dev lock is locked
  during probing of the engine part.
- Add global g_dmaman variable since drvdata is used by the engine part.
- Restructure for readability:
  vc_dmaman_chan_alloc()
  vc_dmaman_chan_free()
  bcm_dma_chan_free()
- Restructure bcm_dma_chan_alloc() to simplify error handling.
- Use device irq resources instead of hardcoded bcm_dma_irqs table.
- Remove dev_dmaman_register() and code it directly.
- Remove dev_dmaman_deregister() and code it directly.
- Simplify bcm_dmaman_probe() using devm_* functions.
- Get dmachans from DT if available.
- Keep 'dma.dmachans' module argument name for backwards compatibility.

Make it available on ARCH_BCM2835 as well.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:40 +01:00
Noralf Trønnes
8969dda249 BCM270x: Add memory and irq resources to dmaengine device and DT
Prepare for merging of the legacy DMA API arch driver dma.c
with bcm2708-dmaengine by adding memory and irq resources both
to platform file device and Device Tree node.
Don't use BCM_DMAMAN_DRIVER_NAME so we don't have to include mach/dma.h

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:39 +01:00
Phil Elwell
9aef777973 Adding bcm2835-sdhost driver, and an overlay to enable it
BCM2835 has two SD card interfaces. This driver uses the other one.
2015-05-18 14:12:38 +01:00
Phil Elwell
e638019cdf Add blk_pos parameter to mmc multi_io_quirk callback 2015-05-18 14:12:37 +01:00
popcornmix
516a244303 bcm2708-dmaengine: Add debug options 2015-05-18 14:12:36 +01:00
Daniel Matuschek
0738572131 HiFiBerry Digi: set SPDIF status bits for sample rate
The HiFiBerry Digi driver did not signal the sample rate in the SPDIF status bits.
While this is optional, some DACs and receivers do not accept this signal. This patch
adds the sample rate bits in the SPDIF status block.
2015-05-18 14:12:35 +01:00
popcornmix
c4b3716f0f smsc95xx: Disable turbo mode by default 2015-05-18 14:12:34 +01:00
Steve Glendinning
2179cdc870 smsx95xx: fix crimes against truesize
smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings.

This patch stops smsc95xx from changing truesize.

Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
2015-05-18 14:12:33 +01:00
Martin Sperl
48e908ced6 spi: bcm2835: change timeout of polling driver to 1s
The way that the timeout code is written in the polling function
the timeout does also trigger when interrupted or rescheduled while
in the polling loop.

This patch changes the timeout from effectively 20ms (=2 jiffies) to
1 second and removes the time that the transfer really takes out of
the computation, as - per design - this is <30us and the jiffie resolution
is 10ms so that does not make any difference what so ever.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
2015-05-18 14:12:32 +01:00
Martin Sperl
be9d7796df spi: bcm2835: enabling polling mode for transfers shorter than 30us
In cases of short transfer times the CPU is spending lots of time
in the interrupt handler and scheduler to reschedule the worker thread.

Measurements show that we have times where it takes 29.32us to between
the last clock change and the time that the worker-thread is running again
returning from wait_for_completion_timeout().

During this time the interrupt-handler is running calling complete()
and then also the scheduler is rescheduling the worker thread.

This time can vary depending on how much of the code is still in
CPU-caches, when there is a burst of spi transfers the subsequent delays
are in the order of 25us, so the value of 30us seems reasonable.

With polling the whole transfer of 4 bytes at 10MHz finishes after 6.16us
(CS down to up) with the real transfer (clock running) taking 3.56us.
So the efficiency has much improved and is also freeing CPU cycles,
reducing interrupts and context switches.

Because of the above 30us seems to be a reasonable limit for polling.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:31 +01:00
Martin Sperl
fbe7fdd9c9 spi: bcm2835: transform native-cs to gpio-cs on first spi_setup
Transforms the bcm-2835 native SPI-chip select to their gpio-cs equivalent.

This allows for some support of some optimizations that are not
possible due to HW-gliches on the CS line - especially filling
the FIFO before enabling SPI interrupts (by writing to CS register)
while the transfer is already in progress (See commit: e3a2be3030)

This patch also works arround some issues in bcm2835-pinctrl which does not
set the value when setting the GPIO as output - it just sets up output and
(typically) leaves the GPIO as low.  When a fix for this is merged then this
gpio_set_value can get removed from bcm2835_spi_setup.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:30 +01:00
Martin Sperl
33c8b51d5e spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/message
To reduce the number of interrupts/message we fill the FIFO before
enabling interrupts - for short messages this reduces the interrupt count
from 2 to 1 interrupt.

There have been rare cases where short (<200ns) chip-select switches with
native CS have been observed during such operation, this is why this
optimization is only enabled for GPIO-CS.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:28 +01:00
Martin Sperl
511a995b0f spi: bcm2835: fix code formatting issue
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:27 +01:00
Martin Sperl
0ab89058b8 spi: bcm2835: move to the transfer_one driver model
This also allows for GPIO-CS to get used removing the limitation of
2/3 SPI devises on the SPI bus.

Fixes: spi-cs-high with native CS with multiple devices on the spi-bus
resetting the chip selects to "normal" polarity after a finished
transfer.

No other functionality/improvements added.

Tested with the following 4 devices on the spi-bus:
* mcp2515 with native CS
* mcp2515 with gpio CS
* fb_st7735r with native CS
    (plus spi-cs-high via transistor inverting polarity)
* enc28j60 with gpio-CS
Tested-by: Martin Sperl <kernel@martin.sperl.org>

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:25 +01:00
Martin Sperl
2866f29b52 spi: bcm2835: enable support of 3-wire mode
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:24 +01:00
Martin Sperl
290acb5cf8 spi: bcm2835: clock divider can be a multiple of 2
The official documentation is wrong in this respect.
Has been tested empirically for dividers 2-1024

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:23 +01:00
Martin Sperl
ec9ba6fa16 spi: bcm2835: fill/drain SPI-fifo as much as possible during interrupt
Implement the recommendation from the BCM2835 data-sheet
with regards to polling drivers to fill/drain the FIFO as much data as possible
also for the interrupt-driven case (which this driver is making use of).

This means that for long transfers (>64bytes) we need one interrupt
every 64 bytes instead of every 12 bytes, as the FIFO is 16 words (not bytes) wide.

Tested with mcp251x (can bus), fb_st7735 (TFT framebuffer device)
and enc28j60 (ethernet) drivers.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:22 +01:00
Martin Sperl
a94e95c563 spi: bcm2835: fix all checkpath --strict messages
The following errors/warnings issued by checkpatch.pl --strict have been fixed:
drivers/spi/spi-bcm2835.c:182: CHECK: Alignment should match open parenthesis
drivers/spi/spi-bcm2835.c:191: CHECK: braces {} should be used on all arms of this statement
drivers/spi/spi-bcm2835.c:234: CHECK: Alignment should match open parenthesis
drivers/spi/spi-bcm2835.c:256: CHECK: Alignment should match open parenthesis
drivers/spi/spi-bcm2835.c:271: CHECK: Alignment should match open parenthesis
drivers/spi/spi-bcm2835.c:346: CHECK: Alignment should match open parenthesis
total: 0 errors, 0 warnings, 6 checks, 403 lines checked

In 2 locations the arguments had to get split/moved to the next line so that the
line width stays below 80 chars.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-18 14:12:21 +01:00
Jakub Kicinski
75acfa28e5 bcm2708: fix uart1 parameters
System clock is 250MHz, but the device uses a non-standard
oversampling rate (8 instead of 16) hence the clock rate
has to be multiplied by 16/8 = 2.  Currently the clock
rate seems to be divided by 2.

Also correct the .type and .flags.

Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
2015-05-18 14:12:20 +01:00
popcornmix
4c81262042 config: Add default configs 2015-05-18 14:12:19 +01:00
Clive Messer
ed6129b6b9 Add Device Tree support for RPi-DAC. 2015-05-18 14:12:18 +01:00
Waldemar Brodkorb
dcc1166650 Add driver for rpi-proto
Forward port of 3.10.x driver from https://github.com/koalo
We are using a custom board and would like to use rpi 3.18.x
kernel. Patch works fine for our embedded system.

URL to the audio chip:
http://www.mikroe.com/add-on-boards/audio-voice/audio-codec-proto/

Playback tested with devicetree enabled.

Signed-off-by: Waldemar Brodkorb <wbrodkorb@conet.de>
2015-05-18 14:12:17 +01:00
Phil Elwell
9b3367fb34 BCM270x_DT: Refactor bcm2708.dtsi and bcm2709.dtsi
Extract the common elements, creating bcm2708_common.dtsi
2015-05-18 14:12:15 +01:00
Noralf Trønnes
f239aede66 BCM270x_DT: add bcm2835-mmc entry
Add Device Tree entry for bcm2835-mmc.
In non-DT mode, don't add the device in the board file.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:14 +01:00
Noralf Trønnes
2069fa6f92 bcm270x: add mmc-bcm2835 clock
Add clock for the mmc-bcm2835.0 device.
Will be used in non-DT mode.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:13 +01:00
Noralf Trønnes
07f0f5dff6 BCM270x_DT: add bcm2835-dma entry
Add Device Tree entry for bcm2835-dma.
The entry doesn't contain any resources since they are handled
by the arch/arm/mach-bcm270x/dma.c driver.
In non-DT mode, don't add the device in the board file.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:12 +01:00
Noralf Trønnes
25144d9041 dts: overlay: rpi-display: pullup irq gpio
An early version of rpi-display needs the touch controller irq
to be pulled up. This is the version with 9-bit SPI as default.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:10 +01:00
Noralf Trønnes
91ddc612d6 dts: overlay: piscreen: set speed to 24MHz
Some of the displays can't handle the 32MHz speed.
Lower the default speed to 24MHz.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:09 +01:00
Noralf Trønnes
f62da85da5 dts: overlay: add support for MZ61581 display
Add Device Tree overlay for MZ61581 display by Tontec.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:08 +01:00
Martin Sperl
662acdca52 enable compiling spi-bcm2835 and add overlay to allow us to load the driver 2015-05-18 14:12:06 +01:00
Noralf Trønnes
73e2e5f0cf dts: overlay: add support for Adafruit PiTFT
Add DT overlay for the Adafruit PiTFT 2.8" resistive touch screen

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:05 +01:00
Phil Elwell
3e42b34efb enc28j60: Add device tree compatible string and an overlay 2015-05-18 14:12:04 +01:00
Noralf Trønnes
b550a421db dts: overlay: add support for PiScreen display
Add Device Tree overlay for PiScreen display by OzzMaker.com

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:03 +01:00
Noralf Trønnes
5af9bd2800 dts: overlay: add support for HY28B display
Add Device Tree overlay for HY28B display by HAOYU Electronics.
Default values are set to match Texy's display shield.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:02 +01:00
Noralf Trønnes
069873b96c dts: overlay: add support for HY28A display
Add Device Tree overlay for HY28A display by HAOYU Electronics.
Default values are set to match Texy's display shield.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:01 +01:00
Noralf Trønnes
cc77252e93 dts: overlay: add support for rpi-display
Add Device Tree overlay for rpi-display by Watterott.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:12:00 +01:00
Jon Burgess
54ac30503e Create generic i2c-rtc overlay for supporting ds1307, ds3231, pcf2127 and pcf8523.
Signed-off-by: Jon Burgess <jburgess777@gmail.com>
2015-05-18 14:11:59 +01:00
Dave Martin
4ea4904eab serial/amba-pl011: Refactor and simplify TX FIFO handling
Commit 734745c serial/amba-pl011: Activate TX IRQ passively
adds some complexity and overhead in the form of a softirq
mechanism for transmitting in the absence of interrupts.

This patch simplifies the code flow to reduce the reliance on
subtle behaviour and avoid fragility under future maintenance.

To this end, the TX softirq mechanism is removed and instead
pl011_start_tx() will now simply stuff the FIFO until full
(guaranteeing future TX IRQs), or until there are no more chars
to write (in which case we don't care whether an IRQ happens).

Signed-off-by: Dave Martin <Dave.Martin@xxxxxxx>
Signed-off-by: Jakub Kicinski <kubakici@xxxxx>
2015-05-18 14:11:57 +01:00
Dave Martin
3e202bbc0a serial/amba-pl011: Activate TX IRQ passively
The current PL011 driver transmits a dummy character when the UART
is opened, to assert the TX IRQ for the first time
(see pl011_startup()).  The UART is put in loopback mode temporarily,
so the receiver presumably shouldn't see anything.

However...

At least some platforms containing a PL011 send characters down the
wire even when loopback mode is enabled.  This means that a
spurious NUL character may be seen at the receiver when the PL011 is
opened through the TTY layer.

The current code also temporarily sets the baud rate to maximum and
the character width to the minimum, to that the dummy TX completes
as quickly as possible.  If this is seen by the receiver it will
result in a framing error and can knock the receiver out of sync --
turning subsequent output into garbage until synchronisation
is reestablished.  (Particularly problematic during boot with systemd.)

To avoid spurious transmissions, this patch removes assumptions about
whether the TX IRQ will fire until at least one TX IRQ has been seen.

Instead, the UART will unmask the TX IRQ and then slow-start via
polling and timer-based soft IRQs initially.  If the TTY layer writes
enough data to fill the FIFO to the interrupt threshold in one go,
the TX IRQ should assert, at which point the driver changes to
fully interrupt-driven TX.

In this way, the TX IRQ is activated as a side-effect instead of
being done deliberately.

This should also mean that the driver works on the SBSA Generic
UART[1] (a cut-down PL011) without invasive changes.  The Generic
UART lacks some features needed for the dummy TX approach to work
(FIFO disabling and loopback).

[1] Server Base System Architecture (ARM-DEN-0029-v2.3)
    http://infocenter.arm.com/
    (click-thru required :/)

Signed-off-by: Dave Martin <Dave.Martin@xxxxxxx>
2015-05-18 14:11:55 +01:00
Phil Elwell
8b23b10441 pinctrl-bcm2835: Only request the interrupts listed in the DTB
Although the GPIO controller can generate three interrupts (four counting
the common one), the device tree files currently only specify two. In the
absence of the third, simply don't register that interrupt (as opposed to
registering 0), which has the effect of making it impossible to generate
interrupts for GPIOs 46-53 which, since they share pins with the SD card
interface, is unlikely to be a problem.
2015-05-18 14:11:54 +01:00
Phil Elwell
32a5da28f6 pinctrl-bcm2835: Fix interrupt handling for GPIOs 28-31 and 46-53
Contrary to the documentation, the BCM2835 GPIO controller actually has
four interrupt lines - one each for the three IRQ groups and one common. Rather
confusingly, the GPIO interrupt groups don't correspond directly with the GPIO
control banks. Instead, GPIOs 0-27 generate IRQ GPIO0, 28-45 GPIO1 and
46-53 GPIO2.

Awkwardly, the GPIOS for IRQ GPIO1 straddle two 32-entry GPIO banks, so it is
cleaner to split out a function to process the interrupts for a single GPIO
bank.

This bug has only just been observed because GPIOs above 27 can only be
accessed on an old Raspberry Pi with the optional P5 header fitted, where
the pins are often used for I2S instead.
2015-05-18 14:11:52 +01:00
Rainer Herbers
051ee61d82 Create bmp085_i2c-sensor-overlay.dts and update Makefile 2015-05-18 14:11:51 +01:00
Phil Elwell
b3b824bd1a Fix LED "input" trigger implementation for 3.19 2015-05-18 14:11:50 +01:00
jeanleflambeur
0e2bf64dfa Fix grabbing lock from atomic context in i2c driver
2 main changes:
- check for timeouts in the bcm2708_bsc_setup function as indicated by this comment:
      /* poll for transfer start bit (should only take 1-20 polls) */
  This implies that the setup function can now fail so account for this everywhere it's called
- Removed the clk_get_rate call from inside the setup function as it locks a mutex and that's not ok since we call it from under a spin lock.

removed dead code and update comment

fixed typo in comment
2015-05-18 14:11:49 +01:00
android
2e4da5fe9c BCM2708_VCIO : Add automatic creation of device node 2015-05-18 14:11:48 +01:00
Byron Bradley
7cc34a8cfd Add device-tree overlay for pcf2127
Signed-off-by: Byron Bradley <byronb@afterthoughtsoftware.com>
2015-05-18 14:11:47 +01:00
Phil Elwell
bc82027bbc i2c_bcm2708: Fix clock reference counting 2015-05-18 14:11:46 +01:00
Phil Elwell
8036f2caa1 w1-gpio: Sort out the pullup/parasitic power tangle 2015-05-18 14:11:45 +01:00
Phil Elwell
393edfb884 pinctrl-bcm2835: bcm2835_gpio_direction_output must set the value 2015-05-18 14:11:44 +01:00
Phil Elwell
f088dd8360 BCM270x_DT: Add i2c0_baudrate and i2c1_baudrate parameters 2015-05-18 14:11:43 +01:00
Daniel Matuschek
3d7d7eec68 HiFiBerry Amp: fix device-tree problems
Some code to load the driver based on device-tree-overlays was missing. This is added by this patch.
2015-05-18 14:11:42 +01:00
popcornmix
d853573a24 bcm2709: Simplify and strip down IRQ handler 2015-05-18 14:11:41 +01:00
Phil Elwell
87781a1104 BCM270x_DT: Add pwr_led, and the required "input" trigger
The "input" trigger makes the associated GPIO an input.  This is to support
the Raspberry Pi PWR LED, which is driven by external hardware in normal use.

N.B. pwr_led is not available on Model A or B boards.
2015-05-18 14:11:39 +01:00
Ryan Coe
a7009653da Add device-tree overlay for ds1307
Signed-off-by: Ryan Coe <bluemrp9@gmail.com>
2015-05-18 14:11:38 +01:00
Ryan Coe
5d570e3f18 Update ds1307 driver for device-tree support
Signed-off-by: Ryan Coe <bluemrp9@gmail.com>
2015-05-18 14:11:36 +01:00
Joerg Hohensohn
0d9b3a0bcf bugfix for 32kHz sample rate, was missing 2015-05-18 14:11:35 +01:00
Daniel Matuschek
2659d2e766 Add a parameter to turn off SPDIF output if no audio is playing
This patch adds the paramater auto_shutdown_output to the kernel module.
Default behaviour of the module is the same, but when auto_shutdown_output
is set to 1, the SPDIF oputput will shutdown if no stream is playing.
2015-05-18 14:11:34 +01:00
Phil Elwell
443b54f7c5 BCM2708_DT: Add pcf8523-rtc overlay 2015-05-18 14:11:33 +01:00
Serge Schneider
1eee348208 I2C: Only register the I2C device for the current board revision 2015-05-18 14:11:32 +01:00
Timo Kokkonen
4b28c08f94 Added support to reserve/enable a GPIO pin to be used from pps-gpio module (LinuxPPS). Enable PPS modules in default config for RPi. 2015-05-18 14:11:31 +01:00
Phil Elwell
419c05810d Add pps-gpio DT overlay
Parameters:
    gpiopin=<input pin>    // Default 18
2015-05-18 14:11:30 +01:00
Daniel Matuschek
a4963dc365 Add device tree overlay for HiFiBerry Amp/Amp+
This patch add the missing device tree file for the HiFiBerry Amp and Amp+ boards.
2015-05-18 14:11:29 +01:00
Phil Elwell
61d5f248a1 BCM2708_DT: Build the overlays as well 2015-05-18 14:11:28 +01:00
Phil Elwell
3d25f9a913 scripts/dtc: Update to upstream version with overlay patches 2015-05-18 14:11:27 +01:00
Daniel Matuschek
e184aed28c TAS5713: return error if initialisation fails
Existing TAS5713 driver logs errors during initialisation, but does not return
an error code. Therefore even if initialisation fails, the driver will still be
loaded, but won't work. This patch fixes this. I2C communication error will now
reported correctly by a non-zero return code.
2015-05-18 14:11:26 +01:00
Phil Elwell
553dc9df2f Adding w1-gpio device tree overlays
N.B. Requires firmware supporting multi-target overrides

w1-gpio-overlay:
  Use if a pullup pin is not required.
  Parameters:
    gpiopin=<i/o pin>     // default 4

w1-gpio-pullup-overlay:
  Use if a pullup pin is required.
  Parameters:
    gpiopin=<i/o pin>     // default 4
    pullup=<pullup pin>   // default 5
2015-05-18 14:11:25 +01:00
Phil Elwell
a026d17038 Fix the activity LED in DT mode
Add a "leds" node to the base DTBs, and a subnode for the activity
LED. You can change the LED function like this:

  dtparam=act_led_trigger=heartbeat

Add aliases for the other main nodes (soc, intc).

Issue: linux #757
2015-05-18 14:11:23 +01:00
Phil Elwell
edb77c8491 lirc-rpi: Add device tree support, and a suitable overlay
The overlay supports DT parameters that match the old module
parameters, except that gpio_in_pull should be set using the
strings "up", "down" or "off".

lirc-rpi: Also support pinctrl-bcm2835 in non-DT mode
2015-05-18 14:11:22 +01:00
Phil Elwell
d5a999e2a5 DT: Add overrides to enable i2c0, i2c1, spi and i2s 2015-05-18 14:11:21 +01:00
Phil Elwell
6fd8865394 fdt: Add support for the CONFIG_CMDLINE_EXTEND option 2015-05-18 14:11:20 +01:00
popcornmix
52ea3e8431 Adding Device Tree support for some RPi audio cards 2015-05-18 14:11:18 +01:00
Phil Elwell
cd6eac4277 bcm2708: Allow option card devices to be configured via DT
If the kernel is built with Device Tree support, and if a DT blob
is provided for the kernel at boot time, then the platform devices
for option cards are not created. This avoids both the need to
blacklist unwanted devices, and the need to update the board
support code with each new device.
2015-05-18 14:11:17 +01:00
Daniel Matuschek
9735204243 Added driver for HiFiBerry Amp amplifier add-on board
The driver contains a low-level hardware driver for the TAS5713 and the
drivers for the Raspberry Pi I2S subsystem.
2015-05-18 14:11:16 +01:00
Daniel Matuschek
6bd1b0b2de Added support for HiFiBerry DAC+
The driver is based on the HiFiBerry DAC driver. However HiFiBerry DAC+ uses
a different codec chip (PCM5122), therefore a new driver is necessary.
2015-05-18 14:11:15 +01:00
popcornmix
f2b5a6b2be Revert "ARM: dma: Use dma_pfn_offset for dma address translation"
This reverts commit 6ce0d20016.
2015-05-18 14:11:14 +01:00
P33M
f9a921c3fd usb: core: make overcurrent messages more prominent
Hub overcurrent messages are more serious than "debug". Increase loglevel.
2015-05-18 14:11:13 +01:00
popcornmix
bec4d9d9ce hid: Reduce default mouse polling interval to 60Hz
Reduces overhead when using X
2015-05-18 14:11:13 +01:00
notro
0ffd661b5b i2c: bcm2708: add device tree support
Add DT support to driver and add to .dtsi file.
Setup pins in .dts file.
i2c is disabled by default.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

bcm2708: don't register i2c controllers when using DT

The devices for the i2c controllers are in the Device Tree.
Only register devices when not using DT.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

i2c: bcm2835: make driver available on ARCH_BCM2708

Make this driver available on ARCH_BCM2708

Signed-off-by: Noralf Tronnes <notro@tronnes.org>
2015-05-18 14:11:12 +01:00
notro
73da1a3c93 spi: bcm2708: add device tree support
Add DT support to driver and add to .dtsi file.
Setup pins and spidev in .dts file.
SPI is disabled by default.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

BCM2708: don't register SPI controller when using DT

The device for the SPI controller is in the Device Tree.
Only register the device when not using DT.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

spi: bcm2835: make driver available on ARCH_BCM2708

Make this driver available on ARCH_BCM2708

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

bcm2708: Remove the prohibition on mixing SPIDEV and DT
2015-05-18 14:11:10 +01:00
notro
a54d4c766a BCM2708: use pinctrl-bcm2835
Use pinctrl-bcm2835 instead of the pinctrl-bcm2708 and bcm2708_gpio
combination.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>
2015-05-18 14:11:09 +01:00
popcornmix
dfbf7f32a3 BCM2708: armctrl: Add IRQ Device Tree support
Add Device Tree IRQ support for BCM2708.
Usage is the same as for irq-bcm2835.
See binding document: brcm,bcm2835-armctrl-ic.txt

A bank 3 is added to handle GPIO interrupts. This is done because
armctrl also handles GPIO interrupts.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

BCM2708: armctrl: remove irq bank 3

irq bank 3 was needed by the pinctrl-bcm2708 and bcm2708_gpio
combination. It is no longer required.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>
2015-05-18 14:11:07 +01:00
popcornmix
ed1ae32f8c vmstat: Workaround for issue where dirty page count goes negative
See:
https://github.com/raspberrypi/linux/issues/617
http://www.spinics.net/lists/linux-mm/msg72236.html
2015-05-18 14:11:06 +01:00
Howard Mitchell
f29f6cd196 Set a limit of 0dB on Digital Volume Control
The main volume control in the PCM512x DAC has a range up to
+24dB. This is dangerously loud and can potentially cause massive
clipping in the output stages. Therefore this sets a sensible
limit of 0dB for this control.
2015-05-18 14:11:04 +01:00
Gordon Garrity
c25fb5c2ad Add IQaudIO Sound Card support for Raspberry Pi 2015-05-18 14:11:03 +01:00
Daniel Matuschek
c287231c41 ASoC: wm8804: Set idle_bias_off to false Idle bias has been change to remove warning on driver startup
Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
2015-05-18 14:11:02 +01:00
Daniel Matuschek
3e7168ca1c BCM2708: Added support for HiFiBerry Digi board Board initalization by I2C
Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
2015-05-18 14:11:01 +01:00
Daniel Matuschek
aba07adc7c ASoC: BCM:Add support for HiFiBerry Digi. Driver is based on the patched WM8804 driver.
Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
2015-05-18 14:10:59 +01:00
Daniel Matuschek
8bab4c7e56 ASoC: wm8804: Implement MCLK configuration options, add 32bit support WM8804 can run with PLL frequencies of 256xfs and 128xfs for most sample rates. At 192kHz only 128xfs is supported. The existing driver selects 128xfs automatically for some lower samples rates. By using an additional mclk_div divider, it is now possible to control the behaviour. This allows using 256xfs PLL frequency on all sample rates up to 96kHz. It should allow lower jitter and better signal quality. The behavior has to be controlled by the sound card driver, because some sample frequency share the same setting. e.g. 192kHz and 96kHz use 24.576MHz master clock. The only difference is the MCLK divider.
This also added support for 32bit data.

Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
2015-05-18 14:10:58 +01:00
Florian Meier
d78be61ea3 ASoC: BCM2708: Add support for RPi-DAC
This adds a machine driver for the RPi-DAC.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
2015-05-18 14:10:56 +01:00
Florian Meier
b394d1eb28 BCM2708: Add HifiBerry DAC to board file
This adds the initalization of the HifiBerry DAC
to the mach-bcm2708 board file.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
2015-05-18 14:10:55 +01:00
Florian Meier
94196ac3ca ASoC: Add support for HifiBerry DAC
This adds a machine driver for the HifiBerry DAC.
It is a sound card that can
be stacked onto the Raspberry Pi.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
2015-05-18 14:10:54 +01:00
Florian Meier
54acb0b34f BCM2708: Add I2S support to board file
Adds the required initializations for I2S
to the board file of mach-bcm2708.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
2015-05-18 14:10:53 +01:00
Florian Meier
0c7edf4918 ASoC: Add support for PCM5102A codec
Some definitions to support the PCM5102A codec
by Texas Instruments.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
2015-05-18 14:10:52 +01:00
Florian Meier
feeba5351c ASoC: Add support for BCM2708
This driver adds support for digital audio (I2S)
for the BCM2708 SoC that is used by the
Raspberry Pi. External audio codecs can be
connected to the Raspberry Pi via P5 header.

It relies on cyclic DMA engine support for BCM2708.

Signed-off-by: Florian Meier <florian.meier@koalo.de>

ASoC: BCM2708: Add 24 bit support

This adds 24 bit support to the I2S driver of the BCM2708.
Besides enabling the 24 bit flags, it includes two bug fixes:

MMAP is not supported. Claiming this leads to strange issues
when the format of driver and file do not match.

The datasheet states that the width extension bit should be set
for widths greater than 24, but greater or equal would be correct.
This follows from the definition of the width field.

Signed-off-by: Florian Meier <florian.meier@koalo.de>

bcm2708-i2s: Update bclk_ratio to more correct values

Move GPIO setup to hw_params.

This is used to stop the I2S driver from breaking
the GPIO setup for other uses of the PCM interface

Configure GPIOs for I2S based on revision/card settings

With RPi model B+, assignment of the I2S GPIO pins has changed.
This patch uses the board revision to auto-detect the GPIOs used
for I2S. It also allows sound card drivers to set the GPIOs that
should be used. This is especially important with the Compute
Module.

bcm2708-i2s: Avoid leak from iomap when accessing gpio

bcm2708: Eliminate i2s debugfs directory error

Qualify the two regmap ranges uses by bcm2708-i2s ('-i2s' and '-clk')
to avoid the name clash when registering debugfs entries.
2015-05-18 14:10:51 +01:00
popcornmix
2a2dfaaf17 config: Enable CONFIG_MEMCG, but leave it disabled (due to memory cost). Enable with cgroup_enable=memory. 2015-05-18 14:10:50 +01:00
popcornmix
9184728a28 Added Device IDs for August DVB-T 205 2015-05-18 14:10:49 +01:00
popcornmix
efa97087b1 enabling the realtime clock 1-wire chip DS1307 and 1-wire on GPIO4 (as a module)
1-wire: Add support for configuring pin for w1-gpio kernel module
See: https://github.com/raspberrypi/linux/pull/457

Add bitbanging pullups, use them for w1-gpio

Allows parasite power to work, uses module option pullup=1

bcm2708: Ensure 1-wire pullup is disabled by default, and expose as module parameter

Signed-off-by: Alex J Lennon <ajlennon@dynamicdevices.co.uk>

w1-gpio: Add gpiopin module parameter and correctly free up gpio pull-up pin, if set

Signed-off-by: Alex J Lennon <ajlennon@dynamicdevices.co.uk>
2015-05-18 14:10:48 +01:00
popcornmix
df82c20672 Allow mac address to be set in smsc95xx
Signed-off-by: popcornmix <popcornmix@gmail.com>
2015-05-18 14:10:47 +01:00
Harm Hanemaaijer
bf710085ad Speed up console framebuffer imageblit function
Especially on platforms with a slower CPU but a relatively high
framebuffer fill bandwidth, like current ARM devices, the existing
console monochrome imageblit function used to draw console text is
suboptimal for common pixel depths such as 16bpp and 32bpp. The existing
code is quite general and can deal with several pixel depths. By creating
special case functions for 16bpp and 32bpp, by far the most common pixel
formats used on modern systems, a significant speed-up is attained
which can be readily felt on ARM-based devices like the Raspberry Pi
and the Allwinner platform, but should help any platform using the
fb layer.

The special case functions allow constant folding, eliminating a number
of instructions including divide operations, and allow the use of an
unrolled loop, eliminating instructions with a variable shift size,
reducing source memory access instructions, and eliminating excessive
branching. These unrolled loops also allow much better code optimization
by the C compiler. The code that selects which optimized variant is used
is also simplified, eliminating integer divide instructions.

The speed-up, measured by timing 'cat file.txt' in the console, varies
between 40% and 70%, when testing on the Raspberry Pi and Allwinner
ARM-based platforms, depending on font size and the pixel depth, with
the greater benefit for 32bpp.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
2015-05-18 14:10:46 +01:00
popcornmix
bf2b02758c rtl8192cu: Add PID for D-Link DWA 131 2015-05-18 14:10:44 +01:00
popcornmix
a1772741f5 Add non-mainline source for rtl8192cu wireless driver version v4.0.2_9000 as this is widely used. Disabled older rtlwifi driver
8192cu needs old wireless extensions

The obsolete WIRELESS_EXT configuration is used
by the old Realtek code and is needed for AP support.

8192cu: CONFIG_AP_MODE hardcoded in autoconf.h
2015-05-18 14:10:42 +01:00
Siarhei Siamashka
f31a57922e fbdev: add FBIOCOPYAREA ioctl
Based on the patch authored by Ali Gholami Rudi at
    https://lkml.org/lkml/2009/7/13/153

Provide an ioctl for userspace applications, but only if this operation
is hardware accelerated (otherwide it does not make any sense).

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2015-05-18 14:10:40 +01:00
notro
1f608b5afc BCM2708: Add core Device Tree support
Add the bare minimum needed to boot BCM2708 from a Device Tree.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>

BCM2708: DT: change 'axi' nodename to 'soc'

Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
The VC4 bootloader fills in certain properties in the 'axi' subtree,
but since this is part of an upstreaming effort, the name is changed.

Signed-off-by: Noralf Tronnes notro@tronnes.org

BCM2708_DT: Correct length of the peripheral space
2015-05-18 14:10:39 +01:00
notro
8c07f3005b BCM2708: Migrate to the Common Clock Framework
As part of moving towards using Device Tree, the Common Clock Framework
has to be used instead of the BCM2708 clock implementation.

Selecting COMMON_CLK removes the need to set CLKDEV_LOOKUP and HAVE_CLK explicitly.

CONFIG_ARCH_BCM2708_CHIPIT #ifdef's are removed. They are no longer in use.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>
2015-05-18 14:10:38 +01:00
notro
e89c65d05f spi-bcm2708: Prepare for Common Clock Framework migration
As part of migrating to use the Common Clock Framework, replace clk_enable()
with clk_prepare_enable() and clk_disable() with clk_disable_unprepare().
This does not affect behaviour under the current clock implementation.

Also add a missing clk_disable_unprepare() in the probe error path.

Signed-off-by: Noralf Tronnes <notro@tronnes.org>
2015-05-18 14:10:37 +01:00
Vincent Sanders
058850accb bcm2835: add v4l2 camera device
- Supports raw YUV capture, preview, JPEG and H264.
- Uses videobuf2 for data transfer, using dma_buf.
- Uses 3.6.10 timestamping
- Camera power based on use
- Uses immutable input mode on video encoder

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Luke Diamand <luked@broadcom.com>

V4L2: Fixes from 6by9

V4L2: Fix EV values. Add manual shutter speed control

V4L2 EV values should be in units of 1/1000. Corrected.
Add support for V4L2_CID_EXPOSURE_ABSOLUTE which should
give manual shutter control. Requires manual exposure mode
to be selected first.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Correct JPEG Q-factor range

Should be 1-100, not 0-100

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix issue of driver jamming if STREAMON failed.

Fix issue where the driver was left in a partially enabled
state if STREAMON failed, and would then reject many IOCTLs
as it thought it was streaming.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix ISO controls.

Driver was passing the index to the GPU, and not the desired
ISO value.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add flicker avoidance controls

Add support for V4L2_CID_POWER_LINE_FREQUENCY to set flicker
avoidance frequencies.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add support for frame rate control.

Add support for frame rate (or time per frame as V4L2
inverts it) control via s_parm.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Improve G_FBUF handling so we pass conformance

Return some sane numbers for get framebuffer so that
we pass conformance.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix information advertised through g_vidfmt

Width and height were being stored based on incorrect
values.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add support for inline H264 headers

Add support for V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER
to control H264 inline headers.
Requires firmware fix to work correctly, otherwise format
has to be set to H264 before this parameter is set.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix JPEG timestamp issue

JPEG images were coming through from the GPU with timestamp
of 0. Detect this and give current system time instead
of some invalid value.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix issue when switching down JPEG resolution.

JPEG buffer size calculation is based on input resolution.
Input resolution was being configured after output port
format. Caused failures if switching from one JPEG resolution
to a smaller one.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Enable MJPEG encoding

Requires GPU firmware update to support MJPEG encoder.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Correct flag settings for compressed formats

Set flags field correctly on enum_fmt_vid_cap for compressed
image formats.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: H264 profile & level ctrls, FPS control and auto exp pri

Several control handling updates.
H264 profile and level controls.
Timeperframe/FPS reworked to add V4L2_CID_EXPOSURE_AUTO_PRIORITY to
select whether AE is allowed to override the framerate specified.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Correct BGR24 to RGB24 in format table

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add additional pixel formats. Correct colourspace

Adds the other flavours of YUYV, and NV12.
Corrects the overlay advertised colourspace.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Drop logging msg from info to debug

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Initial pass at scene modes.

Only supports exposure mode and metering modes.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add manual white balance control.

Adds support for V4L2_CID_RED_BALANCE and
V4L2_CID_BLUE_BALANCE. Only has an effect if
V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE has
V4L2_WHITE_BALANCE_MANUAL selected.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

config: Enable V4L / MMAL driver

V4L2: Increase the MMAL timeout to 3sec

MJPEG codec flush is now taking longer and results
in a kernel panic if the driver has stopped waiting for
the result when it finally completes.
Increase the timeout value from 1 to 3secs.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add support for setting H264_I_PERIOD

Adds support for the parameter V4L2_CID_MPEG_VIDEO_H264_I_PERIOD
to set the frequency with which I frames are produced.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Enable GPU function for removing padding from images.

GPU can now support arbitrary strides, although may require
additional processing to achieve it. Enable this feature
so that the images delivered are the size requested.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add support for V4L2_PIX_FMT_BGR32

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Set the colourspace to avoid odd YUV-RGB conversions

Removes the amiguity from the conversion routines and stops
them dropping back to the SD vs HD choice of coeffs.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Make video/still threshold a run-time param

Move the define for at what resolution the driver
switches from a video mode capture to a stills mode
capture to module parameters.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Fix incorrect pool sizing

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add option to disable enum_framesizes.

Gstreamer's handling of a driver that advertises
V4L2_FRMSIZE_TYPE_STEPWISE to define the supported
resolutions is broken. See bug
https://bugzilla.gnome.org/show_bug.cgi?id=726521

Optional parameter of gst_v4l2src_is_broken added.
If non-zero, the driver claims not to support that
ioctl, and gstreamer should be happy again (it
guesses a set of defaults for itself).

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Add support for more image formats

Adds YVU420 (YV12), YVU420SP (NV21), and BGR888.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

V4L2: Extend range for V4L2_CID_MPEG_VIDEO_H264_I_PERIOD

Request to extend the range from the fairly arbitrary
1000 frames (33 seconds at 30fps). Extend out to the
max range supported (int32 value).
Also allow 0, which is handled by the codec as only
send an I-frame on the first frame and never again.
There may be an exception if it detects a significant
scene change, but there's no easy way around that.

Signed-off-by: Dave Stevenson <dsteve@broadcom.com>

bcm2835-camera: stop_streaming now has a void return

BCM2835-V4L2: Fix compliance test failures

VIDIOC_TRY_FMT and VIDIOC_S_FMT tests were faling due
to reporting V4L2_COLORSPACE_JPEG when the colour
format wasn't V4L2_PIX_FMT_JPEG.
Now reports V4L2_COLORSPACE_SMPTE170M for YUV formats.
2015-05-18 14:10:35 +01:00
popcornmix
cefa17faeb Add Chris Boot's i2c and spi drivers.
i2c-bcm2708: fixed baudrate

Fixed issue where the wrong CDIV value was set for baudrates below 3815 Hz (for 250MHz bus clock).
In that case the computed CDIV value was more than 0xffff. However the CDIV register width is only 16 bits.
This resulted in incorrect setting of CDIV and higher baudrate than intended.
Example: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0x1704 -> 42430Hz
After correction: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0xffff -> 3815Hz
The correct baudrate is shown in the log after the cdiv > 0xffff correction.

Perform I2C combined transactions when possible

Perform I2C combined transactions whenever possible, within the
restrictions of the Broadcomm Serial Controller.

Disable DONE interrupt during TA poll

Prevent interrupt from being triggered if poll is missed and transfer
starts and finishes.

i2c: Make combined transactions optional and disabled by default
2015-05-18 14:10:34 +01:00
popcornmix
bc0639ef79 Added hwmon/thermal driver for reporting core temperature. Thanks Dorian 2015-05-18 14:10:32 +01:00
popcornmix
0ab0bffea9 Add cpufreq driver 2015-05-18 14:10:31 +01:00
Aron Szabo
e67cc0738c lirc: added support for RaspberryPi GPIO
lirc_rpi: Use read_current_timer to determine transmitter delay. Thanks to jjmz and others
See: https://github.com/raspberrypi/linux/issues/525

lirc: Remove restriction on gpio pins that can be used with lirc

Compute Module, for example could use different pins

lirc_rpi: Add parameter to specify input pin pull

Depending on the connected IR circuitry it might be desirable to change the
gpios internal pull from it pull-down default behaviour. Add a module
parameter to allow the user to set it explicitly.

Signed-off-by: Julian Scheel <julian@jusst.de>

lirc-rpi: Use the higher-level irq control functions

This module used to access the irq_chip methods of the
gpio controller directly, rather than going through the
standard enable_irq/irq_set_irq_type functions. This
caused problems on pinctrl-bcm2835 which only implements
the irq_enable/disable methods and not irq_unmask/mask.

lirc-rpi: Correct the interrupt usage

1) Correct the use of enable_irq (i.e. don't call it so often)
2) Correct the shutdown sequence.
3) Avoid a bcm2708_gpio driver quirk by setting the irq flags earlier

lirc-rpi: use getnstimeofday instead of read_current_timer

read_current_timer isn't guaranteed to return values in
microseconds, and indeed it doesn't on a Pi2.

Issue: linux#827
2015-05-18 14:10:30 +01:00
popcornmix
38c9b30c6d Add hwrng (hardware random number generator) driver 2015-05-18 14:10:29 +01:00
Tim Gover
cf3feeff47 vcsm: VideoCore shared memory service for BCM2835
Add experimental support for the VideoCore shared memory service.
This allows user processes to allocate memory from VideoCore's
GPU relocatable heap and mmap the buffers. Additionally, the memory
handles can passed to other VideoCore services such as MMAL, OpenMax
and DispmanX

TODO
* This driver was originally released for BCM28155 which has a different
  cache architecture to BCM2835. Consequently, in this release only
  uncached mappings are supported. However, there's no fundamental
  reason which cached mappings cannot be support or BCM2835
* More refactoring is required to remove the typedefs.
* Re-enable the some of the commented out debug-fs statistics which were
  disabled when migrating code from proc-fs.
* There's a lot of code to support sharing of VCSM in order to support
  Android. This could probably done more cleanly or perhaps just
  removed.

Signed-off-by: Tim Gover <timgover@gmail.com>

config: Disable VC_SM for now to fix hang with cutdown kernel

vcsm: Use boolean as it cannot be built as module

On building the bcm_vc_sm as a module we get the following error:

v7_dma_flush_range and do_munmap are undefined in vc-sm.ko.

Fix by making it not an option to build as module
2015-05-18 14:10:28 +01:00
popcornmix
82d269e37c bcm2708 vchiq driver
Signed-off-by: popcornmix <popcornmix@gmail.com>

vchiq: create_pagelist copes with vmalloc memory

Signed-off-by: Daniel Stone <daniels@collabora.com>

vchiq: fix the shim message release

Signed-off-by: Daniel Stone <daniels@collabora.com>

vchiq: export additional symbols

Signed-off-by: Daniel Stone <daniels@collabora.com>

VCHIQ: Make service closure fully synchronous (drv)

This is one half of a two-part patch, the other half of which is to
the vchiq_lib user library. With these patches, calls to
vchiq_close_service and vchiq_remove_service won't return until any
associated callbacks have been delivered to the callback thread.

VCHIQ: Add per-service tracing

The new service option VCHIQ_SERVICE_OPTION_TRACE is a boolean that
toggles tracing for the specified service.

This commit also introduces vchi_service_set_option and the associated
option VCHI_SERVICE_OPTION_TRACE.

vchiq: Make the synchronous-CLOSE logic more tolerant

vchiq: Move logging control into debugfs

vchiq: Take care of a corner case tickled by VCSM

Closing a connection that isn't fully open requires care, since one
side does not know the other side's port number. Code was present to
handle the case where a CLOSE is sent immediately after an OPEN, i.e.
before the OPENACK has been received, but this was incorrectly being
used when an OPEN from a client using port 0 was rejected.

(In the observed failure, the host was attempting to use the VCSM
service, which isn't present in the 'cutdown' firmware. The failure
was intermittent because sometimes the keepalive service would
grab port 0.)

This case can be distinguished because the client's remoteport will
still be VCHIQ_PORT_FREE, and the srvstate will be OPENING. Either
condition is sufficient to differentiate it from the special case
described above.

vchiq: Avoid high load when blocked and unkillable

vchiq: Include SIGSTOP and SIGCONT in list of signals not-masked by vchiq to allow gdb to work

vchiq_arm: Complete support for SYNCHRONOUS mode

vchiq: Remove inline from suspend/resume

vchiq: Allocation does not need to be atomic

vchiq: Fix wrong condition check

The log level is checked from within the log call. Remove the check in the call.

Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
2015-05-18 14:10:26 +01:00
popcornmix
d812b2fc4e bcm2708: alsa sound driver
Signed-off-by: popcornmix <popcornmix@gmail.com>

alsa: add mmap support and some cleanups to bcm2835 ALSA driver

snd-bcm2835: Add support for spdif/hdmi passthrough

This adds a dedicated subdevice which can be used for passthrough of non-audio
formats (ie encoded a52) through the hdmi audio link. In addition to this
driver extension an appropriate card config is required to make alsa-lib
support the AES parameters for this device.

snd-bcm2708: Add mutex, improve logging

Fix for ALSA driver crash

Avoids an issue when closing and opening vchiq where a message can arrive before service handle has been written

alsa: reduce severity of expected warning message

snd-bcm2708: Fix dmesg spam for non-error case

alsa: Ensure mutexes are released through error paths

alsa: Make interrupted close paths quieter
2015-05-18 14:10:25 +01:00
popcornmix
f9de7c31b5 cma: Add vc_cma driver to enable use of CMA
Signed-off-by: popcornmix <popcornmix@gmail.com>

vc_cma: Make the vc_cma area the default contiguous DMA area
2015-05-18 14:10:24 +01:00
gellert
968262f06b MMC: added alternative MMC driver
mmc: Disable CMD23 transfers on all cards

Pending wire-level investigation of these types of transfers
and associated errors on bcm2835-mmc, disable for now. Fallback of
CMD18/CMD25 transfers will be used automatically by the MMC layer.

Reported/Tested-by: Gellert Weisz <gellert@raspberrypi.org>

mmc: bcm2835-mmc: enable DT support for all architectures

Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
Enable Device Tree support for all architectures.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

mmc: bcm2835-mmc: fix probe error handling

Probe error handling is broken in several places.
Simplify error handling by using device managed functions.
Replace pr_{err,info} with dev_{err,info}.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:10:22 +01:00
Florian Meier
4924e14ef2 dmaengine: Add support for BCM2708
Add support for DMA controller of BCM2708 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.

Signed-off-by: Florian Meier <florian.meier@koalo.de>

dmaengine: expand functionality by supporting scatter/gather transfers sdhci-bcm2708 and dma.c: fix for LITE channels

DMA: fix cyclic LITE length overflow bug

dmaengine: bcm2708: Remove chancnt affectations

Mirror bcm2835-dma.c commit 9eba5536a7:
chancnt is already filled by dma_async_device_register, which uses the channel
list to know how much channels there is.

Since it's already filled, we can safely remove it from the drivers' probe
function.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

dmaengine: bcm2708: overwrite dreq only if it is not set

dreq is set when the DMA channel is fetched from Device Tree.
slave_id is set using dmaengine_slave_config().
Only overwrite dreq with slave_id if it is not set.

dreq/slave_id in the cyclic DMA case is not touched, because I don't
have hardware to test with.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

dmaengine: bcm2708: do device registration in the board file

Don't register the device in the driver. Do it in the board file.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

dmaengine: bcm2708: don't restrict DT support to ARCH_BCM2835

Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
Add Device Tree support to the non ARCH_BCM2835 case.
Use the same driver name regardless of architecture.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2015-05-18 14:10:21 +01:00
popcornmix
07b4138b65 bcm2708 framebuffer driver
Signed-off-by: popcornmix <popcornmix@gmail.com>

bcm2708_fb : Implement blanking support using the mailbox property interface

bcm2708_fb: Add pan and vsync controls

bcm2708_fb: DMA acceleration for fb_copyarea

Based on http://www.raspberrypi.org/phpBB3/viewtopic.php?p=62425#p62425
Also used Simon's dmaer_master module as a reference for tweaking DMA
settings for better performance.

For now busylooping only. IRQ support might be added later.
With non-overclocked Raspberry Pi, the performance is ~360 MB/s
for simple copy or ~260 MB/s for two-pass copy (used when dragging
windows to the right).

In the case of using DMA channel 0, the performance improves
to ~440 MB/s.

For comparison, VFP optimized CPU copy can only do ~114 MB/s in
the same conditions (hindered by reading uncached source buffer).

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>

bcm2708_fb: report number of dma copies

Add a counter (exported via debugfs) reporting the
number of dma copies that the framebuffer driver
has done, in order to help evaluate different
optimization strategies.

Signed-off-by: Luke Diamand <luked@broadcom.com>

bcm2708_fb: use IRQ for DMA copies

The copyarea ioctl() uses DMA to speed things along. This
was busy-waiting for completion. This change supports using
an interrupt instead for larger transfers. For small
transfers, busy-waiting is still likely to be faster.

Signed-off-by: Luke Diamand <luke@diamand.org>

bcm2708: Make ioctl logging quieter
2015-05-18 14:10:20 +01:00
popcornmix
5690b77f88 bcm2708 watchdog driver
Signed-off-by: popcornmix <popcornmix@gmail.com>
2015-05-18 14:10:19 +01:00
popcornmix
40f188fa58 Add dwc_otg driver
Signed-off-by: popcornmix <popcornmix@gmail.com>

usb: dwc: fix lockdep false positive

Signed-off-by: Kari Suvanto <karis79@gmail.com>

usb: dwc: fix inconsistent lock state

Signed-off-by: Kari Suvanto <karis79@gmail.com>

Add FIQ patch to dwc_otg driver. Enable with dwc_otg.fiq_fix_enable=1. Should give about 10% more ARM performance.
Thanks to Gordon and Costas

Avoid dynamic memory allocation for channel lock in USB driver. Thanks ddv2005.

Add NAK holdoff scheme. Enabled by default, disable with dwc_otg.nak_holdoff_enable=0. Thanks gsh

Make sure we wait for the reset to finish

dwc_otg: fix bug in dwc_otg_hcd.c resulting in silent kernel
	 memory corruption, escalating to OOPS under high USB load.

dwc_otg: Fix unsafe access of QTD during URB enqueue

In dwc_otg_hcd_urb_enqueue during qtd creation, it was possible that the
transaction could complete almost immediately after the qtd was assigned
to a host channel during URB enqueue, which meant the qtd pointer was no
longer valid having been completed and removed. Usually, this resulted in
an OOPS during URB submission. By predetermining whether transactions
need to be queued or not, this unsafe pointer access is avoided.

This bug was only evident on the Pi model A where a device was attached
that had no periodic endpoints (e.g. USB pendrive or some wlan devices).

dwc_otg: Fix incorrect URB allocation error handling

If the memory allocation for a dwc_otg_urb failed, the kernel would OOPS
because for some reason a member of the *unallocated* struct was set to
zero. Error handling changed to fail correctly.

dwc_otg: fix potential use-after-free case in interrupt handler

If a transaction had previously aborted, certain interrupts are
enabled to track error counts and reset where necessary. On IN
endpoints the host generates an ACK interrupt near-simultaneously
with completion of transfer. In the case where this transfer had
previously had an error, this results in a use-after-free on
the QTD memory space with a 1-byte length being overwritten to
0x00.

dwc_otg: add handling of SPLIT transaction data toggle errors

Previously a data toggle error on packets from a USB1.1 device behind
a TT would result in the Pi locking up as the driver never handled
the associated interrupt. Patch adds basic retry mechanism and
interrupt acknowledgement to cater for either a chance toggle error or
for devices that have a broken initial toggle state (FT8U232/FT232BM).

dwc_otg: implement tasklet for returning URBs to usbcore hcd layer

The dwc_otg driver interrupt handler for transfer completion will spend
a very long time with interrupts disabled when a URB is completed -
this is because usb_hcd_giveback_urb is called from within the handler
which for a USB device driver with complicated processing (e.g. webcam)
will take an exorbitant amount of time to complete. This results in
missed completion interrupts for other USB packets which lead to them
being dropped due to microframe overruns.

This patch splits returning the URB to the usb hcd layer into a
high-priority tasklet. This will have most benefit for isochronous IN
transfers but will also have incidental benefit where multiple periodic
devices are active at once.

dwc_otg: fix NAK holdoff and allow on split transactions only

This corrects a bug where if a single active non-periodic endpoint
had at least one transaction in its qh, on frnum == MAX_FRNUM the qh
would get skipped and never get queued again. This would result in
a silent device until error detection (automatic or otherwise) would
either reset the device or flush and requeue the URBs.

Additionally the NAK holdoff was enabled for all transactions - this
would potentially stall a HS endpoint for 1ms if a previous error state
enabled this interrupt and the next response was a NAK. Fix so that
only split transactions get held off.

dwc_otg: Call usb_hcd_unlink_urb_from_ep with lock held in completion handler

usb_hcd_unlink_urb_from_ep must be called with the HCD lock held.  Calling it
asynchronously in the tasklet was not safe (regression in
c4564d4a1a).

This change unlinks it from the endpoint prior to queueing it for handling in
the tasklet, and also adds a check to ensure the urb is OK to be unlinked
before doing so.

NULL pointer dereference kernel oopses had been observed in usb_hcd_giveback_urb
when a USB device was unplugged/replugged during data transfer.  This effect
was reproduced using automated USB port power control, hundreds of replug
events were performed during active transfers to confirm that the problem was
eliminated.

USB fix using a FIQ to implement split transactions

This commit adds a FIQ implementaion that schedules
the split transactions using a FIQ so we don't get
held off by the interrupt latency of Linux

dwc_otg: fix device attributes and avoid kernel warnings on boot

dcw_otg: avoid logging function that can cause panics

See: https://github.com/raspberrypi/firmware/issues/21
Thanks to cleverca22 for fix

dwc_otg: mask correct interrupts after transaction error recovery

The dwc_otg driver will unmask certain interrupts on a transaction
that previously halted in the error state in order to reset the
QTD error count. The various fine-grained interrupt handlers do not
consider that other interrupts besides themselves were unmasked.

By disabling the two other interrupts only ever enabled in DMA mode
for this purpose, we can avoid unnecessary function calls in the
IRQ handler. This will also prevent an unneccesary FIQ interrupt
from being generated if the FIQ is enabled.

dwc_otg: fiq: prevent FIQ thrash and incorrect state passing to IRQ

In the case of a transaction to a device that had previously aborted
due to an error, several interrupts are enabled to reset the error
count when a device responds. This has the side-effect of making the
FIQ thrash because the hardware will generate multiple instances of
a NAK on an IN bulk/interrupt endpoint and multiple instances of ACK
on an OUT bulk/interrupt endpoint. Make the FIQ mask and clear the
associated interrupts.

Additionally, on non-split transactions make sure that only unmasked
interrupts are cleared. This caused a hard-to-trigger but serious
race condition when you had the combination of an endpoint awaiting
error recovery and a transaction completed on an endpoint - due to
the sequencing and timing of interrupts generated by the dwc_otg core,
it was possible to confuse the IRQ handler.

Fix function tracing

dwc_otg: whitespace cleanup in dwc_otg_urb_enqueue

dwc_otg: prevent OOPSes during device disconnects

The dwc_otg_urb_enqueue function is thread-unsafe. In particular the
access of urb->hcpriv, usb_hcd_link_urb_to_ep, dwc_otg_urb->qtd and
friends does not occur within a critical section and so if a device
was unplugged during activity there was a high chance that the
usbcore hub_thread would try to disable the endpoint with partially-
formed entries in the URB queue. This would result in BUG() or null
pointer dereferences.

Fix so that access of urb->hcpriv, enqueuing to the hardware and
adding to usbcore endpoint URB lists is contained within a single
critical section.

dwc_otg: prevent BUG() in TT allocation if hub address is > 16

A fixed-size array is used to track TT allocation. This was
previously set to 16 which caused a crash because
dwc_otg_hcd_allocate_port would read past the end of the array.

This was hit if a hub was plugged in which enumerated as addr > 16,
due to previous device resets or unplugs.

Also add #ifdef FIQ_DEBUG around hcd->hub_port_alloc[], which grows
to a large size if 128 hub addresses are supported. This field is
for debug only for tracking which frame an allocate happened in.

dwc_otg: make channel halts with unknown state less damaging

If the IRQ received a channel halt interrupt through the FIQ
with no other bits set, the IRQ would not release the host
channel and never complete the URB.

Add catchall handling to treat as a transaction error and retry.

dwc_otg: fiq_split: use TTs with more granularity

This fixes certain issues with split transaction scheduling.

- Isochronous multi-packet OUT transactions now hog the TT until
  they are completed - this prevents hubs aborting transactions
  if they get a periodic start-split out-of-order
- Don't perform TT allocation on non-periodic endpoints - this
  allows simultaneous use of the TT's bulk/control and periodic
  transaction buffers

This commit will mainly affect USB audio playback.

dwc_otg: fix potential sleep while atomic during urb enqueue

Fixes a regression introduced with eb1b482a. Kmalloc called from
dwc_otg_hcd_qtd_add / dwc_otg_hcd_qtd_create did not always have
the GPF_ATOMIC flag set. Force this flag when inside the larger
critical section.

dwc_otg: make fiq_split_enable imply fiq_fix_enable

Failing to set up the FIQ correctly would result in
"IRQ 32: nobody cared" errors in dmesg.

dwc_otg: prevent crashes on host port disconnects

Fix several issues resulting in crashes or inconsistent state
if a Model A root port was disconnected.

- Clean up queue heads properly in kill_urbs_in_qh_list by
  removing the empty QHs from the schedule lists
- Set the halt status properly to prevent IRQ handlers from
  using freed memory
- Add fiq_split related cleanup for saved registers
- Make microframe scheduling reclaim host channels if
  active during a disconnect
- Abort URBs with -ESHUTDOWN status response, informing
  device drivers so they respond in a more correct fashion
  and don't try to resubmit URBs
- Prevent IRQ handlers from attempting to handle channel
  interrupts if the associated URB was dequeued (and the
  driver state was cleared)

dwc_otg: prevent leaking URBs during enqueue

A dwc_otg_urb would get leaked if the HCD enqueue function
failed for any reason. Free the URB at the appropriate points.

dwc_otg: Enable NAK holdoff for control split transactions

Certain low-speed devices take a very long time to complete a
data or status stage of a control transaction, producing NAK
responses until they complete internal processing - the USB2.0
spec limit is up to 500mS. This causes the same type of interrupt
storm as seen with USB-serial dongles prior to c8edb238.

In certain circumstances, usually while booting, this interrupt
storm could cause SD card timeouts.

dwc_otg: Fix for occasional lockup on boot when doing a USB reset

dwc_otg: Don't issue traffic to LS devices in FS mode

Issuing low-speed packets when the root port is in full-speed mode
causes the root port to stop responding. Explicitly fail when
enqueuing URBs to a LS endpoint on a FS bus.

Fix ARM architecture issue with local_irq_restore()

If local_fiq_enable() is called before a local_irq_restore(flags) where
the flags variable has the F bit set, the FIQ will be erroneously disabled.

Fixup arch_local_irq_restore to avoid trampling the F bit in CPSR.

Also fix some of the hacks previously implemented for previous dwc_otg
incarnations.

dwc_otg: fiq_fsm: Base commit for driver rewrite

This commit removes the previous FIQ fixes entirely and adds fiq_fsm.

This rewrite features much more complete support for split transactions
and takes into account several OTG hardware bugs. High-speed
isochronous transactions are also capable of being performed by fiq_fsm.

All driver options have been removed and replaced with:
  - dwc_otg.fiq_enable (bool)
  - dwc_otg.fiq_fsm_enable (bool)
  - dwc_otg.fiq_fsm_mask (bitmask)
  - dwc_otg.nak_holdoff (unsigned int)

Defaults are specified such that fiq_fsm behaves similarly to the
previously implemented FIQ fixes.

fiq_fsm: Push error recovery into the FIQ when fiq_fsm is used

If the transfer associated with a QTD failed due to a bus error, the HCD
would retry the transfer up to 3 times (implementing the USB2.0
three-strikes retry in software).

Due to the masking mechanism used by fiq_fsm, it is only possible to pass
a single interrupt through to the HCD per-transfer.

In this instance host channels would fall off the radar because the error
reset would function, but the subsequent channel halt would be lost.

Push the error count reset into the FIQ handler.

fiq_fsm: Implement timeout mechanism

For full-speed endpoints with a large packet size, interrupt latency
runs the risk of the FIQ starting a transaction too late in a full-speed
frame. If the device is still transmitting data when EOF2 for the
downstream frame occurs, the hub will disable the port. This change is
not reflected in the hub status endpoint and the device becomes
unresponsive.

Prevent high-bandwidth transactions from being started too late in a
frame. The mechanism is not guaranteed: a combination of bit stuffing
and hub latency may still result in a device overrunning.

fiq_fsm: fix bounce buffer utilisation for Isochronous OUT

Multi-packet isochronous OUT transactions were subject to a few bounday
bugs. Fix them.

Audio playback is now much more robust: however, an issue stands with
devices that have adaptive sinks - ALSA plays samples too fast.

dwc_otg: Return full-speed frame numbers in HS mode

The frame counter increments on every *microframe* in high-speed mode.
Most device drivers expect this number to be in full-speed frames - this
caused considerable confusion to e.g. snd_usb_audio which uses the
frame counter to estimate the number of samples played.

fiq_fsm: save PID on completion of interrupt OUT transfers

Also add edge case handling for interrupt transports.

Note that for periodic split IN, data toggles are unimplemented in the
OTG host hardware - it unconditionally accepts any PID.

fiq_fsm: add missing case for fiq_fsm_tt_in_use()

Certain combinations of bitrate and endpoint activity could
result in a periodic transaction erroneously getting started
while the previous Isochronous OUT was still active.

fiq_fsm: clear hcintmsk for aborted transactions

Prevents the FIQ from erroneously handling interrupts
on a timed out channel.

fiq_fsm: enable by default

fiq_fsm: fix dequeues for non-periodic split transactions

If a dequeue happened between the SSPLIT and CSPLIT phases of the
transaction, the HCD would never receive an interrupt.

fiq_fsm: Disable by default

fiq_fsm: Handle HC babble errors

The HCTSIZ transfer size field raises a babble interrupt if
the counter wraps. Handle the resulting interrupt in this case.

dwc_otg: fix interrupt registration for fiq_enable=0

Additionally make the module parameter conditional for wherever
hcd->fiq_state is touched.

fiq_fsm: Enable by default

dwc_otg: Fix various issues with root port and transaction errors

Process the host port interrupts correctly (and don't trample them).
Root port hotplug now functional again.

Fix a few thinkos with the transaction error passthrough for fiq_fsm.

fiq_fsm: Implement hack for Split Interrupt transactions

Hubs aren't too picky about which endpoint we send Control type split
transactions to. By treating Interrupt transfers as Control, it is
possible to use the non-periodic queue in the OTG core as well as the
non-periodic FIFOs in the hub itself. This massively reduces the
microframe exclusivity/contention that periodic split transactions
otherwise have to enforce.

It goes without saying that this is a fairly egregious USB specification
violation, but it works.

Original idea by Hans Petter Selasky @ FreeBSD.org.

dwc_otg: FIQ support on SMP. Set up FIQ stack and handler on Core 0 only.

dwc_otg: introduce fiq_fsm_spin(un|)lock()

SMP safety for the FIQ relies on register read-modify write cycles being
completed in the correct order. Several places in the DWC code modify
registers also touched by the FIQ. Protect these by a bare-bones lock
mechanism.

This also makes it possible to run the FIQ and IRQ handlers on different
cores.

fiq_fsm: fix build on bcm2708 and bcm2709 platforms

dwc_otg: put some barriers back where they should be for UP

bcm2709/dwc_otg: Setup FIQ on core 1 if >1 core active

dwc_otg: fixup read-modify-write in critical paths

Be more careful about read-modify-write on registers that the FIQ
also touches.

Guard fiq_fsm_spin_lock with fiq_enable check

fiq_fsm: Falling out of the state machine isn't fatal

This edge case can be hit if the port is disabled while the FIQ is
in the middle of a transaction. Make the effects less severe.

Also get rid of the useless return value.

squash: dwc_otg: Allow to build without SMP
2015-05-18 14:10:17 +01:00
popcornmix
520bf118a7 Add bcm2708_gpio driver
Signed-off-by: popcornmix <popcornmix@gmail.com>

bcm2708: Add extension to configure internal pulls

The bcm2708 gpio controller supports internal pulls to be used as pull-up,
pull-down or being entirely disabled. As it can be useful for a driver to
change the pull configuration from it's default pull-down state, add an
extension which allows configuring the pull per gpio.

Signed-off-by: Julian Scheel <julian@jusst.de>

bcm2708-gpio: Revert the use of pinctrl_request_gpio

In non-DT systems, pinctrl_request_gpio always fails causing
"requests probe deferral" messages. In DT systems, it isn't useful
because the reference counting is independent of the normal pinctrl
pin reservations.

gpio: Only clear the currently occurring interrupt. Avoids losing interrupts

See: linux #760

bcm2708_gpio: Avoid calling irq_unmask for all interrupts

When setting up the interrupts, specify that the handle_simple_irq
handler should be used. This leaves interrupt acknowledgement to
the caller, and prevents irq_unmask from being called for all
interrupts.

Issue: linux #760
2015-05-18 14:10:16 +01:00
popcornmix
08d998bd95 Add 2709 platform for Raspberry Pi 2 2015-05-18 14:10:15 +01:00
popcornmix
2d33619dd9 Main bcm2708 linux port
Signed-off-by: popcornmix <popcornmix@gmail.com>
2015-05-18 14:10:14 +01:00
Greg Kroah-Hartman
8b660f48b5 Linux 4.0.4 2015-05-17 09:55:21 -07:00
Lv Zheng
bb57ddb587 ACPICA: Utilities: Cleanup to remove useless ACPI_PRINTF/FORMAT_xxx helpers.
commit 1d0a0b2f6d upstream.

ACPICA commit b60612373a4ef63b64a57c124576d7ddb6d8efb6

For physical addresses, since the address may exceed 32-bit address range
after calculation, we should use 0x%8.8X%8.8X instead of ACPI_PRINTF_UINT
and ACPI_FORMAT_UINT64() instead of
ACPI_FORMAT_NATIVE_UINT()/ACPI_FORMAT_TO_UINT().

This patch also removes above replaced macros as there are no users.

This is a preparation to switch acpi_physical_address to 64-bit on 32-bit
kernel builds.

Link: https://github.com/acpica/acpica/commit/b6061237
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Lv Zheng
be3dd6dec3 ACPICA: Utilities: Cleanup to convert physical address printing formats.
commit cc2080b0e5 upstream.

ACPICA commit 7f06739db43a85083a70371c14141008f20b2198

For physical addresses, since the address may exceed 32-bit address range
after calculation, we should use %8.8X%8.8X (see ACPI_FORMAT_UINT64()) to
convert the %p formats.

This is a preparation to switch acpi_physical_address to 64-bit on 32-bit
kernel builds.

Link: https://github.com/acpica/acpica/commit/7f06739d
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Lv Zheng
9bb209af39 ACPICA: Utilities: Cleanup to enforce ACPI_PHYSADDR_TO_PTR()/ACPI_PTR_TO_PHYSADDR().
commit 6d3fd3cc33 upstream.

ACPICA commit 154f6d074dd38d6ebc0467ad454454e6c5c9ecdf

There are code pieces converting pointers using "(acpi_physical_address) x"
or "ACPI_CAST_PTR (t, x)" formats, this patch cleans up them.

Known issues:
1. Cleanup of "(ACPI_PHYSICAL_ADDRRESS) x" for a table field
   For the conversions around the table fields, it is better to fix it with
   alignment also fixed. So this patch doesn't modify such code. There
   should be no functional problem by leaving them unchanged.

Link: https://github.com/acpica/acpica/commit/154f6d07
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Lv Zheng
58cf89ca90 ACPICA: Tables: Change acpi_find_root_pointer() to use acpi_physical_address.
commit f254e3c57b upstream.

ACPICA commit 7d9fd64397d7c38899d3dc497525f6e6b044e0e3

OSPMs like Linux expect an acpi_physical_address returning value from
acpi_find_root_pointer(). This triggers warnings if sizeof (acpi_size) doesn't
equal to sizeof (acpi_physical_address):
  drivers/acpi/osl.c:275:3: warning: passing argument 1 of 'acpi_find_root_pointer' from incompatible pointer type [enabled by default]
  In file included from include/acpi/acpi.h:64:0,
                   from include/linux/acpi.h:36,
                   from drivers/acpi/osl.c:41:
  include/acpi/acpixf.h:433:1: note: expected 'acpi_size *' but argument is of type 'acpi_physical_address *'
This patch corrects acpi_find_root_pointer().

Link: https://github.com/acpica/acpica/commit/7d9fd643
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Al Viro
5d457f8182 coredump: accept any write method
commit 86cc05840a upstream.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Alexey Khoroshilov
fe33167517 sound/oss: fix deadlock in sequencer_ioctl(SNDCTL_SEQ_OUTOFBAND)
commit bc26d4d06e upstream.

A deadlock can be initiated by userspace via ioctl(SNDCTL_SEQ_OUTOFBAND)
on /dev/sequencer with TMR_ECHO midi event.

In this case the control flow is:
sound_ioctl()
-> case SND_DEV_SEQ:
   case SND_DEV_SEQ2:
     sequencer_ioctl()
     -> case SNDCTL_SEQ_OUTOFBAND:
          spin_lock_irqsave(&lock,flags);
          play_event();
          -> case EV_TIMING:
               seq_timing_event()
               -> case TMR_ECHO:
                    seq_copy_to_input()
                    -> spin_lock_irqsave(&lock,flags);

It seems that spin_lock_irqsave() around play_event() is not necessary,
because the only other call location in seq_startplay() makes the call
without acquiring spinlock.

So, the patch just removes spinlocks around play_event().
By the way, it removes unreachable code in seq_timing_event(),
since (seq_mode == SEQ_2) case is handled in the beginning.

Compile tested only.

Found by Linux Driver Verification project (linuxtesting.org).

Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Cc: Willy Tarreau <w@1wt.eu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Mark Rutland
cef320a404 ARM: 8307/1: psci: move psci firmware calls out of line
commit c097877319 upstream.

arm64 builds with GCC 5 have caused the __asmeq assertions in the PSCI
calling code to fire, so move the ARM PSCI calls out of line into their
own assembly file for consistency and to safeguard against the same
issue occuring with the 32-bit toolchain.

[will: brought into line with arm64 implementation]

Reported-by: Andy Whitcroft <apw@canonical.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Takeshi Kihara
a44d1844de mmc: sh_mmcif: Fix timeout value for command request
commit bad4371d87 upstream.

f9fd54f22e ("mmc: sh_mmcif: Use msecs_to_jiffies() for host->timeout")
changed the timeout value from 1000 jiffies to 1s. In the case where
HZ is 1000 the values are the same. However, for smaller HZ values the
timeout is now smaller, 1s instead of 10s in the case of HZ=100.

Since the timeout occurs in spite of a normal data transfer a timeout of
10s seems more appropriate. This restores the previous timeout in the
case where HZ=100 and results in an increase over the previous timeout
for larger values of HZ.

Fixes: f9fd54f22e ("mmc: sh_mmcif: Use msecs_to_jiffies() for host->timeout")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[horms: rewrote changelog to refer to HZ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:10 -07:00
Grygorii Strashko
4f61e99e28 mmc: core: add missing pm event in mmc_pm_notify to fix hib restore
commit 184af16b09 upstream.

The PM_RESTORE_PREPARE is not handled now in mmc_pm_notify(),
as result mmc_rescan() could be scheduled and executed at
late hibernation restore stages when MMC device is suspended
already - which, in turn, will lead to system crash on TI dra7-evm board:

WARNING: CPU: 0 PID: 3188 at drivers/bus/omap_l3_noc.c:148 l3_interrupt_handler+0x258/0x374()
44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER1_P3 (Idle): Data Access in User mode during Functional access

Hence, add missed PM_RESTORE_PREPARE PM event in mmc_pm_notify().

Fixes: 4c2ef25fe0 (mmc: fix all hangs related to mmc/sd card...)
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Chuanxiao Dong
6bf08adad4 mmc: card: Don't access RPMB partitions for normal read/write
commit 4e93b9a6ab upstream.

During kernel boot, it will try to read some logical sectors
of each block device node for the possible partition table.

But since RPMB partition is special and can not be accessed
by normal eMMC read / write CMDs, it will cause below error
messages during kernel boot:
...
 mmc0: Got data interrupt 0x00000002 even though no data operation was in progress.
 mmcblk0rpmb: error -110 transferring data, sector 0, nr 32, cmd response 0x900, card status 0xb00
 mmcblk0rpmb: retrying using single block read
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 mmcblk0rpmb: timed out sending r/w cmd command, card status 0x400900
 end_request: I/O error, dev mmcblk0rpmb, sector 0
 Buffer I/O error on device mmcblk0rpmb, logical block 0
 end_request: I/O error, dev mmcblk0rpmb, sector 8
 Buffer I/O error on device mmcblk0rpmb, logical block 1
 end_request: I/O error, dev mmcblk0rpmb, sector 16
 Buffer I/O error on device mmcblk0rpmb, logical block 2
 end_request: I/O error, dev mmcblk0rpmb, sector 24
 Buffer I/O error on device mmcblk0rpmb, logical block 3
...

This patch will discard the access request in eMMC queue if
it is RPMB partition access request. By this way, it avoids
trigger above error messages.

Fixes: 090d25fe22 ("mmc: core: Expose access to RPMB partition")
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Tested-by: Michael Shigorin <mike@altlinux.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Doug Anderson
d42b3f3da2 pinctrl: Don't just pretend to protect pinctrl_maps, do it for real
commit c5272a2856 upstream.

Way back, when the world was a simpler place and there was no war, no
evil, and no kernel bugs, there was just a single pinctrl lock.  That
was how the world was when (57291ce pinctrl: core device tree mapping
table parsing support) was written.  In that case, there were
instances where the pinctrl mutex was already held when
pinctrl_register_map() was called, hence a "locked" parameter was
passed to the function to indicate that the mutex was already locked
(so we shouldn't lock it again).

A few years ago in (42fed7b pinctrl: move subsystem mutex to
pinctrl_dev struct), we switched to a separate pinctrl_maps_mutex.
...but (oops) we forgot to re-think about the whole "locked" parameter
for pinctrl_register_map().  Basically the "locked" parameter appears
to still refer to whether the bigger pinctrl_dev mutex is locked, but
we're using it to skip locks of our (now separate) pinctrl_maps_mutex.

That's kind of a bad thing(TM).  Probably nobody noticed because most
of the calls to pinctrl_register_map happen at boot time and we've got
synchronous device probing.  ...and even cases where we're
asynchronous don't end up actually hitting the race too often.  ...but
after banging my head against the wall for a bug that reproduced 1 out
of 1000 reboots and lots of looking through kgdb, I finally noticed
this.

Anyway, we can now safely remove the "locked" parameter and go back to
a war-free, evil-free, and kernel-bug-free world.

Fixes: 42fed7ba44 ("pinctrl: move subsystem mutex to pinctrl_dev struct")
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Christian König
93b1ce4fd8 drm/radeon: more strictly validate the UVD codec
commit d52cdfa4a0 upstream.

MPEG 2/4 are only supported since UVD3.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Christian König
bc94b3a312 drm/radeon: make UVD handle checking more strict
commit a1b403da70 upstream.

Invalid messages can crash the hw otherwise.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Christian König
8c59e42272 drm/radeon: make VCE handle check more strict
commit 29c63fe22a upstream.

Invalid handles can crash the hw.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
monk.liu
3acd0d2a53 drm/radeon: fix userptr BO unpin bug v3
commit db12973cd5 upstream.

Fixing a memory leak with userptrs.

v2: clean up the loop, use an iterator instead
v3: remove unused variable

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Alex Deucher
88c4cb28e3 drm/radeon: don't setup audio on asics that don't support it
commit d73a824acc upstream.

bug: https://bugzilla.kernel.org/show_bug.cgi?id=97701

Reported-by: Mikael Pettersson <mikpelinux@gmail.com>
Tested-by: Mikael Pettersson <mikpelinux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Christian König
a0db475d77 drm/radeon: disable semaphores for UVD V1 (v2)
commit 013ead48a8 upstream.

Hardware doesn't seem to work correctly, just block userspace in this case.

v2: add missing defines

Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=85320

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Xihan Zhang
ac7e07c8a8 drm/amdkfd: Initialize sdma vm when creating sdma queue
commit 79b066bd76 upstream.

This patch fixes a bug where sdma vm wasn't initialized when
an sdma queue was created in HWS mode.

This caused GPUVM faults to appear on dmesg and it is one of the
causes that SDMA queues are not working.

Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>
Reviewed-by: Ben Goz <ben.goz@amd.comt>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Oded Gabbay
5d7e0bf007 drm/amdkfd: allow unregister process with queues
commit 1e5ec956a0 upstream.

Sometimes we might unregister process that have queues, because we couldn't
preempt the queues. Until now we blocked it with BUG_ON but instead just
print it as debug.

Reviewed-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Jani Nikula
d226dcb5a7 drm/i915/dp: there is no audio on port A
commit 9fcb1704d1 upstream.

The eDP port A register on PCH split platforms has a slightly different
register layout from the other ports, with bit 6 being either alternate
scrambler reset or reserved, depending on the generation. Our
misinterpretation of the bit as audio has lead to warning.

Fix this by not enabling audio on port A, since none of our platforms
support audio on port A anyway.

v2: DDI doesn't have audio on port A either (Sivakumar Thulasimani)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89958
Reported-and-tested-by: Chris Bainbridge <chris.bainbridge@gmail.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Lukas Wunner
926ccf94d9 drm/i915: Add missing MacBook Pro models with dual channel LVDS
commit 3916e3fd81 upstream.

Single channel LVDS maxes out at 112 MHz. The 15" pre-retina models
shipped with 1440x900 (106 MHz) by default or 1680x1050 (119 MHz)
as a BTO option, both versions used dual channel LVDS even though
the smaller one would have fit into a single channel.

Notes:
  Bug report showing that the MacBookPro8,2 with 1440x900 uses dual
  channel LVDS (this lead to it being hardcoded in intel_lvds.c by
  Daniel Vetter with commit 618563e394):
    https://bugzilla.kernel.org/show_bug.cgi?id=42842

  If i915.lvds_channel_mode=2 is missing even though the machine needs
  it, every other vertical line is white and consequently, only the left
  half of the screen is visible (verified by myself on a MacBookPro9,1).

  Forum posting concerning a MacBookPro6,2 with 1440x900, author is
  using i915.lvds_channel_mode=2 on the kernel command line, proving
  that the machine uses dual channels:
    https://bbs.archlinux.org/viewtopic.php?id=185770

  Chi Mei N154C6-L04 with 1440x900 is a replacement panel for all
  MacBook Pro "A1286" models, and that model number encompasses the
  MacBookPro6,2 / 8,2 / 9,1. Page 17 of the panel's datasheet shows it's
  driven with dual channel LVDS:
    http://www.ebay.com/itm/-/400690878560
    http://www.everymac.com/ultimate-mac-lookup/?search_keywords=A1286
    http://www.taopanel.com/chimei/datasheet/N154C6-L04.pdf

  Those three 15" models, MacBookPro6,2 / 8,2 / 9,1, are the only ones
  with i915 graphics and dual channel LVDS, so that list should be
  complete. And the 8,2 is already in intel_lvds.c.

  Possible motivation to use dual channel LVDS even on the 1440x900
  models: Reduce the number of different parts, i.e. use identical logic
  boards and display cabling on both versions and the only differing
  component is the panel.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Jani Nikula <jani.nikula@intel.com>
[Jani: included notes in the commit message for posterity]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:09 -07:00
Lukas Wunner
09af0842da drm/i915: Assume dual channel LVDS if pixel clock necessitates it
commit 6f317cfe42 upstream.

Single channel LVDS maxes out at 112 MHz, anything above must be dual
channel. This avoids the need to specify i915.lvds_channel_mode=2 on
all 17" MacBook Pro models with i915 graphics since they had 1920x1200
(193 MHz), plus those 15" pre-retina models which had a resolution
of 1680x1050 (119 MHz) as a BTO option.

Source for 112 MHz limit of single channel LVDS is section 2.3 of:
https://01.org/linuxgraphics/sites/default/files/documentation/ivb_ihd_os_vol3_part4.pdf

v2: Avoid hardcoding 17" models by assuming dual channel LVDS if the
resolution necessitates it, suggested by Jani Nikula.

v3: Fix typo, thanks Joonas Lahtinen.

v4: Split commit in two, suggested by Ville Syrjälä.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Tested-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[Jani: included spec reference into the commit message]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Mario Kleiner
fcfb5aa246 drm: Zero out invalid vblank timestamp in drm_update_vblank_count.
commit fdb68e09bb upstream.

Since commit 844b03f277 we make
sure that after vblank irq off, we return the last valid
(vblank count, vblank timestamp) pair to clients, e.g., during
modesets, which is good.

An overlooked side effect of that commit for kms drivers without
support for precise vblank timestamping is that at vblank irq
enable, when we update the vblank counter from the hw counter, we
can't update the corresponding vblank timestamp, so now we have a
totally mismatched timestamp for the new count to confuse clients.

Restore old client visible behaviour from before Linux 3.17, but
zero out the timestamp at vblank counter update (instead of disable
as in original implementation) if we can't generate a meaningful
timestamp immediately for the new vblank counter. This will fix
this regression, so callers know they need to retry again later
if they need a valid timestamp, but at the same time preserves
the improvements made in the commit mentioned above.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: <stable@vger.kernel.org> #v3.17+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-17 09:55:08 -07:00
Ulf Hansson
a314c7d8d9 ARM: ux500: Enable GPIO regulator for SD-card for snowball
commit 11133db7a8 upstream.

Fixes: c94a4ab7af ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Ulf Hansson
23e40bdd23 ARM: ux500: Enable GPIO regulator for SD-card for HREF boards
commit f9a8c3914b upstream.

Fixes: c94a4ab7af ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Ulf Hansson
5b7357fcc7 ARM: ux500: Move GPIO regulator for SD-card into board DTSs
commit 53d2669844 upstream.

The GPIO regulator for the SD-card isn't a ux500 SOC configuration, but
instead it's specific to the board. Move the definition of it, into the
board DTSs.

Fixes: c94a4ab7af ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Nicolas Schichan
bded946f04 ARM: net fix emit_udiv() for BPF_ALU | BPF_DIV | BPF_K intruction.
commit 19fc99d0c6 upstream.

In that case, emit_udiv() will be called with rn == ARM_R0 (r_scratch)
and loading rm first into ARM_R0 will result in jit_udiv() function
being called the same dividend and divisor. Fix that by loading rn
first into ARM_R1 and then rm into ARM_R0.

Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Fixes: aee636c480 (bpf: do not use reciprocal divide)
Acked-by: Mircea Gherzan <mgherzan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Tony Lindgren
56dc2df8fc ARM: OMAP2+: Fix omap off idle power consumption creeping up
commit 102bcb6ed2 upstream.

If we use a combination of VMODE and I2C4 for retention modes,
eventually the off idle power consumption will creep up by about
23mW, even during off mode with I2C4 always staying enabled.

Turns out this is because of erratum i531 "Extra Power Consumed
When Repeated Start Operation Mode Is Enabled on I2C Interface
Dedicated for Smart Reflex (I2C4)" as pointed out by Nishanth
Menon <nm@ti.com>.

Let's fix the issue by adding i2c_cfg_clear_mask for the bits
to clear when initializing the I2C4 adapter so we can clear
SREN bit that drives the I2C4 lines low otherwise when there
is no traffic.

Fixes: 3b8c4ebb76 ("ARM: OMAP3: Fix idle mode signaling for
sys_clkreq and sys_off_mode")
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Gregory CLEMENT
88ace8b32a ARM: mvebu: armada-xp-openblocks-ax3-4: Disable internal RTC
commit 750e30d407 upstream.

There is no crystal connected to the internal RTC on the Open Block
AX3. So let's disable it in order to prevent the kernel probing the
driver uselessly. Eventually this patches removes the following
warning message from the boot log:
"rtc-mv d0010300.rtc: internal RTC not ticking"

Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Fabio Estevam
6d3471e5c6 ARM: dts: imx23-olinuxino: Fix polarity of LED GPIO
commit cfe8c59762 upstream.

On imx23-olinuxino the LED turns on when level logic high is aplied to
GPIO2_1.

Fix the gpios property accordingly.

Fixes: b34aa18502 ("ARM: dts: imx23-olinuxino: Remove unneeded "default-on"")
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Stefan Wahren
0559366f72 ARM: dts: imx23-olinuxino: Fix dr_mode of usb0
commit 0fdebe1a2f upstream.

The dr_mode of usb0 on imx233-olinuxino is left to default "otg".
Since the green LED (GPIO2_1) on imx233-olinuxino is connected to the
same pin as USB_OTG_ID it's possible to disable USB host by LED toggling:

echo 0 > /sys/class/leds/green/brightness
[ 1068.890000] ci_hdrc ci_hdrc.0: remove, state 1
[ 1068.890000] usb usb1: USB disconnect, device number 1
[ 1068.920000] usb 1-1: USB disconnect, device number 2
[ 1068.920000] usb 1-1.1: USB disconnect, device number 3
[ 1069.070000] usb 1-1.2: USB disconnect, device number 4
[ 1069.450000] ci_hdrc ci_hdrc.0: USB bus 1 deregistered
[ 1074.460000] ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11

This patch fixes the issue by setting dr_mode to "host" in the dts file.

Reported-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Peter Chen <peter.chen@freescale.com>
Fixes: b493129482 ("ARM: dts: imx23-olinuxino: Add USB host support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Marek Vasut
159bf42cce ARM: dts: imx28: Fix AUART4 TX-DMA interrupt name
commit 4ada77e37a upstream.

Fix a typo in the TX DMA interrupt name for AUART4.
This patch makes AUART4 operational again.

Signed-off-by: Marek Vasut <marex@denx.de>
Fixes: f30fb03d4d ("ARM: dts: add generic DMA device tree binding for mxs-dma")
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Philipp Zabel
ee2fbf0871 ARM: dts: imx6: phyFLEX: USB VBUS control is active-high
commit 7f8d49dcc6 upstream.

The fixed-regulator bindings require a separate property enable-active-high,
the standard gpio phandle property polarity setting is ignored.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Fixes: 4fe69a934b ("ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Markus Pargmann
4cabf902ee ARM: dts: imx25: Add #pwm-cells to pwm4
commit f90d3f0d0a upstream.

The property '#pwm-cells' is currently missing. It is not possible to
use pwm4 without this property.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Fixes: 5658a68fb5 ("ARM i.MX25: Add devicetree")
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Pavel Machek
da277d2b51 ARM: dts: OMAP3-N900: Add microphone bias voltages
commit 1819e3034e upstream.

N900 audio recording needs that codec provides bias voltage for integrated
digital microphone and headset microphone depending which one is used.
Digital microphone uses 2 V bias and it comes from the codec A part. Codec
B part drives the headset microphone bias and that is set to 2.5 V.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
[Jarkko: Headset mic bias changed to 2 (2.5 V) as it was before commit
e2e8bfdf61 ("ASoC: tlv320aic3x: Convert mic bias to a supply widget")]
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:08 -07:00
Ming Lei
69f3181a88 blk-mq: fix CPU hotplug handling
commit 2a34c0872a upstream.

hctx->tags has to be set as NULL in case that it is to be unmapped
no matter if set->tags[hctx->queue_num] is NULL or not in blk_mq_map_swqueue()
because shared tags can be freed already from another request queue.

The same situation has to be considered during handling CPU online too.
Unmapped hw queue can be remapped after CPU topo is changed, so we need
to allocate tags for the hw queue in blk_mq_map_swqueue(). Then tags
allocation for hw queue can be removed in hctx cpu online notifier, and it
is reasonable to do that after mapping is updated.

Reported-by: Dongsu Park <dongsu.park@profitbricks.com>
Tested-by: Dongsu Park <dongsu.park@profitbricks.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Ming Lei
f7bbf3add4 blk-mq: fix race between timeout and CPU hotplug
commit f054b56c95 upstream.

Firstly during CPU hotplug, even queue is freezed, timeout
handler still may come and access hctx->tags, which may cause
use after free, so this patch deactivates timeout handler
inside CPU hotplug notifier.

Secondly, tags can be shared by more than one queues, so we
have to check if the hctx has been unmapped, otherwise
still use-after-free on tags can be triggered.

Reported-by: Dongsu Park <dongsu.park@profitbricks.com>
Tested-by: Dongsu Park <dongsu.park@profitbricks.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
NeilBrown
a45c1c367c block: destroy bdi before blockdev is unregistered.
commit 6cd18e711d upstream.

Because of the peculiar way that md devices are created (automatically
when the device node is opened), a new device can be created and
registered immediately after the
	blk_unregister_region(disk_devt(disk), disk->minors);
call in del_gendisk().

Therefore it is important that all visible artifacts of the previous
device are removed before this call.  In particular, the 'bdi'.

Since:
commit c4db59d31e
Author: Christoph Hellwig <hch@lst.de>
    fs: don't reassign dirty inodes to default_backing_dev_info

moved the
   device_unregister(bdi->dev);
call from bdi_unregister() to bdi_destroy() it has been quite easy to
lose a race and have a new (e.g.) "md127" be created after the
blk_unregister_region() call and before bdi_destroy() is ultimately
called by the final 'put_disk', which must come after del_gendisk().

The new device finds that the bdi name is already registered in sysfs
and complains

> [ 9627.630029] WARNING: CPU: 18 PID: 3330 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x5a/0x70()
> [ 9627.630032] sysfs: cannot create duplicate filename '/devices/virtual/bdi/9:127'

We can fix this by moving the bdi_destroy() call out of
blk_release_queue() (which can happen very late when a refcount
reaches zero) and into blk_cleanup_queue() - which happens exactly when the md
device driver calls it.

Then it is only necessary for md to call blk_cleanup_queue() before
del_gendisk().  As loop.c devices are also created on demand by
opening the device node, we make the same change there.

Fixes: c4db59d31e
Reported-by: Azat Khuzhin <a3at.mail@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: NeilBrown <neilb@suse.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Rabin Vincent
be4f5647b9 Revert "dm crypt: fix deadlock when async crypto algorithm returns -EBUSY"
commit c0403ec0bb upstream.

This reverts Linux 4.1-rc1 commit 0618764cb2.

The problem which that commit attempts to fix actually lies in the
Freescale CAAM crypto driver not dm-crypt.

dm-crypt uses CRYPTO_TFM_REQ_MAY_BACKLOG.  This means the the crypto
driver should internally backlog requests which arrive when the queue is
full and process them later.  Until the crypto hw's queue becomes full,
the driver returns -EINPROGRESS.  When the crypto hw's queue if full,
the driver returns -EBUSY, and if CRYPTO_TFM_REQ_MAY_BACKLOG is set, is
expected to backlog the request and process it when the hardware has
queue space.  At the point when the driver takes the request from the
backlog and starts processing it, it calls the completion function with
a status of -EINPROGRESS.  The completion function is called (for a
second time, in the case of backlogged requests) with a status/err of 0
when a request is done.

Crypto drivers for hardware without hardware queueing use the helpers,
crypto_init_queue(), crypto_enqueue_request(), crypto_dequeue_request()
and crypto_get_backlog() helpers to implement this behaviour correctly,
while others implement this behaviour without these helpers (ccp, for
example).

dm-crypt (before the patch that needs reverting) uses this API
correctly.  It queues up as many requests as the hw queues will allow
(i.e. as long as it gets back -EINPROGRESS from the request function).
Then, when it sees at least one backlogged request (gets -EBUSY), it
waits till that backlogged request is handled (completion gets called
with -EINPROGRESS), and then continues.  The references to
af_alg_wait_for_completion() and af_alg_complete() in that commit's
commit message are irrelevant because those functions only handle one
request at a time, unlink dm-crypt.

The problem is that the Freescale CAAM driver, which that commit
describes as having being tested with, fails to implement the
backlogging behaviour correctly.  In cam_jr_enqueue(), if the hardware
queue is full, it simply returns -EBUSY without backlogging the request.
What the observed deadlock was is not described in the commit message
but it is obviously the wait_for_completion() in crypto_convert() where
dm-crypto would wait for the completion being called with -EINPROGRESS
in the case of backlogged requests.  This completion will never be
completed due to the bug in the CAAM driver.

Commit 0618764cb2 incorrectly made dm-crypt wait for every request,
even when the driver/hardware queues are not full, which means that
dm-crypt will never see -EBUSY.  This means that that commit will cause
a performance regression on all crypto drivers which implement the API
correctly.

Revert it.  Correct backlog handling should be implemented in the CAAM
driver instead.

Cc'ing stable purely because commit 0618764cb2 did.  If for some reason
a stable@ kernel did pick up commit 0618764cb2 it should get reverted.

Signed-off-by: Rabin Vincent <rabin.vincent@axis.com>
Reviewed-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Ben Hutchings
8c54e6820b xen-pciback: Add name prefix to global 'permissive' variable
commit 8014bcc86e upstream.

The variable for the 'permissive' module parameter used to be static
but was recently changed to be extern.  This puts it in the kernel
global namespace if the driver is built-in, so its name should begin
with a prefix identifying the driver.

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Fixes: af6fc858a3 ("xen-pciback: limit guest control of command register")
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Boris Ostrovsky
76762611f6 xen/events: Set irq_info->evtchn before binding the channel to CPU in __startup_pirq()
commit 16e6bd5970 upstream.

.. because bind_evtchn_to_cpu(evtchn, cpu) will map evtchn to
'info' and pass 'info' down to xen_evtchn_port_bind_to_cpu().

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Tested-by: Annie Li <annie.li@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Boris Ostrovsky
6cd7c4aa82 xen/console: Update console event channel on resume
commit b9d934f27c upstream.

After a resume the hypervisor/tools may change console event
channel number. We should re-query it.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Boris Ostrovsky
2a4de06fb5 xen/xenbus: Update xenbus event channel on resume
commit 16f1cf3ba7 upstream.

After a resume the hypervisor/tools may change xenbus event
channel number. We should re-query it.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Boris Ostrovsky
59d5ac0fdb xen/events: Clear cpu_evtchn_mask before resuming
commit 5cec988349 upstream.

When a guest is resumed, the hypervisor may change event channel
assignments. If this happens and the guest uses 2-level events it
is possible for the interrupt to be claimed by wrong VCPU since
cpu_evtchn_mask bits may be stale. This can happen even though
evtchn_2l_bind_to_cpu() attempts to clear old bits: irq_info that
is passed in is not necessarily the original one (from pre-migration
times) but instead is freshly allocated during resume and so any
information about which CPU the channel was bound to is lost.

Thus we should clear the mask during resume.

We also need to make sure that bits for xenstore and console channels
are set when these two subsystems are resumed. While rebind_evtchn_irq()
(which is invoked for both of them on a resume) calls irq_set_affinity(),
the latter will in fact postpone setting affinity until handling the
interrupt. But because cpu_evtchn_mask will have bits for these two
cleared we won't be able to take the interrupt.

With that in mind, we need to bind those two channels explicitly in
rebind_evtchn_irq(). We will keep irq_set_affinity() so that we have a
pass through generic irq affinity code later, in case something needs
to be updated there as well.

(Also replace cpumask_of(0) with cpumask_of(info->cpu) in
rebind_evtchn_irq(): it should be set to zero in preceding
xen_irq_info_evtchn_setup().)

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reported-by: Annie Li <annie.li@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Alex Williamson
30026d29b7 vfio: Fix runaway interruptible timeout
commit db7d4d7f40 upstream.

Commit 13060b64b8 ("vfio: Add and use device request op for vfio
bus drivers") incorrectly makes use of an interruptible timeout.
When interrupted, the signal remains pending resulting in subsequent
timeouts occurring instantly.  This makes the loop spin at a much
higher rate than intended.

Instead of making this completely non-interruptible, we can change
this into a sort of interruptible-once behavior and use the "once"
to log debug information.  The driver API doesn't allow us to abort
and return an error code.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Fixes: 13060b64b8
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Hans Verkuil
6eff668b18 marvell-ccic: fix Y'CbCr ordering
commit 2a700d8edf upstream.

Various formats had their byte ordering implemented incorrectly, and
the V4L2_PIX_FMT_UYVY is actually impossible to create, instead you
get V4L2_PIX_FMT_YVYU.

This was working before commit ad6ac45222
("add new formats support for marvell-ccic driver"). That commit broke
the original format support and the OLPC XO-1 laptop showed wrong
colors ever since (if you are crazy enough to attempt to run the latest
kernel on it, like I did).

The email addresses of the authors of that patch are no longer valid,
so without a way to reach them and ask them about their test setup
I am going with what I can test on the OLPC laptop.

If this breaks something for someone on their non-OLPC setup, then
contact the linux-media mailinglist. My suspicion however is that
that commit went in untested.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Naoya Horiguchi
b0108b0d7b mm: soft-offline: fix num_poisoned_pages counting on concurrent events
commit 602498f9aa upstream.

If multiple soft offline events hit one free page/hugepage concurrently,
soft_offline_page() can handle the free page/hugepage multiple times,
which makes num_poisoned_pages counter increased more than once.  This
patch fixes this wrong counting by checking TestSetPageHWPoison for normal
papes and by checking the return value of dequeue_hwpoisoned_huge_page()
for hugepages.

Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Acked-by: Dean Nelson <dnelson@redhat.com>
Cc: Andi Kleen <andi@firstfloor.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Tejun Heo
ae2aafcf1a writeback: use |1 instead of +1 to protect against div by zero
commit 464d1387ac upstream.

mm/page-writeback.c has several places where 1 is added to the divisor
to prevent division by zero exceptions; however, if the original
divisor is equivalent to -1, adding 1 leads to division by zero.

There are three places where +1 is used for this purpose - one in
pos_ratio_polynom() and two in bdi_position_ratio().  The second one
in bdi_position_ratio() actually triggered div-by-zero oops on a
machine running a 3.10 kernel.  The divisor is

  x_intercept - bdi_setpoint + 1 == span + 1

span is confirmed to be (u32)-1.  It isn't clear how it ended up that
but it could be from write bandwidth calculation underflow fixed by
c72efb658f ("writeback: fix possible underflow in write bandwidth
calculation").

At any rate, +1 isn't a proper protection against div-by-zero.  This
patch converts all +1 protections to |1.  Note that
bdi_update_dirty_ratelimit() was already using |1 before this patch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Jens Axboe <axboe@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:07 -07:00
Al Viro
335d3678d6 path_openat(): fix double fput()
commit f15133df08 upstream.

path_openat() jumps to the wrong place after do_tmpfile() - it has
already done path_cleanup() (as part of path_lookupat() called by
do_tmpfile()), so doing that again can lead to double fput().

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Naoya Horiguchi
f0091a53b5 mm/memory-failure: call shake_page() when error hits thp tail page
commit 09789e5de1 upstream.

Currently memory_failure() calls shake_page() to sweep pages out from
pcplists only when the victim page is 4kB LRU page or thp head page.
But we should do this for a thp tail page too.

Consider that a memory error hits a thp tail page whose head page is on
a pcplist when memory_failure() runs.  Then, the current kernel skips
shake_pages() part, so hwpoison_user_mappings() returns without calling
split_huge_page() nor try_to_unmap() because PageLRU of the thp head is
still cleared due to the skip of shake_page().

As a result, me_huge_page() runs for the thp, which is broken behavior.

One effect is a leak of the thp.  And another is to fail to isolate the
memory error, so later access to the error address causes another MCE,
which kills the processes which used the thp.

This patch fixes this problem by calling shake_page() for thp tail case.

Fixes: 385de35722 ("thp: allow a hwpoisoned head page to be put back to LRU")
Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Acked-by: Dean Nelson <dnelson@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Eric W. Biederman
f8cf2bd9df mnt: Fix fs_fully_visible to verify the root directory is visible
commit 7e96c1b0e0 upstream.

This fixes a dumb bug in fs_fully_visible that allows proc or sys to
be mounted if there is a bind mount of part of /proc/ or /sys/ visible.

Reported-by: Eric Windisch <ewindisch@docker.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Johan Hovold
1791458ce0 gpio: sysfs: fix memory leaks and device hotplug
commit 483d821108 upstream.

Unregister GPIOs requested through sysfs at chip remove to avoid leaking
the associated memory and sysfs entries.

The stale sysfs entries prevented the gpio numbers from being exported
when the gpio range was later reused (e.g. at device reconnect).

This also fixes the related module-reference leak.

Note that kernfs makes sure that any on-going sysfs operations finish
before the class devices are unregistered and that further accesses
fail.

The chip exported flag is used to prevent gpiod exports during removal.
This also makes it harder to trigger, but does not fix, the related race
between gpiochip_remove and export_store, which is really a race with
gpiod_request that needs to be addressed separately.

Also note that this would prevent the crashes (e.g. NULL-dereferences)
at reconnect that affects pre-3.18 kernels, as well as use-after-free on
operations on open attribute files on pre-3.14 kernels (prior to
kernfs).

Fixes: d8f388d8dc ("gpio: sysfs interface")
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Jason Gunthorpe
6a07da8c28 RDMA/CMA: Canonize IPv4 on IPV6 sockets properly
commit 285214409a upstream.

When accepting a new IPv4 connect to an IPv6 socket, the CMA tries to
canonize the address family to IPv4, but does not properly process
the listening sockaddr to get the listening port, and does not properly
set the address family of the canonized sockaddr.

Fixes: e51060f08a ("IB: IP address based RDMA connection manager")

Reported-By: Yotam Kenneth <yotamke@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Tested-by: Haggai Eran <haggaie@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Ryusuke Konishi
d6e5098a4a nilfs2: fix sanity check of btree level in nilfs_btree_root_broken()
commit d8fd150fe3 upstream.

The range check for b-tree level parameter in nilfs_btree_root_broken()
is wrong; it accepts the case of "level == NILFS_BTREE_LEVEL_MAX" even
though the level is limited to values in the range of 0 to
(NILFS_BTREE_LEVEL_MAX - 1).

Since the level parameter is read from storage device and used to index
nilfs_btree_path array whose element count is NILFS_BTREE_LEVEL_MAX, it
can cause memory overrun during btree operations if the boundary value
is set to the level parameter on device.

This fixes the broken sanity check and adds a comment to clarify that
the upper bound NILFS_BTREE_LEVEL_MAX is exclusive.

Signed-off-by: Ryusuke Konishi <konishi.ryusuke@lab.ntt.co.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Gregory CLEMENT
d3992fd381 rtc: armada38x: fix concurrency access in armada38x_rtc_set_time
commit 489405fe5e upstream.

While setting the time, the RTC TIME register should not be accessed.
However due to hardware constraints, setting the RTC time involves
sleeping during 100ms.  This sleep was done outside the critical section
protected by the spinlock, so it was possible to read the RTC TIME
register and get an incorrect value.  This patch introduces a mutex for
protecting the RTC TIME access, unlike the spinlock it is allowed to
sleep in a critical section protected by a mutex.

The RTC STATUS register can still be used from the interrupt handler but
it has no effect on setting the time.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Junxiao Bi
1fff73f21b ocfs2: dlm: fix race between purge and get lock resource
commit b1432a2a35 upstream.

There is a race window in dlm_get_lock_resource(), which may return a
lock resource which has been purged.  This will cause the process to
hang forever in dlmlock() as the ast msg can't be handled due to its
lock resource not existing.

    dlm_get_lock_resource {
        ...
        spin_lock(&dlm->spinlock);
        tmpres = __dlm_lookup_lockres_full(dlm, lockid, namelen, hash);
        if (tmpres) {
             spin_unlock(&dlm->spinlock);
             >>>>>>>> race window, dlm_run_purge_list() may run and purge
                              the lock resource
             spin_lock(&tmpres->spinlock);
             ...
             spin_unlock(&tmpres->spinlock);
        }
    }

Signed-off-by: Junxiao Bi <junxiao.bi@oracle.com>
Cc: Joseph Qi <joseph.qi@huawei.com>
Cc: Mark Fasheh <mfasheh@suse.com>
Cc: Joel Becker <jlbec@evilplan.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Witold Szczeponik
9c998de5e6 ACPI / PNP: add two IDs to list for PNPACPI device enumeration
commit 622532bb2f upstream.

Commit eec15edbb0 (ACPI / PNP: use device ID list for PNPACPI device
enumeration) changed the way how ACPI devices are enumerated and when
they are added to the PNP bus.

However, it broke the sound card support on (at least) a vintage
IBM ThinkPad 600E: with said commit applied, two of the necessary
"CSC01xx" devices are not added to the PNP bus and hence can not be
found during the initialization of the "snd-cs4236" module.  As a
consequence, loading "snd-cs4236" causes null pointer exceptions.
The attached patch fixes the problem end re-enables sound on the
IBM ThinkPad 600E.

Fixes: eec15edbb0 (ACPI / PNP: use device ID list for PNPACPI device enumeration)
Signed-off-by: Witold Szczeponik <Witold.Szczeponik@gmx.net>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Jiang Liu
317e6bf623 x86/PCI/ACPI: Make all resources except [io 0xcf8-0xcff] available on PCI bus
commit 2c62e8492e upstream.

An IO port or MMIO resource assigned to a PCI host bridge may be
consumed by the host bridge itself or available to its child
bus/devices. The ACPI specification defines a bit (Producer/Consumer)
to tell whether the resource is consumed by the host bridge itself,
but firmware hasn't used that bit consistently, so we can't rely on it.

Before commit 593669c2ac ("x86/PCI/ACPI: Use common ACPI resource
interfaces to simplify implementation"), arch/x86/pci/acpi.c ignored
all IO port resources defined by acpi_resource_io and
acpi_resource_fixed_io to filter out IO ports consumed by the host
bridge itself.

Commit 593669c2ac ("x86/PCI/ACPI: Use common ACPI resource interfaces
to simplify implementation") started accepting all IO port and MMIO
resources, which caused a regression that IO port resources consumed
by the host bridge itself became available to its child devices.

Then commit 63f1789ec7 ("x86/PCI/ACPI: Ignore resources consumed by
host bridge itself") ignored resources consumed by the host bridge
itself by checking the IORESOURCE_WINDOW flag, which accidently removed
MMIO resources defined by acpi_resource_memory24, acpi_resource_memory32
and acpi_resource_fixed_memory32.

On x86 and IA64 platforms, all IO port and MMIO resources are assumed
to be available to child bus/devices except one special case:
    IO port [0xCF8-0xCFF] is consumed by the host bridge itself
    to access PCI configuration space.

So explicitly filter out PCI CFG IO ports[0xCF8-0xCFF]. This solution
will also ease the way to consolidate ACPI PCI host bridge common code
from x86, ia64 and ARM64.

Related ACPI table are archived at:
https://bugzilla.kernel.org/show_bug.cgi?id=94221

Related discussions at:
http://patchwork.ozlabs.org/patch/461633/
https://lkml.org/lkml/2015/3/29/304

Fixes: 63f1789ec7 (Ignore resources consumed by host bridge itself)
Reported-by: Bernhard Thaler <bernhard.thaler@wvnet.at>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Chris Bainbridge
9b03ffb244 ACPI / SBS: Add 5 us delay to fix SBS hangs on MacBook
commit 3349fb64b2 upstream.

Commit 7bc5a2bad0 'ACPI: Support _OSI("Darwin") correctly' caused
the MacBook firmware to expose the SBS, resulting in intermittent
hangs of several minutes on boot, and failure to detect or report
the battery.  Fix this by adding a 5 us delay to the start of each
SMBUS transaction.  This timing is the result of experimentation -
hangs were observed with 3 us but never with 5 us.

Fixes: 7bc5a2bad0 'ACPI: Support _OSI("Darwin") correctly'
Link: https://bugzilla.kernel.org/show_bug.cgi?id=94651
Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com>
Cc: 3.18+ <stable@vger.kernel.org> # 3.18+
[ rjw: Subject and changelog ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
Tahsin Erdogan
76ccf3828a x86/spinlocks: Fix regression in spinlock contention detection
commit e8a4a2696f upstream.

A spinlock is regarded as contended when there is at least one waiter.
Currently, the code that checks whether there are any waiters rely on
tail value being greater than head. However, this is not true if tail
reaches the max value and wraps back to zero, so arch_spin_is_contended()
incorrectly returns 0 (not contended) when tail is smaller than head.

The original code (before regression) handled this case by casting the
(tail - head) to an unsigned value. This change simply restores that
behavior.

Fixes: d6abfdb202 ("x86/spinlocks/paravirt: Fix memory corruption on unlock")
Signed-off-by: Tahsin Erdogan <tahsin@google.com>
Cc: peterz@infradead.org
Cc: Waiman.Long@hp.com
Cc: borntraeger@de.ibm.com
Cc: oleg@redhat.com
Cc: raghavendra.kt@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1430799331-20445-1-git-send-email-tahsin@google.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-17 09:55:06 -07:00
649 changed files with 292231 additions and 3827 deletions

View File

@@ -38,7 +38,7 @@ dma_apbx: dma-apbx@80024000 {
80 81 68 69
70 71 72 73
74 75 76 77>;
interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
"saif0", "saif1", "i2c0", "i2c1",
"auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
"auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";

View File

@@ -0,0 +1,60 @@
BCM2835 (aka Raspberry Pi) V4L2 driver
======================================
1. Copyright
============
Copyright © 2013 Raspberry Pi (Trading) Ltd.
2. License
==========
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
3. Quick Start
==============
You need a version 1.0 or later of v4l2-ctl, available from:
git://git.linuxtv.org/v4l-utils.git
$ sudo modprobe bcm2835-v4l2
Turn on the overlay:
$ v4l2-ctl --overlay=1
Turn off the overlay:
$ v4l2-ctl --overlay=0
Set the capture format for video:
$ v4l2-ctl --set-fmt-video=width=1920,height=1088,pixelformat=4
(Note: 1088 not 1080).
Capture:
$ v4l2-ctl --stream-mmap=3 --stream-count=100 --stream-to=somefile.h264
Stills capture:
$ v4l2-ctl --set-fmt-video=width=2592,height=1944,pixelformat=3
$ v4l2-ctl --stream-mmap=3 --stream-count=1 --stream-to=somefile.jpg
List of available formats:
$ v4l2-ctl --list-formats

View File

@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 0
SUBLEVEL = 3
SUBLEVEL = 4
EXTRAVERSION =
NAME = Hurr durr I'ma sheep

View File

@@ -369,6 +369,23 @@ config ARCH_AT91
This enables support for systems based on Atmel
AT91RM9200, AT91SAM9 and SAMA5 processors.
config ARCH_BCM2708
bool "Broadcom BCM2708 family"
select CPU_V6
select ARM_AMBA
select HAVE_SCHED_CLOCK
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
select COMMON_CLK
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select ARM_ERRATA_411920
select MACH_BCM2708
select VC4
select FIQ
help
This enables support for Broadcom BCM2708 boards.
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select ARCH_REQUIRE_GPIOLIB
@@ -777,6 +794,26 @@ config ARCH_OMAP1
help
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
config ARCH_BCM2709
bool "Broadcom BCM2709 family"
select ARCH_HAS_BARRIERS if SMP
select CPU_V7
select HAVE_SMP
select ARM_AMBA
select MIGHT_HAVE_CACHE_L2X0
select HAVE_SCHED_CLOCK
select NEED_MACH_MEMORY_H
select NEED_MACH_IO_H
select COMMON_CLK
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select MACH_BCM2709
select VC4
select FIQ
# select ZONE_DMA
help
This enables support for Broadcom BCM2709 boards.
endchoice
menu "Multiple platform selection"
@@ -967,6 +1004,8 @@ source "arch/arm/plat-versatile/Kconfig"
source "arch/arm/mach-vt8500/Kconfig"
source "arch/arm/mach-w90x900/Kconfig"
source "arch/arm/mach-bcm2708/Kconfig"
source "arch/arm/mach-bcm2709/Kconfig"
source "arch/arm/mach-zynq/Kconfig"

View File

@@ -1209,6 +1209,14 @@ choice
options; the platform specific options are deprecated
and will be soon removed.
config DEBUG_BCM2708_UART0
bool "Broadcom BCM2708 UART0 (PL011)"
depends on MACH_BCM2708
help
Say Y here if you want the debug print routines to direct
their output to UART 0. The port must have been initialised
by the boot-loader before use.
endchoice
config DEBUG_AT91_UART

View File

@@ -146,6 +146,8 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_AXXIA) += axxia
machine-$(CONFIG_ARCH_BCM) += bcm
machine-$(CONFIG_ARCH_BCM2708) += bcm2708
machine-$(CONFIG_ARCH_BCM2709) += bcm2709
machine-$(CONFIG_ARCH_BERLIN) += berlin
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx

View File

@@ -1,5 +1,21 @@
ifeq ($(CONFIG_OF),y)
dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-b.dtb
dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-b-plus.dtb
dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-cm.dtb
dtb-$(CONFIG_BCM2709_DT) += bcm2709-rpi-2-b.dtb
# Raspberry Pi
ifeq ($(CONFIG_BCM2708_DT),y)
RPI_DT_OVERLAYS=y
endif
ifeq ($(CONFIG_BCM2709_DT),y)
RPI_DT_OVERLAYS=y
endif
ifeq ($(CONFIG_ARCH_BCM2835),y)
RPI_DT_OVERLAYS=y
endif
dtb-$(CONFIG_MACH_ASM9260) += \
alphascale-asm9260-devkit.dtb
# Keep at91 dtb files sorted alphabetically for each SoC
@@ -645,7 +661,18 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6592-evb.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
targets += dtbs dtbs_install
targets += $(dtb-y)
endif
always := $(dtb-y)
clean-files := *.dtb
# Enable fixups to support overlays on BCM2708 platforms
ifeq ($(RPI_DT_OVERLAYS),y)
DTC_FLAGS ?= -@
endif
subdir-y += overlays

View File

@@ -105,6 +105,10 @@
};
internal-regs {
rtc@10300 {
/* No crystal connected to the internal RTC */
status = "disabled";
};
serial@12000 {
status = "okay";
};

View File

@@ -0,0 +1,140 @@
/dts-v1/;
/include/ "bcm2708.dtsi"
/ {
compatible = "brcm,bcm2708";
model = "Raspberry Pi Model B+";
aliases {
soc = &soc;
spi0 = &spi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2s = &i2s;
gpio = &gpio;
intc = &intc;
leds = &leds;
audio = &audio;
sound = &sound;
uart0 = &uart0;
uart1 = &uart1;
clocks = &clocks;
};
sound: sound {
};
};
&gpio {
spi0_pins: spi0_pins {
brcm,pins = <7 8 9 10 11>;
brcm,function = <4>; /* alt0 */
};
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <4>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <4>;
};
i2s_pins: i2s {
brcm,pins = <18 19 20 21>;
brcm,function = <4>; /* alt0 */
};
};
&mmc {
status = "okay";
bus-width = <4>;
};
&fb {
status = "okay";
};
&uart0 {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&i2s {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
&leds {
act_led: act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&gpio 47 0>;
};
pwr_led: pwr {
label = "led1";
linux,default-trigger = "input";
gpios = <&gpio 35 0>;
};
};
/ {
__overrides__ {
uart0 = <&uart0>,"status";
uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
i2s = <&i2s>,"status";
spi = <&spi0>,"status";
i2c0 = <&i2c0>,"status";
i2c1 = <&i2c1>,"status";
i2c0_baudrate = <&i2c0>,"clock-frequency:0";
i2c1_baudrate = <&i2c1>,"clock-frequency:0";
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
pwr_led_gpio = <&pwr_led>,"gpios:4";
pwr_led_activelow = <&pwr_led>,"gpios:8";
pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
audio = <&audio>,"status";
watchdog = <&watchdog>,"status";
random = <&random>,"status";
};
};

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@@ -0,0 +1,130 @@
/dts-v1/;
/include/ "bcm2708.dtsi"
/ {
compatible = "brcm,bcm2708";
model = "Raspberry Pi Model B";
aliases {
soc = &soc;
spi0 = &spi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2s = &i2s;
gpio = &gpio;
intc = &intc;
leds = &leds;
audio = &audio;
sound = &sound;
uart0 = &uart0;
uart1 = &uart1;
clocks = &clocks;
};
sound: sound {
};
};
&gpio {
spi0_pins: spi0_pins {
brcm,pins = <7 8 9 10 11>;
brcm,function = <4>; /* alt0 */
};
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <4>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <4>;
};
i2s_pins: i2s {
brcm,pins = <28 29 30 31>;
brcm,function = <4>; /* alt0 */
};
};
&mmc {
status = "okay";
bus-width = <4>;
};
&fb {
status = "okay";
};
&uart0 {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&i2s {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
&leds {
act_led: act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&gpio 16 1>;
};
};
/ {
__overrides__ {
uart0 = <&uart0>,"status";
uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
i2s = <&i2s>,"status";
spi = <&spi0>,"status";
i2c0 = <&i2c0>,"status";
i2c1 = <&i2c1>,"status";
i2c0_baudrate = <&i2c0>,"clock-frequency:0";
i2c1_baudrate = <&i2c1>,"clock-frequency:0";
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
audio = <&audio>,"status";
watchdog = <&watchdog>,"status";
random = <&random>,"status";
};
};

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@@ -0,0 +1,18 @@
/dts-v1/;
/include/ "bcm2708-rpi-cm.dtsi"
/ {
model = "Raspberry Pi Compute Module";
};
&uart0 {
status = "okay";
};
/ {
__overrides__ {
uart0 = <&uart0>,"status";
uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
};
};

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@@ -0,0 +1,51 @@
/include/ "bcm2708.dtsi"
/ {
aliases {
soc = &soc;
spi0 = &spi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2s = &i2s;
gpio = &gpio;
intc = &intc;
leds = &leds;
audio = &audio;
sound = &sound;
uart0 = &uart0;
uart1 = &uart1;
clocks = &clocks;
};
sound: sound {
};
};
&leds {
act_led: act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&gpio 47 0>;
};
};
&mmc {
status = "okay";
bus-width = <4>;
};
&fb {
status = "okay";
};
&audio {
status = "okay";
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
};
};

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@@ -0,0 +1,19 @@
/include/ "bcm2708_common.dtsi"
/ {
compatible = "brcm,bcm2708";
model = "BCM2708";
chosen {
/* No padding required - the boot loader can do that. */
bootargs = "";
};
soc {
ranges = <0x7e000000 0x20000000 0x01000000>;
arm-pmu {
compatible = "arm,arm1176-pmu";
};
};
};

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@@ -0,0 +1,230 @@
/include/ "skeleton.dtsi"
/ {
interrupt-parent = <&intc>;
/* Onboard audio */
audio: audio {
compatible = "brcm,bcm2835-audio";
brcm,pwm-channels = <8>;
status = "disabled";
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
dma: dma@7e007000 {
compatible = "brcm,bcm2835-dma";
reg = <0x7e007000 0xf00>;
interrupts = <1 16>,
<1 17>,
<1 18>,
<1 19>,
<1 20>,
<1 21>,
<1 22>,
<1 23>,
<1 24>,
<1 25>,
<1 26>,
<1 27>,
<1 28>;
#dma-cells = <1>;
brcm,dma-channel-mask = <0x7f35>;
};
intc: interrupt-controller {
compatible = "brcm,bcm2708-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-controller;
#interrupt-cells = <2>;
};
watchdog: watchdog@7e100000 {
compatible = "brcm,bcm2835-pm-wdt";
reg = <0x7e100000 0x28>;
status = "disabled";
};
random: rng@7e104000 {
compatible = "brcm,bcm2835-rng";
reg = <0x7e104000 0x10>;
status = "disabled";
};
mailbox: mailbox@7e00b800 {
compatible = "brcm,bcm2708-vcio";
reg = <0x7e00b880 0x40>;
interrupts = <0 1>;
};
gpio: gpio {
compatible = "brcm,bcm2835-gpio";
reg = <0x7e200000 0xb4>;
interrupts = <2 17>, <2 18>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
mmc: mmc@7e300000 {
compatible = "brcm,bcm2835-mmc";
reg = <0x7e300000 0x100>;
interrupts = <2 30>;
clocks = <&clk_mmc>;
dmas = <&dma 11>,
<&dma 11>;
dma-names = "tx", "rx";
status = "disabled";
};
uart0: uart@7e201000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201000 0x1000>;
interrupts = <2 25>;
clocks = <&clk_uart0 &clk_apb_p>;
clock-names = "uartclk","apb_pclk";
arm,primecell-periphid = <0x00241011>; // For an explanation, see
// https://github.com/raspberrypi/linux/commit/13731d862cf5219216533a3b0de052cee4cc5038
status = "disabled";
};
i2s: i2s@7e203000 {
compatible = "brcm,bcm2708-i2s";
reg = <0x7e203000 0x20>,
<0x7e101098 0x02>;
//dmas = <&dma 2>,
// <&dma 3>;
dma-names = "tx", "rx";
status = "disabled";
};
spi0: spi@7e204000 {
compatible = "brcm,bcm2835-spi";
reg = <0x7e204000 0x1000>;
interrupts = <2 22>;
clocks = <&clk_spi>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
/* the dma channels */
dmas = <&dma 6>, <&dma 7>;
dma-names = "tx", "rx";
/* the chipselects used - <0> means native GPIO
* add more gpios if necessary as <&gpio 6 1>
* (but do not forget to make them output!)
*/
cs-gpios = <0>, <0>;
};
i2c0: i2c@7e205000 {
compatible = "brcm,bcm2708-i2c";
reg = <0x7e205000 0x1000>;
interrupts = <2 21>;
clocks = <&clk_i2c>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
uart1: uart@7e215040 {
compatible = "brcm,bcm2835-aux-uart", "ns16550";
reg = <0x7e215040 0x40>;
interrupts = <1 29>;
clock-frequency = <500000000>;
reg-shift = <2>;
no-loopback-test;
status = "disabled";
};
i2c1: i2c@7e804000 {
compatible = "brcm,bcm2708-i2c";
reg = <0x7e804000 0x1000>;
interrupts = <2 21>;
clocks = <&clk_i2c>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
usb: usb@7e980000 {
compatible = "brcm,bcm2708-usb";
reg = <0x7e980000 0x10000>,
<0x7e006000 0x1000>;
interrupts = <2 0>,
<1 9>;
};
leds: leds {
compatible = "gpio-leds";
};
fb: fb {
compatible = "brcm,bcm2708-fb";
status = "disabled";
};
vchiq: vchiq {
compatible = "brcm,bcm2835-vchiq";
reg = <0x7e00b840 0xf>;
interrupts = <0 2>;
};
thermal: thermal {
compatible = "brcm,bcm2835-thermal";
};
};
clocks: clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk_mmc: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-output-names = "mmc";
clock-frequency = <250000000>;
};
clk_i2c: clock@1 {
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
clock-output-names = "i2c";
clock-frequency = <250000000>;
};
clk_spi: clock@2 {
compatible = "fixed-clock";
reg = <2>;
#clock-cells = <0>;
clock-output-names = "spi";
clock-frequency = <250000000>;
};
clk_uart0: clock@3 {
compatible = "fixed-clock";
reg = <3>;
#clock-cells = <0>;
clock-output-names = "uart0_pclk";
clock-frequency = <3000000>;
};
clk_apb_p: clock@4 {
compatible = "fixed-clock";
reg = <4>;
#clock-cells = <0>;
clock-output-names = "apb_pclk";
clock-frequency = <126000000>;
};
};
};

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@@ -0,0 +1,140 @@
/dts-v1/;
/include/ "bcm2709.dtsi"
/ {
compatible = "brcm,bcm2709";
model = "Raspberry Pi 2 Model B";
aliases {
soc = &soc;
spi0 = &spi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2s = &i2s;
gpio = &gpio;
intc = &intc;
leds = &leds;
audio = &audio;
sound = &sound;
uart0 = &uart0;
uart1 = &uart1;
clocks = &clocks;
};
sound: sound {
};
};
&gpio {
spi0_pins: spi0_pins {
brcm,pins = <7 8 9 10 11>;
brcm,function = <4>; /* alt0 */
};
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <4>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <4>;
};
i2s_pins: i2s {
brcm,pins = <18 19 20 21>;
brcm,function = <4>; /* alt0 */
};
};
&mmc {
status = "okay";
bus-width = <4>;
};
&fb {
status = "okay";
};
&uart0 {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&i2s {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
&leds {
act_led: act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&gpio 47 0>;
};
pwr_led: pwr {
label = "led1";
linux,default-trigger = "input";
gpios = <&gpio 35 0>;
};
};
/ {
__overrides__ {
uart0 = <&uart0>,"status";
uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
i2s = <&i2s>,"status";
spi = <&spi0>,"status";
i2c0 = <&i2c0>,"status";
i2c1 = <&i2c1>,"status";
i2c0_baudrate = <&i2c0>,"clock-frequency:0";
i2c1_baudrate = <&i2c1>,"clock-frequency:0";
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
pwr_led_gpio = <&pwr_led>,"gpios:4";
pwr_led_activelow = <&pwr_led>,"gpios:8";
pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
audio = <&audio>,"status";
watchdog = <&watchdog>,"status";
random = <&random>,"status";
};
};

View File

@@ -0,0 +1,70 @@
/include/ "bcm2708_common.dtsi"
/ {
compatible = "brcm,bcm2709";
model = "BCM2709";
chosen {
/* No padding required - the boot loader can do that. */
bootargs = "";
};
soc {
ranges = <0x7e000000 0x3f000000 0x01000000>;
arm-pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <3 9>;
};
};
timer {
compatible = "arm,armv7-timer";
clock-frequency = <19200000>;
interrupts = <3 0>, // PHYS_SECURE_PPI
<3 1>, // PHYS_NONSECURE_PPI
<3 3>, // VIRT_PPI
<3 2>; // HYP_PPI
always-on;
};
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
v7_cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf00>;
clock-frequency = <800000000>;
};
v7_cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf01>;
clock-frequency = <800000000>;
};
v7_cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf02>;
clock-frequency = <800000000>;
};
v7_cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf03>;
clock-frequency = <800000000>;
};
};
__overrides__ {
arm_freq = <&v7_cpu0>, "clock-frequency:0",
<&v7_cpu1>, "clock-frequency:0",
<&v7_cpu2>, "clock-frequency:0",
<&v7_cpu3>, "clock-frequency:0";
};
};

View File

@@ -4,27 +4,40 @@
/ {
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
model = "Raspberry Pi Model B+";
leds {
act {
gpios = <&gpio 47 0>;
};
pwr {
label = "PWR";
gpios = <&gpio 35 0>;
default-state = "keep";
linux,default-trigger = "default-on";
};
};
};
&gpio {
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
i2s_pins: i2s {
brcm,pins = <18 19 20 21>;
brcm,function = <4>; /* alt0 */
};
};
&i2s {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
&act_led {
gpios = <&gpio 47 0>;
};
&leds {
pwr_led: pwr {
label = "led1";
linux,default-trigger = "input";
gpios = <&gpio 35 0>;
};
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
pwr_led_gpio = <&pwr_led>,"gpios:4";
pwr_led_activelow = <&pwr_led>,"gpios:8";
pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
};
};

View File

@@ -5,19 +5,28 @@
compatible = "raspberrypi,model-b", "brcm,bcm2835";
model = "Raspberry Pi Model B";
leds {
act {
gpios = <&gpio 16 1>;
};
};
};
&gpio {
pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
/* I2S interface */
i2s_alt2: i2s_alt2 {
i2s_pins: i2s {
brcm,pins = <28 29 30 31>;
brcm,function = <6>; /* alt2 */
brcm,function = <4>; /* alt0 */
};
};
&i2s {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
&act_led {
gpios = <&gpio 16 1>;
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
};
};

View File

@@ -1,51 +1,112 @@
/include/ "bcm2835.dtsi"
/ {
/* This is left here in case u-boot needs it */
memory {
reg = <0 0x10000000>;
};
leds {
aliases {
soc = &soc;
spi0 = &spi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2s = &i2s;
gpio = &gpio;
intc = &intc;
leds = &leds;
sound = &sound;
};
leds: leds {
compatible = "gpio-leds";
act {
label = "ACT";
default-state = "keep";
linux,default-trigger = "heartbeat";
act_led: act {
label = "led0";
linux,default-trigger = "mmc0";
};
};
/* Onboard audio */
audio: audio {
compatible = "brcm,bcm2835-audio";
brcm,pwm-channels = <8>;
status = "disabled";
};
/* External sound card */
sound: sound {
};
};
&gpio {
pinctrl-names = "default";
gpioout: gpioout {
brcm,pins = <6>;
brcm,function = <1>; /* GPIO out */
};
alt0: alt0 {
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
spi0_pins: spi0_pins {
brcm,pins = <7 8 9 10 11>;
brcm,function = <4>; /* alt0 */
};
alt3: alt3 {
brcm,pins = <48 49 50 51 52 53>;
brcm,function = <7>; /* alt3 */
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <4>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <4>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <500000>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&sdhci {
&mmc {
status = "okay";
bus-width = <4>;
};
&fb {
status = "okay";
};
/ {
__overrides__ {
i2s = <&i2s>,"status";
spi = <&spi0>,"status";
i2c0 = <&i2c0>,"status";
i2c1 = <&i2c1>,"status";
i2c0_baudrate = <&i2c0>,"clock-frequency:0";
i2c1_baudrate = <&i2c1>,"clock-frequency:0";
act_led_trigger = <&act_led>,"linux,default-trigger";
audio = <&audio>,"status";
};
};

View File

@@ -6,14 +6,15 @@
interrupt-parent = <&intc>;
chosen {
bootargs = "earlyprintk console=ttyAMA0";
bootargs = "";
};
soc {
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x7e000000 0x20000000 0x02000000>;
dma-ranges = <0x40000000 0x00000000 0x20000000>;
timer@7e003000 {
compatible = "brcm,bcm2835-system-timer";
@@ -50,16 +51,22 @@
#interrupt-cells = <2>;
};
watchdog@7e100000 {
watchdog: watchdog@7e100000 {
compatible = "brcm,bcm2835-pm-wdt";
reg = <0x7e100000 0x28>;
};
rng@7e104000 {
random: rng@7e104000 {
compatible = "brcm,bcm2835-rng";
reg = <0x7e104000 0x10>;
};
mailbox: mailbox@7e00b800 {
compatible = "brcm,bcm2708-vcio";
reg = <0x7e00b880 0x40>;
interrupts = <0 1>;
};
gpio: gpio@7e200000 {
compatible = "brcm,bcm2835-gpio";
reg = <0x7e200000 0xb4>;
@@ -83,7 +90,7 @@
#interrupt-cells = <2>;
};
uart@7e201000 {
uart0: uart@7e201000 {
compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
reg = <0x7e201000 0x1000>;
interrupts = <2 25>;
@@ -102,7 +109,7 @@
status = "disabled";
};
spi: spi@7e204000 {
spi0: spi@7e204000 {
compatible = "brcm,bcm2835-spi";
reg = <0x7e204000 0x1000>;
interrupts = <2 22>;
@@ -122,11 +129,14 @@
status = "disabled";
};
sdhci: sdhci@7e300000 {
compatible = "brcm,bcm2835-sdhci";
mmc: mmc@7e300000 {
compatible = "brcm,bcm2835-mmc";
reg = <0x7e300000 0x100>;
interrupts = <2 30>;
clocks = <&clk_mmc>;
dmas = <&dma 11>,
<&dma 11>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -140,7 +150,7 @@
status = "disabled";
};
usb@7e980000 {
usb: usb@7e980000 {
compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>;
interrupts = <1 9>;
@@ -149,6 +159,21 @@
arm-pmu {
compatible = "arm,arm1176-pmu";
};
fb: fb {
compatible = "brcm,bcm2708-fb";
status = "disabled";
};
vchiq: vchiq {
compatible = "brcm,bcm2835-vchiq";
reg = <0x7e00b840 0xf>;
interrupts = <0 2>;
};
thermal: thermal {
compatible = "brcm,bcm2835-thermal";
};
};
clocks {
@@ -161,7 +186,7 @@
reg = <0>;
#clock-cells = <0>;
clock-output-names = "mmc";
clock-frequency = <100000000>;
clock-frequency = <250000000>;
};
clk_i2c: clock@1 {

View File

@@ -12,6 +12,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx23.dtsi"
/ {
@@ -93,6 +94,7 @@
ahb@80080000 {
usb0: usb@80080000 {
dr_mode = "host";
vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};
@@ -122,7 +124,7 @@
user {
label = "green";
gpios = <&gpio2 1 1>;
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
};
};

View File

@@ -428,6 +428,7 @@
pwm4: pwm@53fc8000 {
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
#pwm-cells = <2>;
reg = <0x53fc8000 0x4000>;
clocks = <&clks 108>, <&clks 52>;
clock-names = "ipg", "per";

View File

@@ -900,7 +900,7 @@
80 81 68 69
70 71 72 73
74 75 76 77>;
interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
"saif0", "saif1", "i2c0", "i2c1",
"auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
"auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";

View File

@@ -31,6 +31,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 15 0>;
enable-active-high;
};
reg_usb_h1_vbus: regulator@1 {
@@ -40,6 +41,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 0 0>;
enable-active-high;
};
};

View File

@@ -484,6 +484,8 @@
DRVDD-supply = <&vmmc2>;
IOVDD-supply = <&vio>;
DVDD-supply = <&vio>;
ai3x-micbias-vg = <1>;
};
tlv320aic3x_aux: tlv320aic3x@19 {
@@ -495,6 +497,8 @@
DRVDD-supply = <&vmmc2>;
IOVDD-supply = <&vio>;
DVDD-supply = <&vio>;
ai3x-micbias-vg = <2>;
};
tsl2563: tsl2563@29 {

View File

@@ -0,0 +1,55 @@
ifeq ($(CONFIG_OF),y)
# Overlays for the Raspberry Pi platform
ifeq ($(CONFIG_BCM2708_DT),y)
RPI_DT_OVERLAYS=y
endif
ifeq ($(CONFIG_BCM2709_DT),y)
RPI_DT_OVERLAYS=y
endif
ifeq ($(CONFIG_ARCH_BCM2835),y)
RPI_DT_OVERLAYS=y
endif
dtb-$(RPI_DT_OVERLAYS) += ads7846-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += enc28j60-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hifiberry-amp-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hifiberry-dac-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hifiberry-dacplus-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hifiberry-digi-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hy28a-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += hy28b-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += i2c-rtc-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += iqaudio-dac-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += iqaudio-dacplus-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += lirc-rpi-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += mcp2515-can0-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += mmc-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += mz61581-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += piscreen-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += pitft28-resistive-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += pps-gpio-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += rpi-dac-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += rpi-display-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += rpi-proto-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += sdhost-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += spi-bcm2708-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += spi-bcm2835-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += tinylcd35-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += w1-gpio-overlay.dtb
dtb-$(RPI_DT_OVERLAYS) += w1-gpio-pullup-overlay.dtb
targets += dtbs dtbs_install
targets += $(dtb-y)
endif
always := $(dtb-y)
clean-files := *.dtb
# Enable fixups to support overlays on BCM2708 platforms
ifeq ($(RPI_DT_OVERLAYS),y)
DTC_FLAGS ?= -@
endif

View File

@@ -0,0 +1,472 @@
Introduction
============
This directory contains Device Tree overlays. Device Tree makes it possible
to support many hardware configurations with a single kernel and without the
need to explicitly load or blacklist kernel modules. Note that this isn't a
"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
are still configured by the board support code, but the intention is to
eventually reach that goal.
On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
default, the Raspberry Pi kernel boots with device tree enabled. You can
completely disable DT usage (for now) by adding:
device_tree=
to your config.txt, which should cause your Pi to revert to the old way of
doing things after a reboot.
In /boot you will find a .dtb for each base platform. This describes the
hardware that is part of the Raspberry Pi board. The loader (start.elf and its
siblings) selects the .dtb file appropriate for the platform by name, and reads
it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
are disabled, but they can be enabled using Device Tree parameters:
dtparam=i2c=on,i2s=on,spi=on
However, this shouldn't be necessary in many use cases because loading an
overlay that requires one of those interfaces will cause it to be enabled
automatically, and it is advisable to only enable interfaces if they are
needed.
Configuring additional, optional hardware is done using Device Tree overlays
(see below).
raspi-config
============
The Advanced Options section of the raspi-config utility can enable and disable
Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
is possible to both enable an interface and blacklist the driver, if for some
reason you should want to defer the loading.
Modules
=======
As well as describing the hardware, Device Tree also gives enough information
to allow suitable driver modules to be located and loaded, with the corollary
that unneeded modules are not loaded. As a result it should be possible to
remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
have its contents deleted (or commented out).
Using Overlays
==============
Overlays are loaded using the "dtoverlay" directive. As an example, consider the
popular lirc-rpi module, the Linux Infrared Remote Control driver. In the
pre-DT world this would be loaded from /etc/modules, with an explicit
"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled,
this becomes a line in config.txt:
dtoverlay=lirc-rpi
This causes the file /boot/overlays/lirc-rpi-overlay.dtb to be loaded. By
default it will use GPIOs 17 (out) and 18 (in), but this can be modified using
DT parameters:
dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13
Parameters always have default values, although in some cases (e.g. "w1-gpio")
it is necessary to provided multiple overlays in order to get the desired
behaviour. See the list of overlays below for a description of the parameters and their defaults.
The Overlay and Parameter Reference
===================================
Name: <The base DTB>
Info: Configures the base Raspberry Pi hardware
Load: <loaded automatically>
Params:
i2c_arm Set to "on" to enable the ARM's i2c interface
(default "off")
i2c_vc Set to "on" to enable the i2c interface
usually reserved for the VideoCore processor
(default "off")
i2c An alias for i2c_arm
i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
(default "100000")
i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
(default "100000")
i2c_baudrate An alias for i2c_arm_baudrate
i2s Set to "on" to enable the i2s interface
(default "off")
spi Set to "on" to enable the spi interfaces
(default "off")
act_led_trigger Choose which activity the LED tracks.
Use "heartbeat" for a nice load indicator.
(default "mmc")
act_led_activelow Set to "on" to invert the sense of the LED
(default "off")
act_led_gpio Set which GPIO to use for the activity LED
(in case you want to connect it to an external
device)
(default "16" on a non-Plus board, "47" on a
Plus or Pi 2)
pwr_led_trigger
pwr_led_activelow
pwr_led_gpio
As for act_led_*, but using the PWR LED.
Not available on Model A/B boards.
N.B. It is recommended to only enable those interfaces that are needed.
Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
interfaces i2c0 and i2c1. Use of the numeric variants is still possible
but deprecated because the ARM/VC assignments differ between board
revisions. The same board-specific mapping applies to i2c_baudrate,
and the other i2c baudrate parameters.
Name: ads7846
Info: ADS7846 Touch controller
Load: dtoverlay=ads7846,<param>=<val>
Params: cs SPI bus Chip Select (default 1)
speed SPI bus speed (default 2Mhz, max 3.25MHz)
penirq GPIO used for PENIRQ. REQUIRED
penirq_pull Set GPIO pull (default 0=none, 2=pullup)
swapxy Swap x and y axis
xmin Minimum value on the X axis (default 0)
ymin Minimum value on the Y axis (default 0)
xmax Maximum value on the X axis (default 4095)
ymax Maximum value on the Y axis (default 4095)
pmin Minimum reported pressure value (default 0)
pmax Maximum reported pressure value (default 65535)
xohms Touchpanel sensitivity (X-plate resistance)
(default 400)
penirq is required and usually xohms (60-100) has to be set as well.
Apart from that, pmax (255) and swapxy are also common.
The rest of the calibration can be done with xinput-calibrator.
See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
Device Tree binding document:
www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
Name: bmp085_i2c-sensor
Info: Configures the BMP085/BMP180 digital barometric pressure and temperature
sensors from Bosch Sensortec
Load: dtoverlay=bmp085_i2c-sensor
Params: <None>
[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
Name: enc28j60
Info: Overlay for the Microchip ENC28J60 Ethernet Controller (SPI)
Load: dtoverlay=enc28j60,<param>=<val>
Params: int_pin GPIO used for INT (default 25)
speed SPI bus speed (default 12000000)
Name: hifiberry-amp
Info: Configures the HifiBerry Amp and Amp+ audio cards
Load: dtoverlay=hifiberry-amp
Params: <None>
Name: hifiberry-dac
Info: Configures the HifiBerry DAC audio card
Load: dtoverlay=hifiberry-dac
Params: <None>
Name: hifiberry-dacplus
Info: Configures the HifiBerry DAC+ audio card
Load: dtoverlay=hifiberry-dacplus
Params: <None>
Name: hifiberry-digi
Info: Configures the HifiBerry Digi audio card
Load: dtoverlay=hifiberry-digi
Params: <None>
Name: hy28a
Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
Default values match Texy's display shield
Load: dtoverlay=hy28a,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
xohms Touchpanel sensitivity (X-plate resistance)
resetgpio GPIO used to reset controller
ledgpio GPIO used to control backlight
Name: hy28b
Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
Default values match Texy's display shield
Load: dtoverlay=hy28b,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
xohms Touchpanel sensitivity (X-plate resistance)
resetgpio GPIO used to reset controller
ledgpio GPIO used to control backlight
Name: i2c-rtc
Info: Adds support for a number of I2C Real Time Clock devices
Load: dtoverlay=i2c-rtc,<param>
Params: ds1307 Select the DS1307 device
ds3231 Select the DS3231 device
pcf2127 Select the PCF2127 device
pcf8523 Select the PCF8523 device
pcf8563 Select the PCF8563 device
Name: iqaudio-dac
Info: Configures the IQaudio DAC audio card
Load: dtoverlay=iqaudio-dac
Params: <None>
Name: iqaudio-dacplus
Info: Configures the IQaudio DAC+ audio card
Load: dtoverlay=iqaudio-dacplus
Params: <None>
Name: lirc-rpi
Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
Consult the module documentation for more details.
Load: dtoverlay=lirc-rpi,<param>=<val>,...
Params: gpio_out_pin GPIO for output (default "17")
gpio_in_pin GPIO for input (default "18")
gpio_in_pull Pull up/down/off on the input pin
(default "down")
sense Override the IR receive auto-detection logic:
"1" = force active high
"0" = force active low
"-1" = use auto-detection
(default "-1")
softcarrier Turn the software carrier "on" or "off"
(default "on")
invert "on" = invert the output pin (default "off")
debug "on" = enable additional debug messages
(default "off")
Name: mmc
Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
Load: dtoverlay=mmc,<param>=<val>
Params: overclock_50 Clock (in MHz) to use when the MMC framework
requests 50MHz
force_pio Disable DMA support
Name: mz61581
Info: MZ61581 display by Tontec
Load: dtoverlay=mz61581,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
xohms Touchpanel sensitivity (X-plate resistance)
[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
Name: piscreen
Info: PiScreen display by OzzMaker.com
Load: dtoverlay=piscreen,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
xohms Touchpanel sensitivity (X-plate resistance)
Name: pitft28-resistive
Info: Adafruit PiTFT 2.8" resistive touch screen
Load: dtoverlay=pitft28-resistive,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
Name: pps-gpio
Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
Load: dtoverlay=pps-gpio,<param>=<val>
Params: gpiopin Input GPIO (default "18")
Name: rpi-dac
Info: Configures the RPi DAC audio card
Load: dtoverlay=rpi-dac
Params: <None>
Name: rpi-display
Info: RPi-Display - 2.8" Touch Display by Watterott
Load: dtoverlay=rpi-display,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
xohms Touchpanel sensitivity (X-plate resistance)
Name: rpi-proto
Info: Configures the RPi Proto audio card
Load: dtoverlay=rpi-proto
Params: <None>
Name: sdhost
Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock
Load: dtoverlay=sdhost,<param>=<val>
Params: overclock_50 Clock (in MHz) to use when the MMC framework
requests 50MHz
force_pio Disable DMA support
Name: spi-bcm2708
Info: Selects the bcm2708-spi SPI driver
Load: dtoverlay=spi-bcm2708
Params: <None>
Name: spi-bcm2835
Info: Selects the bcm2835-spi SPI driver
Load: dtoverlay=spi-bcm2835
Params: <None>
Name: tinylcd35
Info: 3.5" Color TFT Display by www.tinlylcd.com
Options: Touch, RTC, keypad
Load: dtoverlay=tinylcd35,<param>=<val>
Params: speed Display SPI bus speed
rotate Display rotation {0,90,180,270}
fps Delay between frame updates
debug Debug output level {0-7}
touch Enable touch panel
touchgpio Touch controller IRQ GPIO
xohms Touchpanel: Resistance of X-plate in ohms
rtc-pcf PCF8563 Real Time Clock
rtc-ds DS1307 Real Time Clock
keypad Enable keypad
Examples:
Display with touchpanel, PCF8563 RTC and keypad:
dtoverlay=tinylcd35,touch,rtc-pcf,keypad
Old touch display:
dtoverlay=tinylcd35,touch,touchgpio=3
Name: w1-gpio
Info: Configures the w1-gpio Onewire interface module.
Use this overlay if you *don't* need a GPIO to drive an external pullup.
Load: dtoverlay=w1-gpio,<param>=<val>
Params: gpiopin GPIO for I/O (default "4")
pullup Non-zero, "on", or "y" to enable the parasitic
power (2-wire, power-on-data) feature
Name: w1-gpio-pullup
Info: Configures the w1-gpio Onewire interface module.
Use this overlay if you *do* need a GPIO to drive an external pullup.
Load: dtoverlay=w1-gpio-pullup,<param>=<val>,...
Params: gpiopin GPIO for I/O (default "4")
pullup Non-zero, "on", or "y" to enable the parasitic
power (2-wire, power-on-data) feature
extpullup GPIO for external pullup (default "5")
Troubleshooting
===============
If you are experiencing problems that you think are DT-related, enable DT
diagnostic output by adding this to /boot/config.txt:
dtdebug=on
and rebooting. Then run:
sudo vcdbg log msg
and look for relevant messages.
Further reading
===============
This is only meant to be a quick introduction to the subject of Device Tree on
Raspberry Pi. There is a more complete explanation here:
http://www.raspberrypi.org/documentation/configuration/device-tree.md

View File

@@ -0,0 +1,83 @@
/*
* Generic Device Tree overlay for the ADS7846 touch controller
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
ads7846_pins: ads7846_pins {
brcm,pins = <255>; /* illegal default value */
brcm,function = <0>; /* in */
brcm,pull = <0>; /* none */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
ads7846: ads7846@1 {
compatible = "ti,ads7846";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&ads7846_pins>;
spi-max-frequency = <2000000>;
interrupts = <255 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 255 0>;
/* driver defaults */
ti,x-min = /bits/ 16 <0>;
ti,y-min = /bits/ 16 <0>;
ti,x-max = /bits/ 16 <0x0FFF>;
ti,y-max = /bits/ 16 <0x0FFF>;
ti,pressure-min = /bits/ 16 <0>;
ti,pressure-max = /bits/ 16 <0xFFFF>;
ti,x-plate-ohms = /bits/ 16 <400>;
};
};
};
__overrides__ {
cs = <&ads7846>,"reg:0";
speed = <&ads7846>,"spi-max-frequency:0";
penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
<&ads7846>,"interrupts:0",
<&ads7846>,"pendown-gpio:4";
penirq_pull = <&ads7846_pins>,"brcm,pull:0";
swapxy = <&ads7846>,"ti,swap-xy?";
xmin = <&ads7846>,"ti,x-min;0";
ymin = <&ads7846>,"ti,y-min;0";
xmax = <&ads7846>,"ti,x-max;0";
ymax = <&ads7846>,"ti,y-max;0";
pmin = <&ads7846>,"ti,pressure-min;0";
pmax = <&ads7846>,"ti,pressure-max;0";
xohms = <&ads7846>,"ti,x-plate-ohms;0";
};
};

View File

@@ -0,0 +1,23 @@
// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
bmp085@77 {
compatible = "bosch,bmp085";
reg = <0x77>;
default-oversampling = <3>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,22 @@
// Definitions for DS1307 Real Time Clock
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ds1307@68 {
compatible = "maxim,ds1307";
reg = <0x68>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,29 @@
// Overlay for the Microchip ENC28J60 Ethernet Controller
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
spidev@0{
status = "disabled";
};
enc28j60@0{
compatible = "microchip,enc28j60";
reg = <0>; /* CE0 */
spi-max-frequency = <12000000>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,39 @@
// Definitions for HiFiBerry Amp/Amp+
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "hifiberry,hifiberry-amp";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
tas5713@1b {
#sound-dai-cells = <0>;
compatible = "ti,tas5713";
reg = <0x1b>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,34 @@
// Definitions for HiFiBerry DAC
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "hifiberry,hifiberry-dac";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target-path = "/";
__overlay__ {
pcm5102a-codec {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
status = "okay";
};
};
};
};

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@@ -0,0 +1,39 @@
// Definitions for HiFiBerry DAC+
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "hifiberry,hifiberry-dacplus";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcm5122@4d {
#sound-dai-cells = <0>;
compatible = "ti,pcm5122";
reg = <0x4d>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,39 @@
// Definitions for HiFiBerry Digi
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "hifiberry,hifiberry-digi";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wm8804@3b {
#sound-dai-cells = <0>;
compatible = "wlf,wm8804";
reg = <0x3b>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,87 @@
/*
* Device Tree overlay for HY28A display
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
hy28a_pins: hy28a_pins {
brcm,pins = <17 25 18>;
brcm,function = <0 1 1>; /* in out out */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
hy28a: hy28a@0{
compatible = "ilitek,ili9320";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hy28a_pins>;
spi-max-frequency = <32000000>;
spi-cpol;
spi-cpha;
rotate = <270>;
bgr;
fps = <50>;
buswidth = <8>;
startbyte = <0x70>;
reset-gpios = <&gpio 25 0>;
led-gpios = <&gpio 18 1>;
debug = <0>;
};
hy28a_ts: hy28a-ts@1 {
compatible = "ti,ads7846";
reg = <1>;
spi-max-frequency = <2000000>;
interrupts = <17 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 17 0>;
ti,x-plate-ohms = /bits/ 16 <100>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
__overrides__ {
speed = <&hy28a>,"spi-max-frequency:0";
rotate = <&hy28a>,"rotate:0";
fps = <&hy28a>,"fps:0";
debug = <&hy28a>,"debug:0";
xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
resetgpio = <&hy28a>,"reset-gpios:4",
<&hy28a_pins>, "brcm,pins:1";
ledgpio = <&hy28a>,"led-gpios:4",
<&hy28a_pins>, "brcm,pins:2";
};
};

View File

@@ -0,0 +1,142 @@
/*
* Device Tree overlay for HY28b display shield by Texy
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
hy28b_pins: hy28b_pins {
brcm,pins = <17 25 18>;
brcm,function = <0 1 1>; /* in out out */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
hy28b: hy28b@0{
compatible = "ilitek,ili9325";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hy28b_pins>;
spi-max-frequency = <48000000>;
spi-cpol;
spi-cpha;
rotate = <270>;
bgr;
fps = <50>;
buswidth = <8>;
startbyte = <0x70>;
reset-gpios = <&gpio 25 0>;
led-gpios = <&gpio 18 1>;
gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
init = <0x10000e7 0x0010
0x1000000 0x0001
0x1000001 0x0100
0x1000002 0x0700
0x1000003 0x1030
0x1000004 0x0000
0x1000008 0x0207
0x1000009 0x0000
0x100000a 0x0000
0x100000c 0x0001
0x100000d 0x0000
0x100000f 0x0000
0x1000010 0x0000
0x1000011 0x0007
0x1000012 0x0000
0x1000013 0x0000
0x2000032
0x1000010 0x1590
0x1000011 0x0227
0x2000032
0x1000012 0x009c
0x2000032
0x1000013 0x1900
0x1000029 0x0023
0x100002b 0x000e
0x2000032
0x1000020 0x0000
0x1000021 0x0000
0x2000032
0x1000050 0x0000
0x1000051 0x00ef
0x1000052 0x0000
0x1000053 0x013f
0x1000060 0xa700
0x1000061 0x0001
0x100006a 0x0000
0x1000080 0x0000
0x1000081 0x0000
0x1000082 0x0000
0x1000083 0x0000
0x1000084 0x0000
0x1000085 0x0000
0x1000090 0x0010
0x1000092 0x0000
0x1000093 0x0003
0x1000095 0x0110
0x1000097 0x0000
0x1000098 0x0000
0x1000007 0x0133
0x1000020 0x0000
0x1000021 0x0000
0x2000064>;
debug = <0>;
};
hy28b_ts: hy28b-ts@1 {
compatible = "ti,ads7846";
reg = <1>;
spi-max-frequency = <2000000>;
interrupts = <17 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 17 0>;
ti,x-plate-ohms = /bits/ 16 <100>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
__overrides__ {
speed = <&hy28b>,"spi-max-frequency:0";
rotate = <&hy28b>,"rotate:0";
fps = <&hy28b>,"fps:0";
debug = <&hy28b>,"debug:0";
xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
resetgpio = <&hy28b>,"reset-gpios:4",
<&hy28b_pins>, "brcm,pins:1";
ledgpio = <&hy28b>,"led-gpios:4",
<&hy28b_pins>, "brcm,pins:2";
};
};

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@@ -0,0 +1,49 @@
// Definitions for several I2C based Real Time Clocks
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ds1307: ds1307@68 {
compatible = "maxim,ds1307";
reg = <0x68>;
status = "disable";
};
ds3231: ds3231@68 {
compatible = "maxim,ds3231";
reg = <0x68>;
status = "disable";
};
pcf2127: pcf2127@51 {
compatible = "nxp,pcf2127";
reg = <0x51>;
status = "disable";
};
pcf8523: pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
status = "disable";
};
pcf8563: pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "disable";
};
};
};
__overrides__ {
ds1307 = <&ds1307>,"status";
ds3231 = <&ds3231>,"status";
pcf2127 = <&pcf2127>,"status";
pcf8523 = <&pcf8523>,"status";
pcf8563 = <&pcf8563>,"status";
};
};

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@@ -0,0 +1,39 @@
// Definitions for IQaudIO DAC
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "iqaudio,iqaudio-dac";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcm5122@4c {
#sound-dai-cells = <0>;
compatible = "ti,pcm5122";
reg = <0x4c>;
status = "okay";
};
};
};
};

View File

@@ -0,0 +1,39 @@
// Definitions for IQaudIO DAC+
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "iqaudio,iqaudio-dac";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcm5122@4c {
#sound-dai-cells = <0>;
compatible = "ti,pcm5122";
reg = <0x4c>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,57 @@
// Definitions for lirc-rpi module
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target-path = "/";
__overlay__ {
lirc_rpi: lirc_rpi {
compatible = "rpi,lirc-rpi";
pinctrl-names = "default";
pinctrl-0 = <&lirc_pins>;
status = "okay";
// Override autodetection of IR receiver circuit
// (0 = active high, 1 = active low, -1 = no override )
rpi,sense = <0xffffffff>;
// Software carrier
// (0 = off, 1 = on)
rpi,softcarrier = <1>;
// Invert output
// (0 = off, 1 = on)
rpi,invert = <0>;
// Enable debugging messages
// (0 = off, 1 = on)
rpi,debug = <0>;
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
lirc_pins: lirc_pins {
brcm,pins = <17 18>;
brcm,function = <1 0>; // out in
brcm,pull = <0 1>; // off down
};
};
};
__overrides__ {
gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
sense = <&lirc_rpi>,"rpi,sense:0";
softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
invert = <&lirc_rpi>,"rpi,invert:0";
debug = <&lirc_rpi>,"rpi,debug:0";
};
};

View File

@@ -0,0 +1,69 @@
/*
* Device tree overlay for mcp251x/can0 on spi0.0
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
/* disable spi-dev for spi0.0 */
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
};
};
/* the interrupt pin of the can-controller */
fragment@1 {
target = <&gpio>;
__overlay__ {
can0_pins: can0_pins {
brcm,pins = <25>;
brcm,function = <0>; /* input */
};
};
};
/* the clock/oscillator of the can-controller */
fragment@2 {
target-path = "/clocks";
__overlay__ {
/* external oscillator of mcp2515 on SPI0.0 */
can0_osc: can0_osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
};
};
};
/* the spi config of the can-controller itself binding everything together */
fragment@3 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
can0: mcp2515@0 {
reg = <0>;
compatible = "microchip,mcp2515";
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio>;
interrupts = <25 0x2>;
clocks = <&can0_osc>;
};
};
};
__overrides__ {
oscillator = <&can0_osc>,"clock-frequency:0";
spimaxfrequency = <&can0>,"spi-max-frequency:0";
interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
};
};

View File

@@ -0,0 +1,19 @@
/dts-v1/;
/plugin/;
/{
compatible = "brcm,bcm2708";
fragment@0 {
target = <&mmc>;
__overlay__ {
brcm,overclock-50 = <0>;
};
};
__overrides__ {
overclock_50 = <&mmc>,"brcm,overclock-50:0";
force_pio = <&mmc>,"brcm,force-pio?";
};
};

View File

@@ -0,0 +1,109 @@
/*
* Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
mz61581_pins: mz61581_pins {
brcm,pins = <4 15 18 25>;
brcm,function = <0 1 1 1>; /* in out out out */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
mz61581: mz61581@0{
compatible = "samsung,s6d02a1";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mz61581_pins>;
spi-max-frequency = <128000000>;
spi-cpol;
spi-cpha;
width = <320>;
height = <480>;
rotate = <270>;
bgr;
fps = <30>;
buswidth = <8>;
reset-gpios = <&gpio 15 0>;
dc-gpios = <&gpio 25 0>;
led-gpios = <&gpio 18 0>;
init = <0x10000b0 00
0x1000011
0x20000ff
0x10000b3 0x02 0x00 0x00 0x00
0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
0x10000c1 0x08 0x16 0x08 0x08
0x10000c4 0x11 0x07 0x03 0x03
0x10000c6 0x00
0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
0x1000035 0x00
0x1000036 0xa0
0x100003a 0x55
0x1000044 0x00 0x01
0x10000d0 0x07 0x07 0x1d 0x03
0x10000d1 0x03 0x30 0x10
0x10000d2 0x03 0x14 0x04
0x1000029
0x100002c>;
/* This is a workaround to make sure the init sequence slows down and doesn't fail */
debug = <3>;
};
mz61581_ts: mz61581_ts@1 {
compatible = "ti,ads7846";
reg = <1>;
spi-max-frequency = <2000000>;
interrupts = <4 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 4 0>;
ti,x-plate-ohms = /bits/ 16 <60>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
__overrides__ {
speed = <&mz61581>, "spi-max-frequency:0";
rotate = <&mz61581>, "rotate:0";
fps = <&mz61581>, "fps:0";
debug = <&mz61581>, "debug:0";
xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
};
};

View File

@@ -0,0 +1,22 @@
// Definitions for PCF2127 Real Time Clock
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcf2127@51 {
compatible = "nxp,pcf2127";
reg = <0x51>;
status = "okay";
};
};
};
};

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@@ -0,0 +1,22 @@
// Definitions for PCF8523 Real Time Clock
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
status = "okay";
};
};
};
};

View File

@@ -0,0 +1,96 @@
/*
* Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
piscreen_pins: piscreen_pins {
brcm,pins = <17 25 24 22>;
brcm,function = <0 1 1 1>; /* in out out out */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
piscreen: piscreen@0{
compatible = "ilitek,ili9486";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&piscreen_pins>;
spi-max-frequency = <24000000>;
rotate = <270>;
bgr;
fps = <30>;
buswidth = <8>;
regwidth = <16>;
reset-gpios = <&gpio 25 0>;
dc-gpios = <&gpio 24 0>;
led-gpios = <&gpio 22 1>;
debug = <0>;
init = <0x10000b0 0x00
0x1000011
0x20000ff
0x100003a 0x55
0x1000036 0x28
0x10000c2 0x44
0x10000c5 0x00 0x00 0x00 0x00
0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
0x1000011
0x1000029>;
};
piscreen_ts: piscreen-ts@1 {
compatible = "ti,ads7846";
reg = <1>;
spi-max-frequency = <2000000>;
interrupts = <17 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 17 0>;
ti,swap-xy;
ti,x-plate-ohms = /bits/ 16 <100>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
__overrides__ {
speed = <&piscreen>,"spi-max-frequency:0";
rotate = <&piscreen>,"rotate:0";
fps = <&piscreen>,"fps:0";
debug = <&piscreen>,"debug:0";
xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
};
};

View File

@@ -0,0 +1,115 @@
/*
* Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
pitft_pins: pitft_pins {
brcm,pins = <24 25>;
brcm,function = <0 1>; /* in out */
brcm,pull = <2 0>; /* pullup none */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
pitft: pitft@0{
compatible = "ilitek,ili9340";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pitft_pins>;
spi-max-frequency = <32000000>;
rotate = <90>;
fps = <25>;
bgr;
buswidth = <8>;
dc-gpios = <&gpio 25 0>;
debug = <0>;
};
pitft_ts@1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stmpe610";
reg = <1>;
spi-max-frequency = <500000>;
irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
interrupts = <24 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
interrupt-controller;
stmpe_touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <2>;
st,ave-ctrl = <3>;
st,touch-det-delay = <4>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <0>;
};
stmpe_gpio: stmpe_gpio {
#gpio-cells = <2>;
compatible = "st,stmpe-gpio";
/*
* only GPIO2 is wired/available
* and it is wired to the backlight
*/
st,norequest-mask = <0x7b>;
};
};
};
};
fragment@3 {
target-path = "/soc";
__overlay__ {
backlight {
compatible = "gpio-backlight";
gpios = <&stmpe_gpio 2 0>;
default-on;
};
};
};
__overrides__ {
speed = <&pitft>,"spi-max-frequency:0";
rotate = <&pitft>,"rotate:0";
fps = <&pitft>,"fps:0";
debug = <&pitft>,"debug:0";
};
};

View File

@@ -0,0 +1,34 @@
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target-path = "/";
__overlay__ {
pps: pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pps_pins>;
gpios = <&gpio 18 0>;
status = "okay";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
pps_pins: pps_pins {
brcm,pins = <18>;
brcm,function = <0>; // in
brcm,pull = <0>; // off
};
};
};
__overrides__ {
gpiopin = <&pps>,"gpios:4",
<&pps_pins>,"brcm,pins:0";
};
};

View File

@@ -0,0 +1,34 @@
// Definitions for RPi DAC
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "rpi,rpi-dac";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target-path = "/";
__overlay__ {
pcm1794a-codec {
#sound-dai-cells = <0>;
compatible = "ti,pcm1794a";
status = "okay";
};
};
};
};

View File

@@ -0,0 +1,82 @@
/*
* Device Tree overlay for rpi-display by Watterott
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
rpi_display_pins: rpi_display_pins {
brcm,pins = <18 23 24 25>;
brcm,function = <1 1 1 0>; /* out out out in */
brcm,pull = <0 0 0 2>; /* - - - up */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
rpidisplay: rpi-display@0{
compatible = "ilitek,ili9341";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&rpi_display_pins>;
spi-max-frequency = <32000000>;
rotate = <270>;
bgr;
fps = <30>;
buswidth = <8>;
reset-gpios = <&gpio 23 0>;
dc-gpios = <&gpio 24 0>;
led-gpios = <&gpio 18 1>;
debug = <0>;
};
rpidisplay_ts: rpi-display-ts@1 {
compatible = "ti,ads7846";
reg = <1>;
spi-max-frequency = <2000000>;
interrupts = <25 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 25 0>;
ti,x-plate-ohms = /bits/ 16 <60>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
__overrides__ {
speed = <&rpidisplay>,"spi-max-frequency:0";
rotate = <&rpidisplay>,"rotate:0";
fps = <&rpidisplay>,"fps:0";
debug = <&rpidisplay>,"debug:0";
xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
};
};

View File

@@ -0,0 +1,39 @@
// Definitions for Rpi-Proto
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target = <&sound>;
__overlay__ {
compatible = "rpi,rpi-proto";
i2s-controller = <&i2s>;
status = "okay";
};
};
fragment@1 {
target = <&i2s>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wm8731@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8731";
reg = <0x1a>;
status = "okay";
};
};
};
};

View File

@@ -0,0 +1,78 @@
/dts-v1/;
/plugin/;
/{
compatible = "brcm,bcm2708";
fragment@0 {
target = <&soc>;
__overlay__ {
#address-cells = <1>;
#size-cells = <1>;
sdhost: sdhost@7e202000 {
compatible = "brcm,bcm2835-sdhost";
reg = <0x7e202000 0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdhost_pins>;
interrupts = <2 24>;
clocks = <&clk_sdhost>;
dmas = <&dma 13>,
<&dma 13>;
dma-names = "tx", "rx";
brcm,delay-after-stop = <0>;
brcm,overclock-50 = <0>;
status = "okay";
};
};
};
fragment@1 {
target = <&clocks>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
clk_sdhost: sdhost {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-output-names = "sdhost";
clock-frequency = <250000000>;
};
};
};
fragment@2 {
target = <&gpio>;
__overlay__ {
sdhost_pins: sdhost_pins {
brcm,pins = <48 49 50 51 52 53>;
brcm,function = <4>; /* alt0 */
};
};
};
fragment@3 {
target = <&mmc>;
__overlay__ {
/* Find a way to disable the other driver */
compatible = "";
status = "disabled";
};
};
fragment@4 {
target-path = "/__overrides__";
__overlay__ {
sdhost_freq = <&clk_sdhost>,"clock-frequency:0";
};
};
__overrides__ {
delay_after_stop = <&sdhost>,"brcm,delay-after-stop:0";
overclock_50 = <&sdhost>,"brcm,overclock-50:0";
force_pio = <&sdhost>,"brcm,force-pio?";
sdhost_freq = <&clk_sdhost>,"clock-frequency:0";
};
};

View File

@@ -0,0 +1,18 @@
/*
* Device tree overlay for spi-bcm2835
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
/* setting up compatiblity to allow loading the spi-bcm2835 driver */
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
compatible = "brcm,bcm2708-spi";
};
};
};

View File

@@ -0,0 +1,18 @@
/*
* Device tree overlay for spi-bcm2835
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
/* setting up compatiblity to allow loading the spi-bcm2835 driver */
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
compatible = "brcm,bcm2835-spi";
};
};
};

View File

@@ -0,0 +1,216 @@
/*
* tinylcd35-overlay.dts
*
* -------------------------------------------------
* www.tinlylcd.com
* -------------------------------------------------
* Device---Driver-----BUS GPIO's
* display tinylcd35 spi0.0 25 24 18
* touch ads7846 spi0.1 5
* rtc ds1307 i2c1-0068
* rtc pcf8563 i2c1-0051
* keypad gpio-keys --------- 17 22 27 23 28
*
*
* TinyLCD.com 3.5 inch TFT
*
* Version 001
* 5/3/2015 -- Noralf Trønnes Initial Device tree framework
* 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
*
*/
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
spidev@0{
status = "disabled";
};
spidev@1{
status = "disabled";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
tinylcd35_pins: tinylcd35_pins {
brcm,pins = <25 24 18>;
brcm,function = <1>; /* out */
};
tinylcd35_ts_pins: tinylcd35_ts_pins {
brcm,pins = <5>;
brcm,function = <0>; /* in */
};
keypad_pins: keypad_pins {
brcm,pins = <4 17 22 23 27>;
brcm,function = <0>; /* in */
brcm,pull = <1>; /* down */
};
};
};
fragment@2 {
target = <&spi0>;
__overlay__ {
/* needed to avoid dtc warning */
#address-cells = <1>;
#size-cells = <0>;
tinylcd35: tinylcd35@0{
compatible = "neosec,tinylcd";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&tinylcd35_pins>,
<&tinylcd35_ts_pins>;
spi-max-frequency = <48000000>;
rotate = <270>;
fps = <20>;
bgr;
buswidth = <8>;
reset-gpios = <&gpio 25 0>;
dc-gpios = <&gpio 24 0>;
led-gpios = <&gpio 18 1>;
debug = <0>;
init = <0x10000B0 0x80
0x10000C0 0x0A 0x0A
0x10000C1 0x01 0x01
0x10000C2 0x33
0x10000C5 0x00 0x42 0x80
0x10000B1 0xD0 0x11
0x10000B4 0x02
0x10000B6 0x00 0x22 0x3B
0x10000B7 0x07
0x1000036 0x58
0x10000F0 0x36 0xA5 0xD3
0x10000E5 0x80
0x10000E5 0x01
0x10000B3 0x00
0x10000E5 0x00
0x10000F0 0x36 0xA5 0x53
0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
0x100003A 0x55
0x1000011
0x2000001
0x1000029>;
};
tinylcd35_ts: tinylcd35_ts@1 {
compatible = "ti,ads7846";
reg = <1>;
status = "disabled";
spi-max-frequency = <2000000>;
interrupts = <5 2>; /* high-to-low edge triggered */
interrupt-parent = <&gpio>;
pendown-gpio = <&gpio 5 0>;
ti,x-plate-ohms = /bits/ 16 <100>;
ti,pressure-max = /bits/ 16 <255>;
};
};
};
/* RTC */
fragment@3 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
pcf8563: pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "disabled";
};
};
};
fragment@4 {
target = <&i2c1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
ds1307: ds1307@68 {
compatible = "maxim,ds1307";
reg = <0x68>;
status = "disabled";
};
};
};
/*
* Values for input event code is found under the
* 'Keys and buttons' heading in include/uapi/linux/input.h
*/
fragment@5 {
target-path = "/soc";
__overlay__ {
keypad: keypad {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&keypad_pins>;
status = "disabled";
autorepeat;
button@17 {
label = "GPIO KEY_UP";
linux,code = <103>;
gpios = <&gpio 17 0>;
};
button@22 {
label = "GPIO KEY_DOWN";
linux,code = <108>;
gpios = <&gpio 22 0>;
};
button@27 {
label = "GPIO KEY_LEFT";
linux,code = <105>;
gpios = <&gpio 27 0>;
};
button@23 {
label = "GPIO KEY_RIGHT";
linux,code = <106>;
gpios = <&gpio 23 0>;
};
button@4 {
label = "GPIO KEY_ENTER";
linux,code = <28>;
gpios = <&gpio 4 0>;
};
};
};
};
__overrides__ {
speed = <&tinylcd35>,"spi-max-frequency:0";
rotate = <&tinylcd35>,"rotate:0";
fps = <&tinylcd35>,"fps:0";
debug = <&tinylcd35>,"debug:0";
touch = <&tinylcd35_ts>,"status";
touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
<&tinylcd35_ts>,"interrupts:0",
<&tinylcd35_ts>,"pendown-gpio:4";
xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
rtc-pcf = <&i2c1>,"status",
<&pcf8563>,"status";
rtc-ds = <&i2c1>,"status",
<&ds1307>,"status";
keypad = <&keypad>,"status";
};
};

View File

@@ -0,0 +1,39 @@
// Definitions for w1-gpio module (without external pullup)
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target-path = "/";
__overlay__ {
w1: onewire@0 {
compatible = "w1-gpio";
pinctrl-names = "default";
pinctrl-0 = <&w1_pins>;
gpios = <&gpio 4 0>;
rpi,parasitic-power = <0>;
status = "okay";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
w1_pins: w1_pins {
brcm,pins = <4>;
brcm,function = <0>; // in (initially)
brcm,pull = <0>; // off
};
};
};
__overrides__ {
gpiopin = <&w1>,"gpios:4",
<&w1_pins>,"brcm,pins:0";
pullup = <&w1>,"rpi,parasitic-power:0";
};
};

View File

@@ -0,0 +1,41 @@
// Definitions for w1-gpio module (with external pullup)
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2708";
fragment@0 {
target-path = "/";
__overlay__ {
w1: onewire@0 {
compatible = "w1-gpio";
pinctrl-names = "default";
pinctrl-0 = <&w1_pins>;
gpios = <&gpio 4 0>, <&gpio 5 1>;
rpi,parasitic-power = <0>;
status = "okay";
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
w1_pins: w1_pins {
brcm,pins = <4 5>;
brcm,function = <0 1>; // in out
brcm,pull = <0 0>; // off off
};
};
};
__overrides__ {
gpiopin = <&w1>,"gpios:4",
<&w1_pins>,"brcm,pins:0";
extpullup = <&w1>,"gpios:16",
<&w1_pins>,"brcm,pins:4";
pullup = <&w1>,"rpi,parasitic-power:0";
};
};

View File

@@ -1017,23 +1017,6 @@
status = "disabled";
};
vmmci: regulator-gpio {
compatible = "regulator-gpio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-name = "mmci-reg";
regulator-type = "voltage";
startup-delay-us = <100>;
enable-active-high;
states = <1800000 0x1
2900000 0x0>;
status = "disabled";
};
mcde@a0350000 {
compatible = "stericsson,mcde";
reg = <0xa0350000 0x1000>, /* MCDE */

View File

@@ -111,6 +111,21 @@
pinctrl-1 = <&i2c3_sleep_mode>;
};
vmmci: regulator-gpio {
compatible = "regulator-gpio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-name = "mmci-reg";
regulator-type = "voltage";
startup-delay-us = <100>;
enable-active-high;
states = <1800000 0x1
2900000 0x0>;
};
// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;

View File

@@ -146,8 +146,21 @@
};
vmmci: regulator-gpio {
compatible = "regulator-gpio";
gpios = <&gpio7 4 0x4>;
enable-gpio = <&gpio6 25 0x4>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-name = "mmci-reg";
regulator-type = "voltage";
startup-delay-us = <100>;
enable-active-high;
states = <1800000 0x1
2900000 0x0>;
};
// External Micro SD slot

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -1,5 +1,6 @@
#include <asm/assembler.h>
#ifndef CONFIG_ARCH_BCM2709
/*
* Interrupt handling. Preserves r7, r8, r9
*/
@@ -28,6 +29,7 @@
#endif
9997:
.endm
#endif
.macro arch_irq_handler, symbol_name
.align 5

View File

@@ -145,12 +145,22 @@ static inline unsigned long arch_local_save_flags(void)
}
/*
* restore saved IRQ & FIQ state
* restore saved IRQ state
*/
static inline void arch_local_irq_restore(unsigned long flags)
{
asm volatile(
" msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
unsigned long temp = 0;
flags &= ~(1 << 6);
asm volatile (
" mrs %0, cpsr"
: "=r" (temp)
:
: "memory", "cc");
/* Preserve FIQ bit */
temp &= (1 << 6);
flags = flags | temp;
asm volatile (
" msr cpsr_c, %0 @ local_irq_restore"
:
: "r" (flags)
: "memory", "cc");

View File

@@ -24,6 +24,11 @@ extern void * memchr(const void *, int, __kernel_size_t);
#define __HAVE_ARCH_MEMSET
extern void * memset(void *, int, __kernel_size_t);
#ifdef CONFIG_MACH_BCM2708
#define __HAVE_ARCH_MEMCMP
extern int memcmp(const void *, const void *, size_t);
#endif
extern void __memzero(void *ptr, __kernel_size_t n);
#define memset(p,v,n) \

View File

@@ -475,6 +475,7 @@ do { \
#ifdef CONFIG_MMU
extern unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n);
extern unsigned long __must_check __copy_from_user_std(void *to, const void __user *from, unsigned long n);
extern unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n);
extern unsigned long __must_check __copy_to_user_std(void __user *to, const void *from, unsigned long n);
extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);

View File

@@ -86,7 +86,7 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o
ifeq ($(CONFIG_ARM_PSCI),y)
obj-y += psci.o
obj-y += psci.o psci-call.o
obj-$(CONFIG_SMP) += psci_smp.o
endif

View File

@@ -47,3 +47,7 @@ ENTRY(__get_fiq_regs)
mov r0, r0 @ avoid hazard prior to ARMv4
ret lr
ENDPROC(__get_fiq_regs)
ENTRY(__FIQ_Branch)
mov pc, r8
ENDPROC(__FIQ_Branch)

View File

@@ -680,6 +680,14 @@ ARM_BE8(rev16 ip, ip)
ldrcc r7, [r4], #4 @ use branch for delay slot
bcc 1b
ret lr
nop
nop
nop
nop
nop
nop
nop
nop
#endif
ENDPROC(__fixup_a_pv_table)

View File

@@ -172,6 +172,16 @@ void arch_cpu_idle_dead(void)
}
#endif
char bcm2708_reboot_mode = 'h';
int __init reboot_setup(char *str)
{
bcm2708_reboot_mode = str[0];
return 1;
}
__setup("reboot=", reboot_setup);
/*
* Called by kexec, immediately prior to machine_kexec().
*

View File

@@ -0,0 +1,31 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Copyright (C) 2015 ARM Limited
*
* Author: Mark Rutland <mark.rutland@arm.com>
*/
#include <linux/linkage.h>
#include <asm/opcodes-sec.h>
#include <asm/opcodes-virt.h>
/* int __invoke_psci_fn_hvc(u32 function_id, u32 arg0, u32 arg1, u32 arg2) */
ENTRY(__invoke_psci_fn_hvc)
__HVC(0)
bx lr
ENDPROC(__invoke_psci_fn_hvc)
/* int __invoke_psci_fn_smc(u32 function_id, u32 arg0, u32 arg1, u32 arg2) */
ENTRY(__invoke_psci_fn_smc)
__SMC(0)
bx lr
ENDPROC(__invoke_psci_fn_smc)

View File

@@ -23,8 +23,6 @@
#include <asm/compiler.h>
#include <asm/errno.h>
#include <asm/opcodes-sec.h>
#include <asm/opcodes-virt.h>
#include <asm/psci.h>
#include <asm/system_misc.h>
@@ -33,6 +31,9 @@ struct psci_operations psci_ops;
static int (*invoke_psci_fn)(u32, u32, u32, u32);
typedef int (*psci_initcall_t)(const struct device_node *);
asmlinkage int __invoke_psci_fn_hvc(u32, u32, u32, u32);
asmlinkage int __invoke_psci_fn_smc(u32, u32, u32, u32);
enum psci_function {
PSCI_FN_CPU_SUSPEND,
PSCI_FN_CPU_ON,
@@ -71,40 +72,6 @@ static u32 psci_power_state_pack(struct psci_power_state state)
& PSCI_0_2_POWER_STATE_AFFL_MASK);
}
/*
* The following two functions are invoked via the invoke_psci_fn pointer
* and will not be inlined, allowing us to piggyback on the AAPCS.
*/
static noinline int __invoke_psci_fn_hvc(u32 function_id, u32 arg0, u32 arg1,
u32 arg2)
{
asm volatile(
__asmeq("%0", "r0")
__asmeq("%1", "r1")
__asmeq("%2", "r2")
__asmeq("%3", "r3")
__HVC(0)
: "+r" (function_id)
: "r" (arg0), "r" (arg1), "r" (arg2));
return function_id;
}
static noinline int __invoke_psci_fn_smc(u32 function_id, u32 arg0, u32 arg1,
u32 arg2)
{
asm volatile(
__asmeq("%0", "r0")
__asmeq("%1", "r1")
__asmeq("%2", "r2")
__asmeq("%3", "r3")
__SMC(0)
: "+r" (function_id)
: "r" (arg0), "r" (arg1), "r" (arg2));
return function_id;
}
static int psci_get_version(void)
{
int err;

View File

@@ -6,9 +6,8 @@
lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
csumpartialcopy.o csumpartialcopyuser.o clearbit.o \
delay.o delay-loop.o findbit.o memchr.o memcpy.o \
memmove.o memset.o memzero.o setbit.o \
strchr.o strrchr.o \
delay.o delay-loop.o findbit.o memchr.o memzero.o \
setbit.o strchr.o strrchr.o \
testchangebit.o testclearbit.o testsetbit.o \
ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
ucmpdi2.o lib1funcs.o div64.o \
@@ -18,6 +17,16 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
mmu-y := clear_user.o copy_page.o getuser.o putuser.o \
copy_from_user.o copy_to_user.o
# Choose optimised implementations for Raspberry Pi
ifeq ($(CONFIG_MACH_BCM2708),y)
CFLAGS_uaccess_with_memcpy.o += -DCOPY_FROM_USER_THRESHOLD=1600
CFLAGS_uaccess_with_memcpy.o += -DCOPY_TO_USER_THRESHOLD=672
obj-$(CONFIG_MODULES) += exports_rpi.o
lib-y += memcpy_rpi.o memmove_rpi.o memset_rpi.o memcmp_rpi.o
else
lib-y += memcpy.o memmove.o memset.o
endif
# using lib_ here won't override already available weak symbols
obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o

159
arch/arm/lib/arm-mem.h Normal file
View File

@@ -0,0 +1,159 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.macro myfunc fname
.func fname
.global fname
fname:
.endm
.macro preload_leading_step1 backwards, ptr, base
/* If the destination is already 16-byte aligned, then we need to preload
* between 0 and prefetch_distance (inclusive) cache lines ahead so there
* are no gaps when the inner loop starts.
*/
.if backwards
sub ptr, base, #1
bic ptr, ptr, #31
.else
bic ptr, base, #31
.endif
.set OFFSET, 0
.rept prefetch_distance+1
pld [ptr, #OFFSET]
.if backwards
.set OFFSET, OFFSET-32
.else
.set OFFSET, OFFSET+32
.endif
.endr
.endm
.macro preload_leading_step2 backwards, ptr, base, leading_bytes, tmp
/* However, if the destination is not 16-byte aligned, we may need to
* preload one more cache line than that. The question we need to ask is:
* are the leading bytes more than the amount by which the source
* pointer will be rounded down for preloading, and if so, by how many
* cache lines?
*/
.if backwards
/* Here we compare against how many bytes we are into the
* cache line, counting down from the highest such address.
* Effectively, we want to calculate
* leading_bytes = dst&15
* cacheline_offset = 31-((src-leading_bytes-1)&31)
* extra_needed = leading_bytes - cacheline_offset
* and test if extra_needed is <= 0, or rearranging:
* leading_bytes + (src-leading_bytes-1)&31 <= 31
*/
mov tmp, base, lsl #32-5
sbc tmp, tmp, leading_bytes, lsl #32-5
adds tmp, tmp, leading_bytes, lsl #32-5
bcc 61f
pld [ptr, #-32*(prefetch_distance+1)]
.else
/* Effectively, we want to calculate
* leading_bytes = (-dst)&15
* cacheline_offset = (src+leading_bytes)&31
* extra_needed = leading_bytes - cacheline_offset
* and test if extra_needed is <= 0.
*/
mov tmp, base, lsl #32-5
add tmp, tmp, leading_bytes, lsl #32-5
rsbs tmp, tmp, leading_bytes, lsl #32-5
bls 61f
pld [ptr, #32*(prefetch_distance+1)]
.endif
61:
.endm
.macro preload_trailing backwards, base, remain, tmp
/* We need either 0, 1 or 2 extra preloads */
.if backwards
rsb tmp, base, #0
mov tmp, tmp, lsl #32-5
.else
mov tmp, base, lsl #32-5
.endif
adds tmp, tmp, remain, lsl #32-5
adceqs tmp, tmp, #0
/* The instruction above has two effects: ensures Z is only
* set if C was clear (so Z indicates that both shifted quantities
* were 0), and clears C if Z was set (so C indicates that the sum
* of the shifted quantities was greater and not equal to 32) */
beq 82f
.if backwards
sub tmp, base, #1
bic tmp, tmp, #31
.else
bic tmp, base, #31
.endif
bcc 81f
.if backwards
pld [tmp, #-32*(prefetch_distance+1)]
81:
pld [tmp, #-32*prefetch_distance]
.else
pld [tmp, #32*(prefetch_distance+2)]
81:
pld [tmp, #32*(prefetch_distance+1)]
.endif
82:
.endm
.macro preload_all backwards, narrow_case, shift, base, remain, tmp0, tmp1
.if backwards
sub tmp0, base, #1
bic tmp0, tmp0, #31
pld [tmp0]
sub tmp1, base, remain, lsl #shift
.else
bic tmp0, base, #31
pld [tmp0]
add tmp1, base, remain, lsl #shift
sub tmp1, tmp1, #1
.endif
bic tmp1, tmp1, #31
cmp tmp1, tmp0
beq 92f
.if narrow_case
/* In this case, all the data fits in either 1 or 2 cache lines */
pld [tmp1]
.else
91:
.if backwards
sub tmp0, tmp0, #32
.else
add tmp0, tmp0, #32
.endif
cmp tmp0, tmp1
pld [tmp0]
bne 91b
.endif
92:
.endm

View File

@@ -89,11 +89,13 @@
.text
ENTRY(__copy_from_user)
ENTRY(__copy_from_user_std)
WEAK(__copy_from_user)
#include "copy_template.S"
ENDPROC(__copy_from_user)
ENDPROC(__copy_from_user_std)
.pushsection .fixup,"ax"
.align 0

View File

@@ -0,0 +1,37 @@
/**
* Copyright (c) 2014, Raspberry Pi (Trading) Ltd.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The names of the above-listed copyright holders may not be used
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2, as published by the Free
* Software Foundation.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/kernel.h>
#include <linux/module.h>
EXPORT_SYMBOL(memcmp);

285
arch/arm/lib/memcmp_rpi.S Normal file
View File

@@ -0,0 +1,285 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include "arm-mem.h"
/* Prevent the stack from becoming executable */
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
.text
.arch armv6
.object_arch armv4
.arm
.altmacro
.p2align 2
.macro memcmp_process_head unaligned
.if unaligned
ldr DAT0, [S_1], #4
ldr DAT1, [S_1], #4
ldr DAT2, [S_1], #4
ldr DAT3, [S_1], #4
.else
ldmia S_1!, {DAT0, DAT1, DAT2, DAT3}
.endif
ldmia S_2!, {DAT4, DAT5, DAT6, DAT7}
.endm
.macro memcmp_process_tail
cmp DAT0, DAT4
cmpeq DAT1, DAT5
cmpeq DAT2, DAT6
cmpeq DAT3, DAT7
bne 200f
.endm
.macro memcmp_leading_31bytes
movs DAT0, OFF, lsl #31
ldrmib DAT0, [S_1], #1
ldrcsh DAT1, [S_1], #2
ldrmib DAT4, [S_2], #1
ldrcsh DAT5, [S_2], #2
movpl DAT0, #0
movcc DAT1, #0
movpl DAT4, #0
movcc DAT5, #0
submi N, N, #1
subcs N, N, #2
cmp DAT0, DAT4
cmpeq DAT1, DAT5
bne 200f
movs DAT0, OFF, lsl #29
ldrmi DAT0, [S_1], #4
ldrcs DAT1, [S_1], #4
ldrcs DAT2, [S_1], #4
ldrmi DAT4, [S_2], #4
ldmcsia S_2!, {DAT5, DAT6}
movpl DAT0, #0
movcc DAT1, #0
movcc DAT2, #0
movpl DAT4, #0
movcc DAT5, #0
movcc DAT6, #0
submi N, N, #4
subcs N, N, #8
cmp DAT0, DAT4
cmpeq DAT1, DAT5
cmpeq DAT2, DAT6
bne 200f
tst OFF, #16
beq 105f
memcmp_process_head 1
sub N, N, #16
memcmp_process_tail
105:
.endm
.macro memcmp_trailing_15bytes unaligned
movs N, N, lsl #29
.if unaligned
ldrcs DAT0, [S_1], #4
ldrcs DAT1, [S_1], #4
.else
ldmcsia S_1!, {DAT0, DAT1}
.endif
ldrmi DAT2, [S_1], #4
ldmcsia S_2!, {DAT4, DAT5}
ldrmi DAT6, [S_2], #4
movcc DAT0, #0
movcc DAT1, #0
movpl DAT2, #0
movcc DAT4, #0
movcc DAT5, #0
movpl DAT6, #0
cmp DAT0, DAT4
cmpeq DAT1, DAT5
cmpeq DAT2, DAT6
bne 200f
movs N, N, lsl #2
ldrcsh DAT0, [S_1], #2
ldrmib DAT1, [S_1]
ldrcsh DAT4, [S_2], #2
ldrmib DAT5, [S_2]
movcc DAT0, #0
movpl DAT1, #0
movcc DAT4, #0
movpl DAT5, #0
cmp DAT0, DAT4
cmpeq DAT1, DAT5
bne 200f
.endm
.macro memcmp_long_inner_loop unaligned
110:
memcmp_process_head unaligned
pld [S_2, #prefetch_distance*32 + 16]
memcmp_process_tail
memcmp_process_head unaligned
pld [S_1, OFF]
memcmp_process_tail
subs N, N, #32
bhs 110b
/* Just before the final (prefetch_distance+1) 32-byte blocks,
* deal with final preloads */
preload_trailing 0, S_1, N, DAT0
preload_trailing 0, S_2, N, DAT0
add N, N, #(prefetch_distance+2)*32 - 16
120:
memcmp_process_head unaligned
memcmp_process_tail
subs N, N, #16
bhs 120b
/* Trailing words and bytes */
tst N, #15
beq 199f
memcmp_trailing_15bytes unaligned
199: /* Reached end without detecting a difference */
mov a1, #0
setend le
pop {DAT1-DAT6, pc}
.endm
.macro memcmp_short_inner_loop unaligned
subs N, N, #16 /* simplifies inner loop termination */
blo 122f
120:
memcmp_process_head unaligned
memcmp_process_tail
subs N, N, #16
bhs 120b
122: /* Trailing words and bytes */
tst N, #15
beq 199f
memcmp_trailing_15bytes unaligned
199: /* Reached end without detecting a difference */
mov a1, #0
setend le
pop {DAT1-DAT6, pc}
.endm
/*
* int memcmp(const void *s1, const void *s2, size_t n);
* On entry:
* a1 = pointer to buffer 1
* a2 = pointer to buffer 2
* a3 = number of bytes to compare (as unsigned chars)
* On exit:
* a1 = >0/=0/<0 if s1 >/=/< s2
*/
.set prefetch_distance, 2
ENTRY(memcmp)
S_1 .req a1
S_2 .req a2
N .req a3
DAT0 .req a4
DAT1 .req v1
DAT2 .req v2
DAT3 .req v3
DAT4 .req v4
DAT5 .req v5
DAT6 .req v6
DAT7 .req ip
OFF .req lr
push {DAT1-DAT6, lr}
setend be /* lowest-addressed bytes are most significant */
/* To preload ahead as we go, we need at least (prefetch_distance+2) 32-byte blocks */
cmp N, #(prefetch_distance+3)*32 - 1
blo 170f
/* Long case */
/* Adjust N so that the decrement instruction can also test for
* inner loop termination. We want it to stop when there are
* (prefetch_distance+1) complete blocks to go. */
sub N, N, #(prefetch_distance+2)*32
preload_leading_step1 0, DAT0, S_1
preload_leading_step1 0, DAT1, S_2
tst S_2, #31
beq 154f
rsb OFF, S_2, #0 /* no need to AND with 15 here */
preload_leading_step2 0, DAT0, S_1, OFF, DAT2
preload_leading_step2 0, DAT1, S_2, OFF, DAT2
memcmp_leading_31bytes
154: /* Second source now cacheline (32-byte) aligned; we have at
* least one prefetch to go. */
/* Prefetch offset is best selected such that it lies in the
* first 8 of each 32 bytes - but it's just as easy to aim for
* the first one */
and OFF, S_1, #31
rsb OFF, OFF, #32*prefetch_distance
tst S_1, #3
bne 140f
memcmp_long_inner_loop 0
140: memcmp_long_inner_loop 1
170: /* Short case */
teq N, #0
beq 199f
preload_all 0, 0, 0, S_1, N, DAT0, DAT1
preload_all 0, 0, 0, S_2, N, DAT0, DAT1
tst S_2, #3
beq 174f
172: subs N, N, #1
blo 199f
ldrb DAT0, [S_1], #1
ldrb DAT4, [S_2], #1
cmp DAT0, DAT4
bne 200f
tst S_2, #3
bne 172b
174: /* Second source now 4-byte aligned; we have 0 or more bytes to go */
tst S_1, #3
bne 140f
memcmp_short_inner_loop 0
140: memcmp_short_inner_loop 1
200: /* Difference found: determine sign. */
movhi a1, #1
movlo a1, #-1
setend le
pop {DAT1-DAT6, pc}
.unreq S_1
.unreq S_2
.unreq N
.unreq DAT0
.unreq DAT1
.unreq DAT2
.unreq DAT3
.unreq DAT4
.unreq DAT5
.unreq DAT6
.unreq DAT7
.unreq OFF
ENDPROC(memcmp)

59
arch/arm/lib/memcpy_rpi.S Normal file
View File

@@ -0,0 +1,59 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include "arm-mem.h"
#include "memcpymove.h"
/* Prevent the stack from becoming executable */
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
.text
.arch armv6
.object_arch armv4
.arm
.altmacro
.p2align 2
/*
* void *memcpy(void * restrict s1, const void * restrict s2, size_t n);
* On entry:
* a1 = pointer to destination
* a2 = pointer to source
* a3 = number of bytes to copy
* On exit:
* a1 preserved
*/
.set prefetch_distance, 3
ENTRY(memcpy)
memcpy 0
ENDPROC(memcpy)

506
arch/arm/lib/memcpymove.h Normal file
View File

@@ -0,0 +1,506 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.macro unaligned_words backwards, align, use_pld, words, r0, r1, r2, r3, r4, r5, r6, r7, r8
.if words == 1
.if backwards
mov r1, r0, lsl #32-align*8
ldr r0, [S, #-4]!
orr r1, r1, r0, lsr #align*8
str r1, [D, #-4]!
.else
mov r0, r1, lsr #align*8
ldr r1, [S, #4]!
orr r0, r0, r1, lsl #32-align*8
str r0, [D], #4
.endif
.elseif words == 2
.if backwards
ldr r1, [S, #-4]!
mov r2, r0, lsl #32-align*8
ldr r0, [S, #-4]!
orr r2, r2, r1, lsr #align*8
mov r1, r1, lsl #32-align*8
orr r1, r1, r0, lsr #align*8
stmdb D!, {r1, r2}
.else
ldr r1, [S, #4]!
mov r0, r2, lsr #align*8
ldr r2, [S, #4]!
orr r0, r0, r1, lsl #32-align*8
mov r1, r1, lsr #align*8
orr r1, r1, r2, lsl #32-align*8
stmia D!, {r0, r1}
.endif
.elseif words == 4
.if backwards
ldmdb S!, {r2, r3}
mov r4, r0, lsl #32-align*8
ldmdb S!, {r0, r1}
orr r4, r4, r3, lsr #align*8
mov r3, r3, lsl #32-align*8
orr r3, r3, r2, lsr #align*8
mov r2, r2, lsl #32-align*8
orr r2, r2, r1, lsr #align*8
mov r1, r1, lsl #32-align*8
orr r1, r1, r0, lsr #align*8
stmdb D!, {r1, r2, r3, r4}
.else
ldmib S!, {r1, r2}
mov r0, r4, lsr #align*8
ldmib S!, {r3, r4}
orr r0, r0, r1, lsl #32-align*8
mov r1, r1, lsr #align*8
orr r1, r1, r2, lsl #32-align*8
mov r2, r2, lsr #align*8
orr r2, r2, r3, lsl #32-align*8
mov r3, r3, lsr #align*8
orr r3, r3, r4, lsl #32-align*8
stmia D!, {r0, r1, r2, r3}
.endif
.elseif words == 8
.if backwards
ldmdb S!, {r4, r5, r6, r7}
mov r8, r0, lsl #32-align*8
ldmdb S!, {r0, r1, r2, r3}
.if use_pld
pld [S, OFF]
.endif
orr r8, r8, r7, lsr #align*8
mov r7, r7, lsl #32-align*8
orr r7, r7, r6, lsr #align*8
mov r6, r6, lsl #32-align*8
orr r6, r6, r5, lsr #align*8
mov r5, r5, lsl #32-align*8
orr r5, r5, r4, lsr #align*8
mov r4, r4, lsl #32-align*8
orr r4, r4, r3, lsr #align*8
mov r3, r3, lsl #32-align*8
orr r3, r3, r2, lsr #align*8
mov r2, r2, lsl #32-align*8
orr r2, r2, r1, lsr #align*8
mov r1, r1, lsl #32-align*8
orr r1, r1, r0, lsr #align*8
stmdb D!, {r5, r6, r7, r8}
stmdb D!, {r1, r2, r3, r4}
.else
ldmib S!, {r1, r2, r3, r4}
mov r0, r8, lsr #align*8
ldmib S!, {r5, r6, r7, r8}
.if use_pld
pld [S, OFF]
.endif
orr r0, r0, r1, lsl #32-align*8
mov r1, r1, lsr #align*8
orr r1, r1, r2, lsl #32-align*8
mov r2, r2, lsr #align*8
orr r2, r2, r3, lsl #32-align*8
mov r3, r3, lsr #align*8
orr r3, r3, r4, lsl #32-align*8
mov r4, r4, lsr #align*8
orr r4, r4, r5, lsl #32-align*8
mov r5, r5, lsr #align*8
orr r5, r5, r6, lsl #32-align*8
mov r6, r6, lsr #align*8
orr r6, r6, r7, lsl #32-align*8
mov r7, r7, lsr #align*8
orr r7, r7, r8, lsl #32-align*8
stmia D!, {r0, r1, r2, r3}
stmia D!, {r4, r5, r6, r7}
.endif
.endif
.endm
.macro memcpy_leading_15bytes backwards, align
movs DAT1, DAT2, lsl #31
sub N, N, DAT2
.if backwards
ldrmib DAT0, [S, #-1]!
ldrcsh DAT1, [S, #-2]!
strmib DAT0, [D, #-1]!
strcsh DAT1, [D, #-2]!
.else
ldrmib DAT0, [S], #1
ldrcsh DAT1, [S], #2
strmib DAT0, [D], #1
strcsh DAT1, [D], #2
.endif
movs DAT1, DAT2, lsl #29
.if backwards
ldrmi DAT0, [S, #-4]!
.if align == 0
ldmcsdb S!, {DAT1, DAT2}
.else
ldrcs DAT2, [S, #-4]!
ldrcs DAT1, [S, #-4]!
.endif
strmi DAT0, [D, #-4]!
stmcsdb D!, {DAT1, DAT2}
.else
ldrmi DAT0, [S], #4
.if align == 0
ldmcsia S!, {DAT1, DAT2}
.else
ldrcs DAT1, [S], #4
ldrcs DAT2, [S], #4
.endif
strmi DAT0, [D], #4
stmcsia D!, {DAT1, DAT2}
.endif
.endm
.macro memcpy_trailing_15bytes backwards, align
movs N, N, lsl #29
.if backwards
.if align == 0
ldmcsdb S!, {DAT0, DAT1}
.else
ldrcs DAT1, [S, #-4]!
ldrcs DAT0, [S, #-4]!
.endif
ldrmi DAT2, [S, #-4]!
stmcsdb D!, {DAT0, DAT1}
strmi DAT2, [D, #-4]!
.else
.if align == 0
ldmcsia S!, {DAT0, DAT1}
.else
ldrcs DAT0, [S], #4
ldrcs DAT1, [S], #4
.endif
ldrmi DAT2, [S], #4
stmcsia D!, {DAT0, DAT1}
strmi DAT2, [D], #4
.endif
movs N, N, lsl #2
.if backwards
ldrcsh DAT0, [S, #-2]!
ldrmib DAT1, [S, #-1]
strcsh DAT0, [D, #-2]!
strmib DAT1, [D, #-1]
.else
ldrcsh DAT0, [S], #2
ldrmib DAT1, [S]
strcsh DAT0, [D], #2
strmib DAT1, [D]
.endif
.endm
.macro memcpy_long_inner_loop backwards, align
.if align != 0
.if backwards
ldr DAT0, [S, #-align]!
.else
ldr LAST, [S, #-align]!
.endif
.endif
110:
.if align == 0
.if backwards
ldmdb S!, {DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, LAST}
pld [S, OFF]
stmdb D!, {DAT4, DAT5, DAT6, LAST}
stmdb D!, {DAT0, DAT1, DAT2, DAT3}
.else
ldmia S!, {DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, LAST}
pld [S, OFF]
stmia D!, {DAT0, DAT1, DAT2, DAT3}
stmia D!, {DAT4, DAT5, DAT6, LAST}
.endif
.else
unaligned_words backwards, align, 1, 8, DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, DAT7, LAST
.endif
subs N, N, #32
bhs 110b
/* Just before the final (prefetch_distance+1) 32-byte blocks, deal with final preloads */
preload_trailing backwards, S, N, OFF
add N, N, #(prefetch_distance+2)*32 - 32
120:
.if align == 0
.if backwards
ldmdb S!, {DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, LAST}
stmdb D!, {DAT4, DAT5, DAT6, LAST}
stmdb D!, {DAT0, DAT1, DAT2, DAT3}
.else
ldmia S!, {DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, LAST}
stmia D!, {DAT0, DAT1, DAT2, DAT3}
stmia D!, {DAT4, DAT5, DAT6, LAST}
.endif
.else
unaligned_words backwards, align, 0, 8, DAT0, DAT1, DAT2, DAT3, DAT4, DAT5, DAT6, DAT7, LAST
.endif
subs N, N, #32
bhs 120b
tst N, #16
.if align == 0
.if backwards
ldmnedb S!, {DAT0, DAT1, DAT2, LAST}
stmnedb D!, {DAT0, DAT1, DAT2, LAST}
.else
ldmneia S!, {DAT0, DAT1, DAT2, LAST}
stmneia D!, {DAT0, DAT1, DAT2, LAST}
.endif
.else
beq 130f
unaligned_words backwards, align, 0, 4, DAT0, DAT1, DAT2, DAT3, LAST
130:
.endif
/* Trailing words and bytes */
tst N, #15
beq 199f
.if align != 0
add S, S, #align
.endif
memcpy_trailing_15bytes backwards, align
199:
pop {DAT3, DAT4, DAT5, DAT6, DAT7}
pop {D, DAT1, DAT2, pc}
.endm
.macro memcpy_medium_inner_loop backwards, align
120:
.if backwards
.if align == 0
ldmdb S!, {DAT0, DAT1, DAT2, LAST}
.else
ldr LAST, [S, #-4]!
ldr DAT2, [S, #-4]!
ldr DAT1, [S, #-4]!
ldr DAT0, [S, #-4]!
.endif
stmdb D!, {DAT0, DAT1, DAT2, LAST}
.else
.if align == 0
ldmia S!, {DAT0, DAT1, DAT2, LAST}
.else
ldr DAT0, [S], #4
ldr DAT1, [S], #4
ldr DAT2, [S], #4
ldr LAST, [S], #4
.endif
stmia D!, {DAT0, DAT1, DAT2, LAST}
.endif
subs N, N, #16
bhs 120b
/* Trailing words and bytes */
tst N, #15
beq 199f
memcpy_trailing_15bytes backwards, align
199:
pop {D, DAT1, DAT2, pc}
.endm
.macro memcpy_short_inner_loop backwards, align
tst N, #16
.if backwards
.if align == 0
ldmnedb S!, {DAT0, DAT1, DAT2, LAST}
.else
ldrne LAST, [S, #-4]!
ldrne DAT2, [S, #-4]!
ldrne DAT1, [S, #-4]!
ldrne DAT0, [S, #-4]!
.endif
stmnedb D!, {DAT0, DAT1, DAT2, LAST}
.else
.if align == 0
ldmneia S!, {DAT0, DAT1, DAT2, LAST}
.else
ldrne DAT0, [S], #4
ldrne DAT1, [S], #4
ldrne DAT2, [S], #4
ldrne LAST, [S], #4
.endif
stmneia D!, {DAT0, DAT1, DAT2, LAST}
.endif
memcpy_trailing_15bytes backwards, align
199:
pop {D, DAT1, DAT2, pc}
.endm
.macro memcpy backwards
D .req a1
S .req a2
N .req a3
DAT0 .req a4
DAT1 .req v1
DAT2 .req v2
DAT3 .req v3
DAT4 .req v4
DAT5 .req v5
DAT6 .req v6
DAT7 .req sl
LAST .req ip
OFF .req lr
.cfi_startproc
push {D, DAT1, DAT2, lr}
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_undefined S
.cfi_undefined N
.cfi_undefined DAT0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_undefined LAST
.cfi_rel_offset lr, 12
.if backwards
add D, D, N
add S, S, N
.endif
/* See if we're guaranteed to have at least one 16-byte aligned 16-byte write */
cmp N, #31
blo 170f
/* To preload ahead as we go, we need at least (prefetch_distance+2) 32-byte blocks */
cmp N, #(prefetch_distance+3)*32 - 1
blo 160f
/* Long case */
push {DAT3, DAT4, DAT5, DAT6, DAT7}
.cfi_def_cfa_offset 36
.cfi_rel_offset D, 20
.cfi_rel_offset DAT1, 24
.cfi_rel_offset DAT2, 28
.cfi_rel_offset DAT3, 0
.cfi_rel_offset DAT4, 4
.cfi_rel_offset DAT5, 8
.cfi_rel_offset DAT6, 12
.cfi_rel_offset DAT7, 16
.cfi_rel_offset lr, 32
/* Adjust N so that the decrement instruction can also test for
* inner loop termination. We want it to stop when there are
* (prefetch_distance+1) complete blocks to go. */
sub N, N, #(prefetch_distance+2)*32
preload_leading_step1 backwards, DAT0, S
.if backwards
/* Bug in GAS: it accepts, but mis-assembles the instruction
* ands DAT2, D, #60, 2
* which sets DAT2 to the number of leading bytes until destination is aligned and also clears C (sets borrow)
*/
.word 0xE210513C
beq 154f
.else
ands DAT2, D, #15
beq 154f
rsb DAT2, DAT2, #16 /* number of leading bytes until destination aligned */
.endif
preload_leading_step2 backwards, DAT0, S, DAT2, OFF
memcpy_leading_15bytes backwards, 1
154: /* Destination now 16-byte aligned; we have at least one prefetch as well as at least one 16-byte output block */
/* Prefetch offset is best selected such that it lies in the first 8 of each 32 bytes - but it's just as easy to aim for the first one */
.if backwards
rsb OFF, S, #3
and OFF, OFF, #28
sub OFF, OFF, #32*(prefetch_distance+1)
.else
and OFF, S, #28
rsb OFF, OFF, #32*prefetch_distance
.endif
movs DAT0, S, lsl #31
bhi 157f
bcs 156f
bmi 155f
memcpy_long_inner_loop backwards, 0
155: memcpy_long_inner_loop backwards, 1
156: memcpy_long_inner_loop backwards, 2
157: memcpy_long_inner_loop backwards, 3
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_same_value DAT3
.cfi_same_value DAT4
.cfi_same_value DAT5
.cfi_same_value DAT6
.cfi_same_value DAT7
.cfi_rel_offset lr, 12
160: /* Medium case */
preload_all backwards, 0, 0, S, N, DAT2, OFF
sub N, N, #16 /* simplifies inner loop termination */
.if backwards
ands DAT2, D, #15
beq 164f
.else
ands DAT2, D, #15
beq 164f
rsb DAT2, DAT2, #16
.endif
memcpy_leading_15bytes backwards, align
164: /* Destination now 16-byte aligned; we have at least one 16-byte output block */
tst S, #3
bne 140f
memcpy_medium_inner_loop backwards, 0
140: memcpy_medium_inner_loop backwards, 1
170: /* Short case, less than 31 bytes, so no guarantee of at least one 16-byte block */
teq N, #0
beq 199f
preload_all backwards, 1, 0, S, N, DAT2, LAST
tst D, #3
beq 174f
172: subs N, N, #1
blo 199f
.if backwards
ldrb DAT0, [S, #-1]!
strb DAT0, [D, #-1]!
.else
ldrb DAT0, [S], #1
strb DAT0, [D], #1
.endif
tst D, #3
bne 172b
174: /* Destination now 4-byte aligned; we have 0 or more output bytes to go */
tst S, #3
bne 140f
memcpy_short_inner_loop backwards, 0
140: memcpy_short_inner_loop backwards, 1
.cfi_endproc
.unreq D
.unreq S
.unreq N
.unreq DAT0
.unreq DAT1
.unreq DAT2
.unreq DAT3
.unreq DAT4
.unreq DAT5
.unreq DAT6
.unreq DAT7
.unreq LAST
.unreq OFF
.endm

View File

@@ -0,0 +1,61 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include "arm-mem.h"
#include "memcpymove.h"
/* Prevent the stack from becoming executable */
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
.text
.arch armv6
.object_arch armv4
.arm
.altmacro
.p2align 2
/*
* void *memmove(void *s1, const void *s2, size_t n);
* On entry:
* a1 = pointer to destination
* a2 = pointer to source
* a3 = number of bytes to copy
* On exit:
* a1 preserved
*/
.set prefetch_distance, 3
ENTRY(memmove)
cmp a2, a1
bpl memcpy /* pl works even over -1 - 0 and 0x7fffffff - 0x80000000 boundaries */
memcpy 1
ENDPROC(memmove)

121
arch/arm/lib/memset_rpi.S Normal file
View File

@@ -0,0 +1,121 @@
/*
Copyright (c) 2013, Raspberry Pi Foundation
Copyright (c) 2013, RISC OS Open Ltd
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include "arm-mem.h"
/* Prevent the stack from becoming executable */
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
.text
.arch armv6
.object_arch armv4
.arm
.altmacro
.p2align 2
/*
* void *memset(void *s, int c, size_t n);
* On entry:
* a1 = pointer to buffer to fill
* a2 = byte pattern to fill with (caller-narrowed)
* a3 = number of bytes to fill
* On exit:
* a1 preserved
*/
ENTRY(memset)
S .req a1
DAT0 .req a2
N .req a3
DAT1 .req a4
DAT2 .req ip
DAT3 .req lr
orr DAT0, DAT0, lsl #8
push {S, lr}
orr DAT0, DAT0, lsl #16
mov DAT1, DAT0
/* See if we're guaranteed to have at least one 16-byte aligned 16-byte write */
cmp N, #31
blo 170f
161: sub N, N, #16 /* simplifies inner loop termination */
/* Leading words and bytes */
tst S, #15
beq 164f
rsb DAT3, S, #0 /* bits 0-3 = number of leading bytes until aligned */
movs DAT2, DAT3, lsl #31
submi N, N, #1
strmib DAT0, [S], #1
subcs N, N, #2
strcsh DAT0, [S], #2
movs DAT2, DAT3, lsl #29
submi N, N, #4
strmi DAT0, [S], #4
subcs N, N, #8
stmcsia S!, {DAT0, DAT1}
164: /* Delayed set up of DAT2 and DAT3 so we could use them as scratch registers above */
mov DAT2, DAT0
mov DAT3, DAT0
/* Now the inner loop of 16-byte stores */
165: stmia S!, {DAT0, DAT1, DAT2, DAT3}
subs N, N, #16
bhs 165b
166: /* Trailing words and bytes */
movs N, N, lsl #29
stmcsia S!, {DAT0, DAT1}
strmi DAT0, [S], #4
movs N, N, lsl #2
strcsh DAT0, [S], #2
strmib DAT0, [S]
199: pop {S, pc}
170: /* Short case */
mov DAT2, DAT0
mov DAT3, DAT0
tst S, #3
beq 174f
172: subs N, N, #1
blo 199b
strb DAT0, [S], #1
tst S, #3
bne 172b
174: tst N, #16
stmneia S!, {DAT0, DAT1, DAT2, DAT3}
b 166b
.unreq S
.unreq DAT0
.unreq N
.unreq DAT1
.unreq DAT2
.unreq DAT3
ENDPROC(memset)

View File

@@ -22,6 +22,14 @@
#include <asm/current.h>
#include <asm/page.h>
#ifndef COPY_FROM_USER_THRESHOLD
#define COPY_FROM_USER_THRESHOLD 64
#endif
#ifndef COPY_TO_USER_THRESHOLD
#define COPY_TO_USER_THRESHOLD 64
#endif
static int
pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
{
@@ -85,7 +93,44 @@ pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
return 1;
}
static unsigned long noinline
static int
pin_page_for_read(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
{
unsigned long addr = (unsigned long)_addr;
pgd_t *pgd;
pmd_t *pmd;
pte_t *pte;
pud_t *pud;
spinlock_t *ptl;
pgd = pgd_offset(current->mm, addr);
if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd)))
{
return 0;
}
pud = pud_offset(pgd, addr);
if (unlikely(pud_none(*pud) || pud_bad(*pud)))
{
return 0;
}
pmd = pmd_offset(pud, addr);
if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd)))
return 0;
pte = pte_offset_map_lock(current->mm, pmd, addr, &ptl);
if (unlikely(!pte_present(*pte) || !pte_young(*pte))) {
pte_unmap_unlock(pte, ptl);
return 0;
}
*ptep = pte;
*ptlp = ptl;
return 1;
}
unsigned long noinline
__copy_to_user_memcpy(void __user *to, const void *from, unsigned long n)
{
int atomic;
@@ -135,6 +180,54 @@ out:
return n;
}
unsigned long noinline
__copy_from_user_memcpy(void *to, const void __user *from, unsigned long n)
{
int atomic;
if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
memcpy(to, (const void *)from, n);
return 0;
}
/* the mmap semaphore is taken only if not in an atomic context */
atomic = in_atomic();
if (!atomic)
down_read(&current->mm->mmap_sem);
while (n) {
pte_t *pte;
spinlock_t *ptl;
int tocopy;
while (!pin_page_for_read(from, &pte, &ptl)) {
char temp;
if (!atomic)
up_read(&current->mm->mmap_sem);
if (__get_user(temp, (char __user *)from))
goto out;
if (!atomic)
down_read(&current->mm->mmap_sem);
}
tocopy = (~(unsigned long)from & ~PAGE_MASK) + 1;
if (tocopy > n)
tocopy = n;
memcpy(to, (const void *)from, tocopy);
to += tocopy;
from += tocopy;
n -= tocopy;
pte_unmap_unlock(pte, ptl);
}
if (!atomic)
up_read(&current->mm->mmap_sem);
out:
return n;
}
unsigned long
__copy_to_user(void __user *to, const void *from, unsigned long n)
{
@@ -145,10 +238,25 @@ __copy_to_user(void __user *to, const void *from, unsigned long n)
* With frame pointer disabled, tail call optimization kicks in
* as well making this test almost invisible.
*/
if (n < 64)
if (n < COPY_TO_USER_THRESHOLD)
return __copy_to_user_std(to, from, n);
return __copy_to_user_memcpy(to, from, n);
}
unsigned long
__copy_from_user(void *to, const void __user *from, unsigned long n)
{
/*
* This test is stubbed out of the main function above to keep
* the overhead for small copies low by avoiding a large
* register dump on the stack just to reload them right away.
* With frame pointer disabled, tail call optimization kicks in
* as well making this test almost invisible.
*/
if (n < COPY_FROM_USER_THRESHOLD)
return __copy_from_user_std(to, from, n);
return __copy_from_user_memcpy(to, from, n);
}
static unsigned long noinline
__clear_user_memset(void __user *addr, unsigned long n)

View File

@@ -18,6 +18,7 @@
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/clk/bcm2835.h>
#include <asm/system_info.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -107,6 +108,9 @@ static void __init bcm2835_map_io(void)
static void __init bcm2835_init(void)
{
struct device_node *np = of_find_node_by_path("/system");
u32 val;
u64 val64;
int ret;
bcm2835_setup_restart();
@@ -121,6 +125,11 @@ static void __init bcm2835_init(void)
pr_err("of_platform_populate failed: %d\n", ret);
BUG();
}
if (!of_property_read_u32(np, "linux,revision", &val))
system_rev = val;
if (!of_property_read_u64(np, "linux,serial", &val64))
system_serial_low = val64;
}
static const char * const bcm2835_compat[] = {

View File

@@ -0,0 +1,45 @@
menu "Broadcom BCM2708 Implementations"
depends on ARCH_BCM2708
config MACH_BCM2708
bool "Broadcom BCM2708 Development Platform"
select NEED_MACH_MEMORY_H
select NEED_MACH_IO_H
select CPU_V6
help
Include support for the Broadcom(R) BCM2708 platform.
config BCM2708_DT
bool "BCM2708 Device Tree support"
depends on MACH_BCM2708
default n
select USE_OF
select ARCH_REQUIRE_GPIOLIB
select PINCTRL
select PINCTRL_BCM2835
help
Enable Device Tree support for BCM2708
config BCM2708_GPIO
bool "BCM2708 gpio support"
depends on MACH_BCM2708
select ARCH_REQUIRE_GPIOLIB
default y
help
Include support for the Broadcom(R) BCM2708 gpio.
config BCM2708_NOL2CACHE
bool "Videocore L2 cache disable"
depends on MACH_BCM2708
default n
help
Do not allow ARM to use GPU's L2 cache. Requires disable_l2cache in config.txt.
config BCM2708_SPIDEV
bool "Bind spidev to SPI0 master"
depends on MACH_BCM2708
depends on SPI
default y
help
Binds spidev driver to the SPI0 master
endmenu

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#
# Makefile for the linux kernel.
#
obj-$(CONFIG_MACH_BCM2708) += bcm2708.o armctrl.o
obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o

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zreladdr-y := 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000

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/*
* linux/arch/arm/mach-bcm2708/armctrl.c
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/list.h>
#include <linux/io.h>
#include <linux/version.h>
#include <linux/syscore_ops.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include "armctrl.h"
/* For support of kernels >= 3.0 assume only one VIC for now*/
static unsigned int remap_irqs[(INTERRUPT_ARASANSDIO + 1) - INTERRUPT_JPEG] = {
INTERRUPT_VC_JPEG,
INTERRUPT_VC_USB,
INTERRUPT_VC_3D,
INTERRUPT_VC_DMA2,
INTERRUPT_VC_DMA3,
INTERRUPT_VC_I2C,
INTERRUPT_VC_SPI,
INTERRUPT_VC_I2SPCM,
INTERRUPT_VC_SDIO,
INTERRUPT_VC_UART,
INTERRUPT_VC_ARASANSDIO
};
static void armctrl_mask_irq(struct irq_data *d)
{
static const unsigned int disables[4] = {
ARM_IRQ_DIBL1,
ARM_IRQ_DIBL2,
ARM_IRQ_DIBL3,
0
};
if (d->irq >= FIQ_START) {
writel(0, __io_address(ARM_IRQ_FAST));
} else {
unsigned int data = (unsigned int)irq_get_chip_data(d->irq);
writel(1 << (data & 0x1f), __io_address(disables[(data >> 5) & 0x3]));
}
}
static void armctrl_unmask_irq(struct irq_data *d)
{
static const unsigned int enables[4] = {
ARM_IRQ_ENBL1,
ARM_IRQ_ENBL2,
ARM_IRQ_ENBL3,
0
};
if (d->irq >= FIQ_START) {
unsigned int data =
(unsigned int)irq_get_chip_data(d->irq) - FIQ_START;
writel(0x80 | data, __io_address(ARM_IRQ_FAST));
} else {
unsigned int data = (unsigned int)irq_get_chip_data(d->irq);
writel(1 << (data & 0x1f), __io_address(enables[(data >> 5) & 0x3]));
}
}
#ifdef CONFIG_OF
#define NR_IRQS_BANK0 21
#define NR_BANKS 3
#define IRQS_PER_BANK 32
/* from drivers/irqchip/irq-bcm2835.c */
static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
const u32 *intspec, unsigned int intsize,
unsigned long *out_hwirq, unsigned int *out_type)
{
if (WARN_ON(intsize != 2))
return -EINVAL;
if (WARN_ON(intspec[0] >= NR_BANKS))
return -EINVAL;
if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
return -EINVAL;
if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
return -EINVAL;
if (intspec[0] == 0)
*out_hwirq = ARM_IRQ0_BASE + intspec[1];
else if (intspec[0] == 1)
*out_hwirq = ARM_IRQ1_BASE + intspec[1];
else
*out_hwirq = ARM_IRQ2_BASE + intspec[1];
/* reverse remap_irqs[] */
switch (*out_hwirq) {
case INTERRUPT_VC_JPEG:
*out_hwirq = INTERRUPT_JPEG;
break;
case INTERRUPT_VC_USB:
*out_hwirq = INTERRUPT_USB;
break;
case INTERRUPT_VC_3D:
*out_hwirq = INTERRUPT_3D;
break;
case INTERRUPT_VC_DMA2:
*out_hwirq = INTERRUPT_DMA2;
break;
case INTERRUPT_VC_DMA3:
*out_hwirq = INTERRUPT_DMA3;
break;
case INTERRUPT_VC_I2C:
*out_hwirq = INTERRUPT_I2C;
break;
case INTERRUPT_VC_SPI:
*out_hwirq = INTERRUPT_SPI;
break;
case INTERRUPT_VC_I2SPCM:
*out_hwirq = INTERRUPT_I2SPCM;
break;
case INTERRUPT_VC_SDIO:
*out_hwirq = INTERRUPT_SDIO;
break;
case INTERRUPT_VC_UART:
*out_hwirq = INTERRUPT_UART;
break;
case INTERRUPT_VC_ARASANSDIO:
*out_hwirq = INTERRUPT_ARASANSDIO;
break;
}
*out_type = IRQ_TYPE_NONE;
return 0;
}
static struct irq_domain_ops armctrl_ops = {
.xlate = armctrl_xlate
};
void __init armctrl_dt_init(void)
{
struct device_node *np;
struct irq_domain *domain;
np = of_find_compatible_node(NULL, NULL, "brcm,bcm2708-armctrl-ic");
if (!np)
return;
domain = irq_domain_add_legacy(np, BCM2708_ALLOC_IRQS,
IRQ_ARMCTRL_START, 0,
&armctrl_ops, NULL);
WARN_ON(!domain);
}
#else
void __init armctrl_dt_init(void) { }
#endif /* CONFIG_OF */
#if defined(CONFIG_PM)
/* for kernels 3.xx use the new syscore_ops apis but for older kernels use the sys dev class */
/* Static defines
* struct armctrl_device - VIC PM device (< 3.xx)
* @sysdev: The system device which is registered. (< 3.xx)
* @irq: The IRQ number for the base of the VIC.
* @base: The register base for the VIC.
* @resume_sources: A bitmask of interrupts for resume.
* @resume_irqs: The IRQs enabled for resume.
* @int_select: Save for VIC_INT_SELECT.
* @int_enable: Save for VIC_INT_ENABLE.
* @soft_int: Save for VIC_INT_SOFT.
* @protect: Save for VIC_PROTECT.
*/
struct armctrl_info {
void __iomem *base;
int irq;
u32 resume_sources;
u32 resume_irqs;
u32 int_select;
u32 int_enable;
u32 soft_int;
u32 protect;
} armctrl;
static int armctrl_suspend(void)
{
return 0;
}
static void armctrl_resume(void)
{
return;
}
/**
* armctrl_pm_register - Register a VIC for later power management control
* @base: The base address of the VIC.
* @irq: The base IRQ for the VIC.
* @resume_sources: bitmask of interrupts allowed for resume sources.
*
* For older kernels (< 3.xx) do -
* Register the VIC with the system device tree so that it can be notified
* of suspend and resume requests and ensure that the correct actions are
* taken to re-instate the settings on resume.
*/
static void __init armctrl_pm_register(void __iomem * base, unsigned int irq,
u32 resume_sources)
{
armctrl.base = base;
armctrl.resume_sources = resume_sources;
armctrl.irq = irq;
}
static int armctrl_set_wake(struct irq_data *d, unsigned int on)
{
unsigned int off = d->irq & 31;
u32 bit = 1 << off;
if (!(bit & armctrl.resume_sources))
return -EINVAL;
if (on)
armctrl.resume_irqs |= bit;
else
armctrl.resume_irqs &= ~bit;
return 0;
}
#else
static inline void armctrl_pm_register(void __iomem * base, unsigned int irq,
u32 arg1)
{
}
#define armctrl_suspend NULL
#define armctrl_resume NULL
#define armctrl_set_wake NULL
#endif /* CONFIG_PM */
static struct syscore_ops armctrl_syscore_ops = {
.suspend = armctrl_suspend,
.resume = armctrl_resume,
};
/**
* armctrl_syscore_init - initicall to register VIC pm functions
*
* This is called via late_initcall() to register
* the resources for the VICs due to the early
* nature of the VIC's registration.
*/
static int __init armctrl_syscore_init(void)
{
register_syscore_ops(&armctrl_syscore_ops);
return 0;
}
late_initcall(armctrl_syscore_init);
static struct irq_chip armctrl_chip = {
.name = "ARMCTRL",
.irq_ack = NULL,
.irq_mask = armctrl_mask_irq,
.irq_unmask = armctrl_unmask_irq,
.irq_set_wake = armctrl_set_wake,
};
/**
* armctrl_init - initialise a vectored interrupt controller
* @base: iomem base address
* @irq_start: starting interrupt number, must be muliple of 32
* @armctrl_sources: bitmask of interrupt sources to allow
* @resume_sources: bitmask of interrupt sources to allow for resume
*/
int __init armctrl_init(void __iomem * base, unsigned int irq_start,
u32 armctrl_sources, u32 resume_sources)
{
unsigned int irq;
for (irq = 0; irq < BCM2708_ALLOC_IRQS; irq++) {
unsigned int data = irq;
if (irq >= INTERRUPT_JPEG && irq <= INTERRUPT_ARASANSDIO)
data = remap_irqs[irq - INTERRUPT_JPEG];
irq_set_chip(irq, &armctrl_chip);
irq_set_chip_data(irq, (void *)data);
irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_DISABLED);
}
armctrl_pm_register(base, irq_start, resume_sources);
init_FIQ(FIQ_START);
armctrl_dt_init();
return 0;
}

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/*
* linux/arch/arm/mach-bcm2708/armctrl.h
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __BCM2708_ARMCTRL_H
#define __BCM2708_ARMCTRL_H
extern int __init armctrl_init(void __iomem * base, unsigned int irq_start,
u32 armctrl_sources, u32 resume_sources);
#endif

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/*
* linux/arch/arm/mach-bcm2708/bcm2708.h
*
* BCM2708 machine support header
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __BCM2708_BCM2708_H
#define __BCM2708_BCM2708_H
#include <linux/amba/bus.h>
extern void __init bcm2708_init(void);
extern void __init bcm2708_init_irq(void);
extern void __init bcm2708_map_io(void);
extern struct sys_timer bcm2708_timer;
extern unsigned int mmc_status(struct device *dev);
#define AMBA_DEVICE(name, busid, base, plat) \
static struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = busid, \
.platform_data = plat, \
}, \
.res = { \
.start = base##_BASE, \
.end = (base##_BASE) + SZ_4K - 1,\
.flags = IORESOURCE_MEM, \
}, \
.irq = base##_IRQ, \
}
#endif

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/*
* linux/arch/arm/mach-bcm2708/bcm2708_gpio.c
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/list.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <mach/gpio.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <mach/platform.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_data/bcm2708.h>
#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
#define DRIVER_NAME BCM_GPIO_DRIVER_NAME
#define BCM_GPIO_USE_IRQ 1
#define GPIOFSEL(x) (0x00+(x)*4)
#define GPIOSET(x) (0x1c+(x)*4)
#define GPIOCLR(x) (0x28+(x)*4)
#define GPIOLEV(x) (0x34+(x)*4)
#define GPIOEDS(x) (0x40+(x)*4)
#define GPIOREN(x) (0x4c+(x)*4)
#define GPIOFEN(x) (0x58+(x)*4)
#define GPIOHEN(x) (0x64+(x)*4)
#define GPIOLEN(x) (0x70+(x)*4)
#define GPIOAREN(x) (0x7c+(x)*4)
#define GPIOAFEN(x) (0x88+(x)*4)
#define GPIOUD(x) (0x94+(x)*4)
#define GPIOUDCLK(x) (0x98+(x)*4)
#define GPIO_BANKS 2
enum { GPIO_FSEL_INPUT, GPIO_FSEL_OUTPUT,
GPIO_FSEL_ALT5, GPIO_FSEL_ALT_4,
GPIO_FSEL_ALT0, GPIO_FSEL_ALT1,
GPIO_FSEL_ALT2, GPIO_FSEL_ALT3,
};
/* Each of the two spinlocks protects a different set of hardware
* regiters and data structurs. This decouples the code of the IRQ from
* the GPIO code. This also makes the case of a GPIO routine call from
* the IRQ code simpler.
*/
static DEFINE_SPINLOCK(lock); /* GPIO registers */
struct bcm2708_gpio {
struct list_head list;
void __iomem *base;
struct gpio_chip gc;
unsigned long rising[(BCM2708_NR_GPIOS + 31) / 32];
unsigned long falling[(BCM2708_NR_GPIOS + 31) / 32];
unsigned long high[(BCM2708_NR_GPIOS + 31) / 32];
unsigned long low[(BCM2708_NR_GPIOS + 31) / 32];
};
static int bcm2708_set_function(struct gpio_chip *gc, unsigned offset,
int function)
{
struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
unsigned long flags;
unsigned gpiodir;
unsigned gpio_bank = offset / 10;
unsigned gpio_field_offset = (offset - 10 * gpio_bank) * 3;
//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set_function %p (%d,%d)\n", gc, offset, function);
if (offset >= BCM2708_NR_GPIOS)
return -EINVAL;
spin_lock_irqsave(&lock, flags);
gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank));
gpiodir &= ~(7 << gpio_field_offset);
gpiodir |= function << gpio_field_offset;
writel(gpiodir, gpio->base + GPIOFSEL(gpio_bank));
spin_unlock_irqrestore(&lock, flags);
gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank));
return 0;
}
static int bcm2708_gpio_dir_in(struct gpio_chip *gc, unsigned offset)
{
return bcm2708_set_function(gc, offset, GPIO_FSEL_INPUT);
}
static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value);
static int bcm2708_gpio_dir_out(struct gpio_chip *gc, unsigned offset,
int value)
{
int ret;
ret = bcm2708_set_function(gc, offset, GPIO_FSEL_OUTPUT);
if (ret >= 0)
bcm2708_gpio_set(gc, offset, value);
return ret;
}
static int bcm2708_gpio_get(struct gpio_chip *gc, unsigned offset)
{
struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
unsigned gpio_bank = offset / 32;
unsigned gpio_field_offset = (offset - 32 * gpio_bank);
unsigned lev;
if (offset >= BCM2708_NR_GPIOS)
return 0;
lev = readl(gpio->base + GPIOLEV(gpio_bank));
//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_get %p (%d)=%d\n", gc, offset, 0x1 & (lev>>gpio_field_offset));
return 0x1 & (lev >> gpio_field_offset);
}
static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
{
struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
unsigned gpio_bank = offset / 32;
unsigned gpio_field_offset = (offset - 32 * gpio_bank);
//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set %p (%d=%d)\n", gc, offset, value);
if (offset >= BCM2708_NR_GPIOS)
return;
if (value)
writel(1 << gpio_field_offset, gpio->base + GPIOSET(gpio_bank));
else
writel(1 << gpio_field_offset, gpio->base + GPIOCLR(gpio_bank));
}
/**********************
* extension to configure pullups
*/
int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset,
bcm2708_gpio_pull_t value)
{
struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc);
unsigned gpio_bank = offset / 32;
unsigned gpio_field_offset = (offset - 32 * gpio_bank);
if (offset >= BCM2708_NR_GPIOS)
return -EINVAL;
switch (value) {
case BCM2708_PULL_UP:
writel(2, gpio->base + GPIOUD(0));
break;
case BCM2708_PULL_DOWN:
writel(1, gpio->base + GPIOUD(0));
break;
case BCM2708_PULL_OFF:
writel(0, gpio->base + GPIOUD(0));
break;
}
udelay(5);
writel(1 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank));
udelay(5);
writel(0, gpio->base + GPIOUD(0));
writel(0 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank));
return 0;
}
EXPORT_SYMBOL(bcm2708_gpio_setpull);
/*************************************************************************************************************************
* bcm2708 GPIO IRQ
*/
#if BCM_GPIO_USE_IRQ
static int bcm2708_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
{
return gpio_to_irq(gpio);
}
static int bcm2708_gpio_irq_set_type(struct irq_data *d, unsigned type)
{
unsigned irq = d->irq;
struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
unsigned gn = irq_to_gpio(irq);
unsigned gb = gn / 32;
unsigned go = gn % 32;
gpio->rising[gb] &= ~(1 << go);
gpio->falling[gb] &= ~(1 << go);
gpio->high[gb] &= ~(1 << go);
gpio->low[gb] &= ~(1 << go);
if (type & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
return -EINVAL;
if (type & IRQ_TYPE_EDGE_RISING)
gpio->rising[gb] |= (1 << go);
if (type & IRQ_TYPE_EDGE_FALLING)
gpio->falling[gb] |= (1 << go);
if (type & IRQ_TYPE_LEVEL_HIGH)
gpio->high[gb] |= (1 << go);
if (type & IRQ_TYPE_LEVEL_LOW)
gpio->low[gb] |= (1 << go);
return 0;
}
static void bcm2708_gpio_irq_mask(struct irq_data *d)
{
unsigned irq = d->irq;
struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
unsigned gn = irq_to_gpio(irq);
unsigned gb = gn / 32;
unsigned long rising = readl(gpio->base + GPIOREN(gb));
unsigned long falling = readl(gpio->base + GPIOFEN(gb));
unsigned long high = readl(gpio->base + GPIOHEN(gb));
unsigned long low = readl(gpio->base + GPIOLEN(gb));
gn = gn % 32;
writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb));
writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb));
writel(high & ~(1 << gn), gpio->base + GPIOHEN(gb));
writel(low & ~(1 << gn), gpio->base + GPIOLEN(gb));
}
static void bcm2708_gpio_irq_unmask(struct irq_data *d)
{
unsigned irq = d->irq;
struct bcm2708_gpio *gpio = irq_get_chip_data(irq);
unsigned gn = irq_to_gpio(irq);
unsigned gb = gn / 32;
unsigned go = gn % 32;
unsigned long rising = readl(gpio->base + GPIOREN(gb));
unsigned long falling = readl(gpio->base + GPIOFEN(gb));
unsigned long high = readl(gpio->base + GPIOHEN(gb));
unsigned long low = readl(gpio->base + GPIOLEN(gb));
if (gpio->rising[gb] & (1 << go)) {
writel(rising | (1 << go), gpio->base + GPIOREN(gb));
} else {
writel(rising & ~(1 << go), gpio->base + GPIOREN(gb));
}
if (gpio->falling[gb] & (1 << go)) {
writel(falling | (1 << go), gpio->base + GPIOFEN(gb));
} else {
writel(falling & ~(1 << go), gpio->base + GPIOFEN(gb));
}
if (gpio->high[gb] & (1 << go)) {
writel(high | (1 << go), gpio->base + GPIOHEN(gb));
} else {
writel(high & ~(1 << go), gpio->base + GPIOHEN(gb));
}
if (gpio->low[gb] & (1 << go)) {
writel(low | (1 << go), gpio->base + GPIOLEN(gb));
} else {
writel(low & ~(1 << go), gpio->base + GPIOLEN(gb));
}
}
static struct irq_chip bcm2708_irqchip = {
.name = "GPIO",
.irq_enable = bcm2708_gpio_irq_unmask,
.irq_disable = bcm2708_gpio_irq_mask,
.irq_unmask = bcm2708_gpio_irq_unmask,
.irq_mask = bcm2708_gpio_irq_mask,
.irq_set_type = bcm2708_gpio_irq_set_type,
};
static irqreturn_t bcm2708_gpio_interrupt(int irq, void *dev_id)
{
unsigned long edsr;
unsigned bank;
int i;
unsigned gpio;
unsigned level_bits;
struct bcm2708_gpio *gpio_data = dev_id;
for (bank = 0; bank < GPIO_BANKS; bank++) {
edsr = readl(__io_address(GPIO_BASE) + GPIOEDS(bank));
level_bits = gpio_data->high[bank] | gpio_data->low[bank];
for_each_set_bit(i, &edsr, 32) {
gpio = i + bank * 32;
/* ack edge triggered IRQs immediately */
if (!(level_bits & (1<<i)))
writel(1<<i,
__io_address(GPIO_BASE) + GPIOEDS(bank));
generic_handle_irq(gpio_to_irq(gpio));
/* ack level triggered IRQ after handling them */
if (level_bits & (1<<i))
writel(1<<i,
__io_address(GPIO_BASE) + GPIOEDS(bank));
}
}
return IRQ_HANDLED;
}
static struct irqaction bcm2708_gpio_irq = {
.name = "BCM2708 GPIO catchall handler",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = bcm2708_gpio_interrupt,
};
static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb)
{
unsigned irq;
ucb->gc.to_irq = bcm2708_gpio_to_irq;
for (irq = GPIO_IRQ_START; irq < (GPIO_IRQ_START + GPIO_IRQS); irq++) {
irq_set_chip_data(irq, ucb);
irq_set_chip_and_handler(irq, &bcm2708_irqchip,
handle_simple_irq);
set_irq_flags(irq, IRQF_VALID);
}
bcm2708_gpio_irq.dev_id = ucb;
setup_irq(IRQ_GPIO3, &bcm2708_gpio_irq);
}
#else
static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb)
{
}
#endif /* #if BCM_GPIO_USE_IRQ ***************************************************************************************************************** */
static int bcm2708_gpio_probe(struct platform_device *dev)
{
struct bcm2708_gpio *ucb;
struct resource *res;
int bank;
int err = 0;
printk(KERN_INFO DRIVER_NAME ": bcm2708_gpio_probe %p\n", dev);
ucb = kzalloc(sizeof(*ucb), GFP_KERNEL);
if (NULL == ucb) {
printk(KERN_ERR DRIVER_NAME ": failed to allocate "
"mailbox memory\n");
err = -ENOMEM;
goto err;
}
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
platform_set_drvdata(dev, ucb);
ucb->base = __io_address(GPIO_BASE);
ucb->gc.label = "bcm2708_gpio";
ucb->gc.base = 0;
ucb->gc.ngpio = BCM2708_NR_GPIOS;
ucb->gc.owner = THIS_MODULE;
ucb->gc.direction_input = bcm2708_gpio_dir_in;
ucb->gc.direction_output = bcm2708_gpio_dir_out;
ucb->gc.get = bcm2708_gpio_get;
ucb->gc.set = bcm2708_gpio_set;
ucb->gc.can_sleep = 0;
for (bank = 0; bank < GPIO_BANKS; bank++) {
writel(0, ucb->base + GPIOREN(bank));
writel(0, ucb->base + GPIOFEN(bank));
writel(0, ucb->base + GPIOHEN(bank));
writel(0, ucb->base + GPIOLEN(bank));
writel(0, ucb->base + GPIOAREN(bank));
writel(0, ucb->base + GPIOAFEN(bank));
writel(~0, ucb->base + GPIOEDS(bank));
}
bcm2708_gpio_irq_init(ucb);
err = gpiochip_add(&ucb->gc);
err:
return err;
}
static int bcm2708_gpio_remove(struct platform_device *dev)
{
int err = 0;
struct bcm2708_gpio *ucb = platform_get_drvdata(dev);
printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_remove %p\n", dev);
gpiochip_remove(&ucb->gc);
platform_set_drvdata(dev, NULL);
kfree(ucb);
return err;
}
static struct platform_driver bcm2708_gpio_driver = {
.probe = bcm2708_gpio_probe,
.remove = bcm2708_gpio_remove,
.driver = {
.name = "bcm2708_gpio"},
};
static int __init bcm2708_gpio_init(void)
{
return platform_driver_register(&bcm2708_gpio_driver);
}
static void __exit bcm2708_gpio_exit(void)
{
platform_driver_unregister(&bcm2708_gpio_driver);
}
module_init(bcm2708_gpio_init);
module_exit(bcm2708_gpio_exit);
MODULE_DESCRIPTION("Broadcom BCM2708 GPIO driver");
MODULE_LICENSE("GPL");

View File

@@ -0,0 +1,419 @@
/*
* linux/arch/arm/mach-bcm2708/arm_control.h
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __BCM2708_ARM_CONTROL_H
#define __BCM2708_ARM_CONTROL_H
/*
* Definitions and addresses for the ARM CONTROL logic
* This file is manually generated.
*/
#define ARM_BASE 0x7E00B000
/* Basic configuration */
#define ARM_CONTROL0 HW_REGISTER_RW(ARM_BASE+0x000)
#define ARM_C0_SIZ128M 0x00000000
#define ARM_C0_SIZ256M 0x00000001
#define ARM_C0_SIZ512M 0x00000002
#define ARM_C0_SIZ1G 0x00000003
#define ARM_C0_BRESP0 0x00000000
#define ARM_C0_BRESP1 0x00000004
#define ARM_C0_BRESP2 0x00000008
#define ARM_C0_BOOTHI 0x00000010
#define ARM_C0_UNUSED05 0x00000020 /* free */
#define ARM_C0_FULLPERI 0x00000040
#define ARM_C0_UNUSED78 0x00000180 /* free */
#define ARM_C0_JTAGMASK 0x00000E00
#define ARM_C0_JTAGOFF 0x00000000
#define ARM_C0_JTAGBASH 0x00000800 /* Debug on GPIO off */
#define ARM_C0_JTAGGPIO 0x00000C00 /* Debug on GPIO on */
#define ARM_C0_APROTMSK 0x0000F000
#define ARM_C0_DBG0SYNC 0x00010000 /* VPU0 halt sync */
#define ARM_C0_DBG1SYNC 0x00020000 /* VPU1 halt sync */
#define ARM_C0_SWDBGREQ 0x00040000 /* HW debug request */
#define ARM_C0_PASSHALT 0x00080000 /* ARM halt passed to debugger */
#define ARM_C0_PRIO_PER 0x00F00000 /* per priority mask */
#define ARM_C0_PRIO_L2 0x0F000000
#define ARM_C0_PRIO_UC 0xF0000000
#define ARM_C0_APROTPASS 0x0000A000 /* Translate 1:1 */
#define ARM_C0_APROTUSER 0x00000000 /* Only user mode */
#define ARM_C0_APROTSYST 0x0000F000 /* Only system mode */
#define ARM_CONTROL1 HW_REGISTER_RW(ARM_BASE+0x440)
#define ARM_C1_TIMER 0x00000001 /* re-route timer IRQ to VC */
#define ARM_C1_MAIL 0x00000002 /* re-route Mail IRQ to VC */
#define ARM_C1_BELL0 0x00000004 /* re-route Doorbell 0 to VC */
#define ARM_C1_BELL1 0x00000008 /* re-route Doorbell 1 to VC */
#define ARM_C1_PERSON 0x00000100 /* peripherals on */
#define ARM_C1_REQSTOP 0x00000200 /* ASYNC bridge request stop */
#define ARM_STATUS HW_REGISTER_RW(ARM_BASE+0x444)
#define ARM_S_ACKSTOP 0x80000000 /* Bridge stopped */
#define ARM_S_READPEND 0x000003FF /* pending reads counter */
#define ARM_S_WRITPEND 0x000FFC00 /* pending writes counter */
#define ARM_ERRHALT HW_REGISTER_RW(ARM_BASE+0x448)
#define ARM_EH_PERIBURST 0x00000001 /* Burst write seen on peri bus */
#define ARM_EH_ILLADDRS1 0x00000002 /* Address bits 25-27 error */
#define ARM_EH_ILLADDRS2 0x00000004 /* Address bits 31-28 error */
#define ARM_EH_VPU0HALT 0x00000008 /* VPU0 halted & in debug mode */
#define ARM_EH_VPU1HALT 0x00000010 /* VPU1 halted & in debug mode */
#define ARM_EH_ARMHALT 0x00000020 /* ARM in halted debug mode */
#define ARM_ID_SECURE HW_REGISTER_RW(ARM_BASE+0x00C)
#define ARM_ID HW_REGISTER_RW(ARM_BASE+0x44C)
#define ARM_IDVAL 0x364D5241
/* Translation memory */
#define ARM_TRANSLATE HW_REGISTER_RW(ARM_BASE+0x100)
/* 32 locations: 0x100.. 0x17F */
/* 32 spare means we CAN go to 64 pages.... */
/* Interrupts */
#define ARM_IRQ_PEND0 HW_REGISTER_RW(ARM_BASE+0x200) /* Top IRQ bits */
#define ARM_I0_TIMER 0x00000001 /* timer IRQ */
#define ARM_I0_MAIL 0x00000002 /* Mail IRQ */
#define ARM_I0_BELL0 0x00000004 /* Doorbell 0 */
#define ARM_I0_BELL1 0x00000008 /* Doorbell 1 */
#define ARM_I0_BANK1 0x00000100 /* Bank1 IRQ */
#define ARM_I0_BANK2 0x00000200 /* Bank2 IRQ */
#define ARM_IRQ_PEND1 HW_REGISTER_RW(ARM_BASE+0x204) /* All bank1 IRQ bits */
/* todo: all I1_interrupt sources */
#define ARM_IRQ_PEND2 HW_REGISTER_RW(ARM_BASE+0x208) /* All bank2 IRQ bits */
/* todo: all I2_interrupt sources */
#define ARM_IRQ_FAST HW_REGISTER_RW(ARM_BASE+0x20C) /* FIQ control */
#define ARM_IF_INDEX 0x0000007F /* FIQ select */
#define ARM_IF_ENABLE 0x00000080 /* FIQ enable */
#define ARM_IF_VCMASK 0x0000003F /* FIQ = (index from VC source) */
#define ARM_IF_TIMER 0x00000040 /* FIQ = ARM timer */
#define ARM_IF_MAIL 0x00000041 /* FIQ = ARM Mail */
#define ARM_IF_BELL0 0x00000042 /* FIQ = ARM Doorbell 0 */
#define ARM_IF_BELL1 0x00000043 /* FIQ = ARM Doorbell 1 */
#define ARM_IF_VP0HALT 0x00000044 /* FIQ = VPU0 Halt seen */
#define ARM_IF_VP1HALT 0x00000045 /* FIQ = VPU1 Halt seen */
#define ARM_IF_ILLEGAL 0x00000046 /* FIQ = Illegal access seen */
#define ARM_IRQ_ENBL1 HW_REGISTER_RW(ARM_BASE+0x210) /* Bank1 enable bits */
#define ARM_IRQ_ENBL2 HW_REGISTER_RW(ARM_BASE+0x214) /* Bank2 enable bits */
#define ARM_IRQ_ENBL3 HW_REGISTER_RW(ARM_BASE+0x218) /* ARM irqs enable bits */
#define ARM_IRQ_DIBL1 HW_REGISTER_RW(ARM_BASE+0x21C) /* Bank1 disable bits */
#define ARM_IRQ_DIBL2 HW_REGISTER_RW(ARM_BASE+0x220) /* Bank2 disable bits */
#define ARM_IRQ_DIBL3 HW_REGISTER_RW(ARM_BASE+0x224) /* ARM irqs disable bits */
#define ARM_IE_TIMER 0x00000001 /* Timer IRQ */
#define ARM_IE_MAIL 0x00000002 /* Mail IRQ */
#define ARM_IE_BELL0 0x00000004 /* Doorbell 0 */
#define ARM_IE_BELL1 0x00000008 /* Doorbell 1 */
#define ARM_IE_VP0HALT 0x00000010 /* VPU0 Halt */
#define ARM_IE_VP1HALT 0x00000020 /* VPU1 Halt */
#define ARM_IE_ILLEGAL 0x00000040 /* Illegal access seen */
/* Timer */
/* For reg. fields see sp804 spec. */
#define ARM_T_LOAD HW_REGISTER_RW(ARM_BASE+0x400)
#define ARM_T_VALUE HW_REGISTER_RW(ARM_BASE+0x404)
#define ARM_T_CONTROL HW_REGISTER_RW(ARM_BASE+0x408)
#define ARM_T_IRQCNTL HW_REGISTER_RW(ARM_BASE+0x40C)
#define ARM_T_RAWIRQ HW_REGISTER_RW(ARM_BASE+0x410)
#define ARM_T_MSKIRQ HW_REGISTER_RW(ARM_BASE+0x414)
#define ARM_T_RELOAD HW_REGISTER_RW(ARM_BASE+0x418)
#define ARM_T_PREDIV HW_REGISTER_RW(ARM_BASE+0x41c)
#define ARM_T_FREECNT HW_REGISTER_RW(ARM_BASE+0x420)
#define TIMER_CTRL_ONESHOT (1 << 0)
#define TIMER_CTRL_32BIT (1 << 1)
#define TIMER_CTRL_DIV1 (0 << 2)
#define TIMER_CTRL_DIV16 (1 << 2)
#define TIMER_CTRL_DIV256 (2 << 2)
#define TIMER_CTRL_IE (1 << 5)
#define TIMER_CTRL_PERIODIC (1 << 6)
#define TIMER_CTRL_ENABLE (1 << 7)
#define TIMER_CTRL_DBGHALT (1 << 8)
#define TIMER_CTRL_ENAFREE (1 << 9)
#define TIMER_CTRL_FREEDIV_SHIFT 16)
#define TIMER_CTRL_FREEDIV_MASK 0xff
/* Semaphores, Doorbells, Mailboxes */
#define ARM_SBM_OWN0 (ARM_BASE+0x800)
#define ARM_SBM_OWN1 (ARM_BASE+0x900)
#define ARM_SBM_OWN2 (ARM_BASE+0xA00)
#define ARM_SBM_OWN3 (ARM_BASE+0xB00)
/* MAILBOXES
* Register flags are common across all
* owner registers. See end of this section
*
* Semaphores, Doorbells, Mailboxes Owner 0
*
*/
#define ARM_0_SEMS HW_REGISTER_RW(ARM_SBM_OWN0+0x00)
#define ARM_0_SEM0 HW_REGISTER_RW(ARM_SBM_OWN0+0x00)
#define ARM_0_SEM1 HW_REGISTER_RW(ARM_SBM_OWN0+0x04)
#define ARM_0_SEM2 HW_REGISTER_RW(ARM_SBM_OWN0+0x08)
#define ARM_0_SEM3 HW_REGISTER_RW(ARM_SBM_OWN0+0x0C)
#define ARM_0_SEM4 HW_REGISTER_RW(ARM_SBM_OWN0+0x10)
#define ARM_0_SEM5 HW_REGISTER_RW(ARM_SBM_OWN0+0x14)
#define ARM_0_SEM6 HW_REGISTER_RW(ARM_SBM_OWN0+0x18)
#define ARM_0_SEM7 HW_REGISTER_RW(ARM_SBM_OWN0+0x1C)
#define ARM_0_BELL0 HW_REGISTER_RW(ARM_SBM_OWN0+0x40)
#define ARM_0_BELL1 HW_REGISTER_RW(ARM_SBM_OWN0+0x44)
#define ARM_0_BELL2 HW_REGISTER_RW(ARM_SBM_OWN0+0x48)
#define ARM_0_BELL3 HW_REGISTER_RW(ARM_SBM_OWN0+0x4C)
/* MAILBOX 0 access in Owner 0 area */
/* Some addresses should ONLY be used by owner 0 */
#define ARM_0_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) */
#define ARM_0_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) Normal read */
#define ARM_0_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN0+0x90) /* none-pop read */
#define ARM_0_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN0+0x94) /* Sender read (only LS 2 bits) */
#define ARM_0_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN0+0x98) /* Status read */
#define ARM_0_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0x9C) /* Config read/write */
/* MAILBOX 1 access in Owner 0 area */
/* Owner 0 should only WRITE to this mailbox */
#define ARM_0_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) /* .. 0xAC (4 locations) */
/*#define ARM_0_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_0_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN0+0xB0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_0_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN0+0xB4) */ /* DO NOT USE THIS !!!!! */
#define ARM_0_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN0+0xB8) /* Status read */
/*#define ARM_0_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0xBC) */ /* DO NOT USE THIS !!!!! */
/* General SEM, BELL, MAIL config/status */
#define ARM_0_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE0) /* semaphore clear/debug register */
#define ARM_0_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE4) /* Doorbells clear/debug register */
#define ARM_0_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xF8) /* ALL interrupts */
#define ARM_0_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xFC) /* IRQS pending for owner 0 */
/* Semaphores, Doorbells, Mailboxes Owner 1 */
#define ARM_1_SEMS HW_REGISTER_RW(ARM_SBM_OWN1+0x00)
#define ARM_1_SEM0 HW_REGISTER_RW(ARM_SBM_OWN1+0x00)
#define ARM_1_SEM1 HW_REGISTER_RW(ARM_SBM_OWN1+0x04)
#define ARM_1_SEM2 HW_REGISTER_RW(ARM_SBM_OWN1+0x08)
#define ARM_1_SEM3 HW_REGISTER_RW(ARM_SBM_OWN1+0x0C)
#define ARM_1_SEM4 HW_REGISTER_RW(ARM_SBM_OWN1+0x10)
#define ARM_1_SEM5 HW_REGISTER_RW(ARM_SBM_OWN1+0x14)
#define ARM_1_SEM6 HW_REGISTER_RW(ARM_SBM_OWN1+0x18)
#define ARM_1_SEM7 HW_REGISTER_RW(ARM_SBM_OWN1+0x1C)
#define ARM_1_BELL0 HW_REGISTER_RW(ARM_SBM_OWN1+0x40)
#define ARM_1_BELL1 HW_REGISTER_RW(ARM_SBM_OWN1+0x44)
#define ARM_1_BELL2 HW_REGISTER_RW(ARM_SBM_OWN1+0x48)
#define ARM_1_BELL3 HW_REGISTER_RW(ARM_SBM_OWN1+0x4C)
/* MAILBOX 0 access in Owner 0 area */
/* Owner 1 should only WRITE to this mailbox */
#define ARM_1_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0x80) /* .. 0x8C (4 locations) */
/*#define ARM_1_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN1+0x80) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_1_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN1+0x90) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_1_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN1+0x94) */ /* DO NOT USE THIS !!!!! */
#define ARM_1_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN1+0x98) /* Status read */
/*#define ARM_1_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0x9C) */ /* DO NOT USE THIS !!!!! */
/* MAILBOX 1 access in Owner 0 area */
#define ARM_1_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) */
#define ARM_1_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) Normal read */
#define ARM_1_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN1+0xB0) /* none-pop read */
#define ARM_1_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN1+0xB4) /* Sender read (only LS 2 bits) */
#define ARM_1_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN1+0xB8) /* Status read */
#define ARM_1_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0xBC)
/* General SEM, BELL, MAIL config/status */
#define ARM_1_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE0) /* semaphore clear/debug register */
#define ARM_1_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE4) /* Doorbells clear/debug register */
#define ARM_1_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xFC) /* IRQS pending for owner 1 */
#define ARM_1_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xF8) /* ALL interrupts */
/* Semaphores, Doorbells, Mailboxes Owner 2 */
#define ARM_2_SEMS HW_REGISTER_RW(ARM_SBM_OWN2+0x00)
#define ARM_2_SEM0 HW_REGISTER_RW(ARM_SBM_OWN2+0x00)
#define ARM_2_SEM1 HW_REGISTER_RW(ARM_SBM_OWN2+0x04)
#define ARM_2_SEM2 HW_REGISTER_RW(ARM_SBM_OWN2+0x08)
#define ARM_2_SEM3 HW_REGISTER_RW(ARM_SBM_OWN2+0x0C)
#define ARM_2_SEM4 HW_REGISTER_RW(ARM_SBM_OWN2+0x10)
#define ARM_2_SEM5 HW_REGISTER_RW(ARM_SBM_OWN2+0x14)
#define ARM_2_SEM6 HW_REGISTER_RW(ARM_SBM_OWN2+0x18)
#define ARM_2_SEM7 HW_REGISTER_RW(ARM_SBM_OWN2+0x1C)
#define ARM_2_BELL0 HW_REGISTER_RW(ARM_SBM_OWN2+0x40)
#define ARM_2_BELL1 HW_REGISTER_RW(ARM_SBM_OWN2+0x44)
#define ARM_2_BELL2 HW_REGISTER_RW(ARM_SBM_OWN2+0x48)
#define ARM_2_BELL3 HW_REGISTER_RW(ARM_SBM_OWN2+0x4C)
/* MAILBOX 0 access in Owner 2 area */
/* Owner 2 should only WRITE to this mailbox */
#define ARM_2_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0x80) /* .. 0x8C (4 locations) */
/*#define ARM_2_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN2+0x80) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_2_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN2+0x90) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_2_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN2+0x94) */ /* DO NOT USE THIS !!!!! */
#define ARM_2_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN2+0x98) /* Status read */
/*#define ARM_2_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0x9C) */ /* DO NOT USE THIS !!!!! */
/* MAILBOX 1 access in Owner 2 area */
/* Owner 2 should only WRITE to this mailbox */
#define ARM_2_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) /* .. 0xAC (4 locations) */
/*#define ARM_2_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_2_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN2+0xB0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_2_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN2+0xB4) */ /* DO NOT USE THIS !!!!! */
#define ARM_2_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN2+0xB8) /* Status read */
/*#define ARM_2_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0xBC) */ /* DO NOT USE THIS !!!!! */
/* General SEM, BELL, MAIL config/status */
#define ARM_2_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE0) /* semaphore clear/debug register */
#define ARM_2_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE4) /* Doorbells clear/debug register */
#define ARM_2_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xFC) /* IRQS pending for owner 2 */
#define ARM_2_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xF8) /* ALL interrupts */
/* Semaphores, Doorbells, Mailboxes Owner 3 */
#define ARM_3_SEMS HW_REGISTER_RW(ARM_SBM_OWN3+0x00)
#define ARM_3_SEM0 HW_REGISTER_RW(ARM_SBM_OWN3+0x00)
#define ARM_3_SEM1 HW_REGISTER_RW(ARM_SBM_OWN3+0x04)
#define ARM_3_SEM2 HW_REGISTER_RW(ARM_SBM_OWN3+0x08)
#define ARM_3_SEM3 HW_REGISTER_RW(ARM_SBM_OWN3+0x0C)
#define ARM_3_SEM4 HW_REGISTER_RW(ARM_SBM_OWN3+0x10)
#define ARM_3_SEM5 HW_REGISTER_RW(ARM_SBM_OWN3+0x14)
#define ARM_3_SEM6 HW_REGISTER_RW(ARM_SBM_OWN3+0x18)
#define ARM_3_SEM7 HW_REGISTER_RW(ARM_SBM_OWN3+0x1C)
#define ARM_3_BELL0 HW_REGISTER_RW(ARM_SBM_OWN3+0x40)
#define ARM_3_BELL1 HW_REGISTER_RW(ARM_SBM_OWN3+0x44)
#define ARM_3_BELL2 HW_REGISTER_RW(ARM_SBM_OWN3+0x48)
#define ARM_3_BELL3 HW_REGISTER_RW(ARM_SBM_OWN3+0x4C)
/* MAILBOX 0 access in Owner 3 area */
/* Owner 3 should only WRITE to this mailbox */
#define ARM_3_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0x80) /* .. 0x8C (4 locations) */
/*#define ARM_3_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN3+0x80) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_3_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN3+0x90) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_3_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN3+0x94) */ /* DO NOT USE THIS !!!!! */
#define ARM_3_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN3+0x98) /* Status read */
/*#define ARM_3_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0x9C) */ /* DO NOT USE THIS !!!!! */
/* MAILBOX 1 access in Owner 3 area */
/* Owner 3 should only WRITE to this mailbox */
#define ARM_3_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) /* .. 0xAC (4 locations) */
/*#define ARM_3_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_3_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN3+0xB0) */ /* DO NOT USE THIS !!!!! */
/*#define ARM_3_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN3+0xB4) */ /* DO NOT USE THIS !!!!! */
#define ARM_3_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN3+0xB8) /* Status read */
/*#define ARM_3_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0xBC) */ /* DO NOT USE THIS !!!!! */
/* General SEM, BELL, MAIL config/status */
#define ARM_3_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE0) /* semaphore clear/debug register */
#define ARM_3_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE4) /* Doorbells clear/debug register */
#define ARM_3_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xFC) /* IRQS pending for owner 3 */
#define ARM_3_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xF8) /* ALL interrupts */
/* Mailbox flags. Valid for all owners */
/* Mailbox status register (...0x98) */
#define ARM_MS_FULL 0x80000000
#define ARM_MS_EMPTY 0x40000000
#define ARM_MS_LEVEL 0x400000FF /* Max. value depdnds on mailbox depth parameter */
/* MAILBOX config/status register (...0x9C) */
/* ANY write to this register clears the error bits! */
#define ARM_MC_IHAVEDATAIRQEN 0x00000001 /* mailbox irq enable: has data */
#define ARM_MC_IHAVESPACEIRQEN 0x00000002 /* mailbox irq enable: has space */
#define ARM_MC_OPPISEMPTYIRQEN 0x00000004 /* mailbox irq enable: Opp. is empty */
#define ARM_MC_MAIL_CLEAR 0x00000008 /* mailbox clear write 1, then 0 */
#define ARM_MC_IHAVEDATAIRQPEND 0x00000010 /* mailbox irq pending: has space */
#define ARM_MC_IHAVESPACEIRQPEND 0x00000020 /* mailbox irq pending: Opp. is empty */
#define ARM_MC_OPPISEMPTYIRQPEND 0x00000040 /* mailbox irq pending */
/* Bit 7 is unused */
#define ARM_MC_ERRNOOWN 0x00000100 /* error : none owner read from mailbox */
#define ARM_MC_ERROVERFLW 0x00000200 /* error : write to fill mailbox */
#define ARM_MC_ERRUNDRFLW 0x00000400 /* error : read from empty mailbox */
/* Semaphore clear/debug register (...0xE0) */
#define ARM_SD_OWN0 0x00000003 /* Owner of sem 0 */
#define ARM_SD_OWN1 0x0000000C /* Owner of sem 1 */
#define ARM_SD_OWN2 0x00000030 /* Owner of sem 2 */
#define ARM_SD_OWN3 0x000000C0 /* Owner of sem 3 */
#define ARM_SD_OWN4 0x00000300 /* Owner of sem 4 */
#define ARM_SD_OWN5 0x00000C00 /* Owner of sem 5 */
#define ARM_SD_OWN6 0x00003000 /* Owner of sem 6 */
#define ARM_SD_OWN7 0x0000C000 /* Owner of sem 7 */
#define ARM_SD_SEM0 0x00010000 /* Status of sem 0 */
#define ARM_SD_SEM1 0x00020000 /* Status of sem 1 */
#define ARM_SD_SEM2 0x00040000 /* Status of sem 2 */
#define ARM_SD_SEM3 0x00080000 /* Status of sem 3 */
#define ARM_SD_SEM4 0x00100000 /* Status of sem 4 */
#define ARM_SD_SEM5 0x00200000 /* Status of sem 5 */
#define ARM_SD_SEM6 0x00400000 /* Status of sem 6 */
#define ARM_SD_SEM7 0x00800000 /* Status of sem 7 */
/* Doorbells clear/debug register (...0xE4) */
#define ARM_BD_OWN0 0x00000003 /* Owner of doorbell 0 */
#define ARM_BD_OWN1 0x0000000C /* Owner of doorbell 1 */
#define ARM_BD_OWN2 0x00000030 /* Owner of doorbell 2 */
#define ARM_BD_OWN3 0x000000C0 /* Owner of doorbell 3 */
#define ARM_BD_BELL0 0x00000100 /* Status of doorbell 0 */
#define ARM_BD_BELL1 0x00000200 /* Status of doorbell 1 */
#define ARM_BD_BELL2 0x00000400 /* Status of doorbell 2 */
#define ARM_BD_BELL3 0x00000800 /* Status of doorbell 3 */
/* MY IRQS register (...0xF8) */
#define ARM_MYIRQ_BELL 0x00000001 /* This owner has a doorbell IRQ */
#define ARM_MYIRQ_MAIL 0x00000002 /* This owner has a mailbox IRQ */
/* ALL IRQS register (...0xF8) */
#define ARM_AIS_BELL0 0x00000001 /* Doorbell 0 IRQ pending */
#define ARM_AIS_BELL1 0x00000002 /* Doorbell 1 IRQ pending */
#define ARM_AIS_BELL2 0x00000004 /* Doorbell 2 IRQ pending */
#define ARM_AIS_BELL3 0x00000008 /* Doorbell 3 IRQ pending */
#define ARM_AIS0_HAVEDATA 0x00000010 /* MAIL 0 has data IRQ pending */
#define ARM_AIS0_HAVESPAC 0x00000020 /* MAIL 0 has space IRQ pending */
#define ARM_AIS0_OPPEMPTY 0x00000040 /* MAIL 0 opposite is empty IRQ */
#define ARM_AIS1_HAVEDATA 0x00000080 /* MAIL 1 has data IRQ pending */
#define ARM_AIS1_HAVESPAC 0x00000100 /* MAIL 1 has space IRQ pending */
#define ARM_AIS1_OPPEMPTY 0x00000200 /* MAIL 1 opposite is empty IRQ */
/* Note that bell-0, bell-1 and MAIL0 IRQ go only to the ARM */
/* Whilst that bell-2, bell-3 and MAIL1 IRQ go only to the VC */
/* */
/* ARM JTAG BASH */
/* */
#define AJB_BASE 0x7e2000c0
#define AJBCONF HW_REGISTER_RW(AJB_BASE+0x00)
#define AJB_BITS0 0x000000
#define AJB_BITS4 0x000004
#define AJB_BITS8 0x000008
#define AJB_BITS12 0x00000C
#define AJB_BITS16 0x000010
#define AJB_BITS20 0x000014
#define AJB_BITS24 0x000018
#define AJB_BITS28 0x00001C
#define AJB_BITS32 0x000020
#define AJB_BITS34 0x000022
#define AJB_OUT_MS 0x000040
#define AJB_OUT_LS 0x000000
#define AJB_INV_CLK 0x000080
#define AJB_D0_RISE 0x000100
#define AJB_D0_FALL 0x000000
#define AJB_D1_RISE 0x000200
#define AJB_D1_FALL 0x000000
#define AJB_IN_RISE 0x000400
#define AJB_IN_FALL 0x000000
#define AJB_ENABLE 0x000800
#define AJB_HOLD0 0x000000
#define AJB_HOLD1 0x001000
#define AJB_HOLD2 0x002000
#define AJB_HOLD3 0x003000
#define AJB_RESETN 0x004000
#define AJB_CLKSHFT 16
#define AJB_BUSY 0x80000000
#define AJBTMS HW_REGISTER_RW(AJB_BASE+0x04)
#define AJBTDI HW_REGISTER_RW(AJB_BASE+0x08)
#define AJBTDO HW_REGISTER_RW(AJB_BASE+0x0c)
#endif

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#ifndef __ASM_MACH_CLKDEV_H
#define __ASM_MACH_CLKDEV_H
#define __clk_get(clk) ({ 1; })
#define __clk_put(clk) do { } while (0)
#endif

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/* arch/arm/mach-bcm2708/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 2010 Broadcom
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <mach/platform.h>
.macro addruart, rp, rv, tmp
ldr \rp, =UART0_BASE
ldr \rv, =IO_ADDRESS(UART0_BASE)
.endm
#include <debug/pl01x.S>

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/*
* arch/arm/mach-bcm2708/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for BCM2708 platforms
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <mach/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =IO_ADDRESS(ARMCTRL_IC_BASE)
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* get masked status */
ldr \irqstat, [\base, #(ARM_IRQ_PEND0 - ARMCTRL_IC_BASE)]
mov \irqnr, #(ARM_IRQ0_BASE + 31)
and \tmp, \irqstat, #0x300 @ save bits 8 and 9
/* clear bits 8 and 9, and test */
bics \irqstat, \irqstat, #0x300
bne 1010f
tst \tmp, #0x100
ldrne \irqstat, [\base, #(ARM_IRQ_PEND1 - ARMCTRL_IC_BASE)]
movne \irqnr, #(ARM_IRQ1_BASE + 31)
@ Mask out the interrupts also present in PEND0 - see SW-5809
bicne \irqstat, #((1<<7) | (1<<9) | (1<<10))
bicne \irqstat, #((1<<18) | (1<<19))
bne 1010f
tst \tmp, #0x200
ldrne \irqstat, [\base, #(ARM_IRQ_PEND2 - ARMCTRL_IC_BASE)]
movne \irqnr, #(ARM_IRQ2_BASE + 31)
@ Mask out the interrupts also present in PEND0 - see SW-5809
bicne \irqstat, #((1<<21) | (1<<22) | (1<<23) | (1<<24) | (1<<25))
bicne \irqstat, #((1<<30))
beq 1020f
1010:
@ For non-zero x, LSB(x) = 31 - CLZ(x^(x-1))
@ N.B. CLZ is an ARM5 instruction.
sub \tmp, \irqstat, #1
eor \irqstat, \irqstat, \tmp
clz \tmp, \irqstat
sub \irqnr, \tmp
1020: @ EQ will be set if no irqs pending
.endm

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/*
* arch/arm/mach-bcm2708/include/mach/timex.h
*
* BCM2708 free running counter (timer)
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _MACH_FRC_H
#define _MACH_FRC_H
#define FRC_TICK_RATE (1000000)
/*! Free running counter incrementing at the CLOCK_TICK_RATE
(slightly faster than frc_clock_ticks63()
*/
extern unsigned long frc_clock_ticks32(void);
/*! Free running counter incrementing at the CLOCK_TICK_RATE
* Note - top bit should be ignored (see cnt32_to_63)
*/
extern unsigned long long frc_clock_ticks63(void);
#endif

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/*
* arch/arm/mach-bcm2708/include/mach/gpio.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#define BCM2708_NR_GPIOS 54 // number of gpio lines
#define gpio_to_irq(x) ((x) + GPIO_IRQ_START)
#define irq_to_gpio(x) ((x) - GPIO_IRQ_START)
#endif

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/*
* arch/arm/mach-bcm2708/include/mach/hardware.h
*
* This file contains the hardware definitions of the BCM2708 devices.
*
* Copyright (C) 2010 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <asm/sizes.h>
#include <mach/platform.h>
#endif

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