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2 Commits

Author SHA1 Message Date
Dom Cobley
9d8e963f36 fixup! vc4/drm: Ignore vc4_hdmi->output_enabled for allowing audio 2021-12-08 15:26:30 +00:00
Dom Cobley
010586f1bd vc4/drm: Ignore vc4_hdmi->output_enabled for allowing audio
Otherwise we reject audio playback when switching hdmi modes

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
2021-12-08 14:44:35 +00:00
661 changed files with 3384 additions and 8678 deletions

34
.github/ISSUE_TEMPLATE/bug_report.md vendored Normal file
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@@ -0,0 +1,34 @@
---
name: Bug report
about: Create a report to help us fix your issue
---
**Is this the right place for my bug report?**
This repository contains the Linux kernel used on the Raspberry Pi. If you believe that the issue you are seeing is kernel-related, this is the right place. If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland). If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo). If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it.
**Describe the bug**
Add a clear and concise description of what you think the bug is.
**To reproduce**
List the steps required to reproduce the issue.
**Expected behaviour**
Add a clear and concise description of what you expected to happen.
**Actual behaviour**
Add a clear and concise description of what actually happened.
**System**
Copy and paste the results of the raspinfo command in to this section. Alternatively, copy and paste a pastebin link, or add answers to the following questions:
* Which model of Raspberry Pi? e.g. Pi3B+, PiZeroW
* Which OS and version (`cat /etc/rpi-issue`)?
* Which firmware version (`vcgencmd version`)?
* Which kernel version (`uname -a`)?
**Logs**
If applicable, add the relevant output from `dmesg` or similar.
**Additional context**
Add any other relevant context for the problem.

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@@ -1,91 +0,0 @@
name: "Bug report"
description: Create a report to help us fix your issue
body:
- type: markdown
attributes:
value: |
**Is this the right place for my bug report?**
This repository contains the Linux kernel used on the Raspberry Pi.
If you believe that the issue you are seeing is kernel-related, this is the right place.
If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland).
If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo).
If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it.
- type: textarea
id: description
attributes:
label: Describe the bug
description: |
Add a clear and concise description of what you think the bug is.
validations:
required: true
- type: textarea
id: reproduce
attributes:
label: Steps to reproduce the behaviour
description: |
List the steps required to reproduce the issue.
validations:
required: true
- type: dropdown
id: model
attributes:
label: Device (s)
description: On which device you are facing the bug?
multiple: true
options:
- Raspberry Pi Zero
- Raspberry Pi Zero W/WH
- Raspberry Pi Zero 2 W
- Raspberry Pi 1 Mod. A
- Raspberry Pi 1 Mod. A+
- Raspberry Pi 1 Mod. B
- Raspberry Pi 1 Mod. B+
- Raspberry Pi 2 Mod. B
- Raspberry Pi 2 Mod. B v1.2
- Raspberry Pi 3 Mod. A+
- Raspberry Pi 3 Mod. B
- Raspberry Pi 3 Mod. B+
- Raspberry Pi 4 Mod. B
- Raspberry Pi 400
- Raspberry Pi CM1
- Raspberry Pi CM3
- Raspberry Pi CM3 Lite
- Raspberry Pi CM3+
- Raspberry Pi CM3+ Lite
- Raspberry Pi CM4
- Raspberry Pi CM4 Lite
- Other
validations:
required: true
- type: textarea
id: system
attributes:
label: System
description: |
Copy and paste the results of the raspinfo command in to this section.
Alternatively, copy and paste a pastebin link, or add answers to the following questions:
* Which OS and version (`cat /etc/rpi-issue`)?
* Which firmware version (`vcgencmd version`)?
* Which kernel version (`uname -a`)?
validations:
required: true
- type: textarea
id: logs
attributes:
label: Logs
description: |
If applicable, add the relevant output from `dmesg` or similar.
- type: textarea
id: additional
attributes:
label: Additional context
description: |
Add any other relevant context for the problem.

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@@ -1,9 +0,0 @@
blank_issues_enabled: false
contact_links:
- name: "⛔ Question"
url: https://www.raspberrypi.org/forums
about: "Please do not use GitHub for asking questions. If you simply have a question, then the Raspberry Pi forums are the best place to ask it. Thanks in advance for helping us keep the issue tracker clean!"
- name: "⛔ Problems with the Raspbian distribution packages"
url: https://github.com/RPi-Distro/repo
about: "If you have problems with the Raspbian distribution packages, please report them in the github.com/RPi-Distro/repo."

View File

@@ -1617,8 +1617,6 @@
architectures force reset to be always executed
i8042.unlock [HW] Unlock (ignore) the keylock
i8042.kbdreset [HW] Reset device connected to KBD port
i8042.probe_defer
[HW] Allow deferred probing upon i8042 probe errors
i810= [HW,DRM]
@@ -2296,12 +2294,8 @@
Default is 1 (enabled)
kvm-intel.emulate_invalid_guest_state=
[KVM,Intel] Disable emulation of invalid guest state.
Ignored if kvm-intel.enable_unrestricted_guest=1, as
guest state is never invalid for unrestricted guests.
This param doesn't apply to nested guests (L2), as KVM
never emulates invalid L2 guest state.
Default is 1 (enabled)
[KVM,Intel] Enable emulation of invalid guest states
Default is 0 (disabled)
kvm-intel.flexpriority=
[KVM,Intel] Disable FlexPriority feature (TPR shadow).

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@@ -1457,22 +1457,11 @@ unprivileged_bpf_disabled
=========================
Writing 1 to this entry will disable unprivileged calls to ``bpf()``;
once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` or ``CAP_BPF``
will return ``-EPERM``. Once set to 1, this can't be cleared from the
running kernel anymore.
once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` will return
``-EPERM``.
Writing 2 to this entry will also disable unprivileged calls to ``bpf()``,
however, an admin can still change this setting later on, if needed, by
writing 0 or 1 to this entry.
Once set, this can't be cleared.
If ``BPF_UNPRIV_DEFAULT_OFF`` is enabled in the kernel config, then this
entry will default to 2 instead of 0.
= =============================================================
0 Unprivileged calls to ``bpf()`` are enabled
1 Unprivileged calls to ``bpf()`` are disabled without recovery
2 Unprivileged calls to ``bpf()`` are disabled
= =============================================================
watchdog
========

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@@ -91,14 +91,6 @@ properties:
compensate for the board being designed with the lanes
swapped.
enet-phy-lane-no-swap:
$ref: /schemas/types.yaml#/definitions/flag
description:
If set, indicates that PHY will disable swap of the
TX/RX lanes. This property allows the PHY to work correcly after
e.g. wrong bootstrap configuration caused by issues in PCB
layout design.
eee-broken-100tx:
$ref: /schemas/types.yaml#definitions/flag
description:

View File

@@ -265,16 +265,6 @@ Supported chips:
https://www.ti.com/litv/pdf/sbos686
* Texas Instruments TMP461
Prefix: 'tmp461'
Addresses scanned: I2C 0x48 through 0x4F
Datasheet: Publicly available at TI website
https://www.ti.com/lit/gpn/tmp461
Author: Jean Delvare <jdelvare@suse.de>

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@@ -11,13 +11,16 @@ compiler [1]_. They are useful for runtime instrumentation and static analysis.
We can analyse, change and add further code during compilation via
callbacks [2]_, GIMPLE [3]_, IPA [4]_ and RTL passes [5]_.
The GCC plugin infrastructure of the kernel supports building out-of-tree
modules, cross-compilation and building in a separate directory.
Plugin source files have to be compilable by a C++ compiler.
The GCC plugin infrastructure of the kernel supports all gcc versions from
4.5 to 6.0, building out-of-tree modules, cross-compilation and building in a
separate directory.
Plugin source files have to be compilable by both a C and a C++ compiler as well
because gcc versions 4.5 and 4.6 are compiled by a C compiler,
gcc-4.7 can be compiled by a C or a C++ compiler,
and versions 4.8+ can only be compiled by a C++ compiler.
Currently the GCC plugin infrastructure supports only some architectures.
Grep "select HAVE_GCC_PLUGINS" to find out which architectures support
GCC plugins.
Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and
powerpc architectures.
This infrastructure was ported from grsecurity [6]_ and PaX [7]_.
@@ -44,13 +47,20 @@ Files
This is a compatibility header for GCC plugins.
It should be always included instead of individual gcc headers.
**$(src)/scripts/gcc-plugin.sh**
This script checks the availability of the included headers in
gcc-common.h and chooses the proper host compiler to build the plugins
(gcc-4.7 can be built by either gcc or g++).
**$(src)/scripts/gcc-plugins/gcc-generate-gimple-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-rtl-pass.h**
These headers automatically generate the registration structures for
GIMPLE, SIMPLE_IPA, IPA and RTL passes.
GIMPLE, SIMPLE_IPA, IPA and RTL passes. They support all gcc versions
from 4.5 to 6.0.
They should be preferred to creating the structures by hand.
@@ -58,25 +68,21 @@ Usage
=====
You must install the gcc plugin headers for your gcc version,
e.g., on Ubuntu for gcc-10::
e.g., on Ubuntu for gcc-4.9::
apt-get install gcc-10-plugin-dev
apt-get install gcc-4.9-plugin-dev
Or on Fedora::
dnf install gcc-plugin-devel
Enable the GCC plugin infrastructure and some plugin(s) you want to use
in the kernel config::
Enable a GCC plugin based feature in the kernel config::
CONFIG_GCC_PLUGINS=y
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY=y
CONFIG_GCC_PLUGIN_LATENT_ENTROPY=y
...
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY = y
To compile the minimum tool set including the plugin(s)::
To compile only the plugin(s)::
make scripts
make gcc-plugins
or just run the kernel make and compile the whole kernel with
the cyclomatic complexity GCC plugin.
@@ -85,8 +91,7 @@ the cyclomatic complexity GCC plugin.
4. How to add a new GCC plugin
==============================
The GCC plugins are in scripts/gcc-plugins/. You need to put plugin source files
right under scripts/gcc-plugins/. Creating subdirectories is not supported.
It must be added to scripts/gcc-plugins/Makefile, scripts/Makefile.gcc-plugins
and a relevant Kconfig file.
The GCC plugins are in $(src)/scripts/gcc-plugins/. You can use a file or a directory
here. It must be added to $(src)/scripts/gcc-plugins/Makefile,
$(src)/scripts/Makefile.gcc-plugins and $(src)/arch/Kconfig.
See the cyc_complexity_plugin.c (CONFIG_GCC_PLUGIN_CYC_COMPLEXITY) GCC plugin.

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@@ -439,9 +439,11 @@ preemption. The following substitution works on both kernels::
spin_lock(&p->lock);
p->count += this_cpu_read(var2);
On a non-PREEMPT_RT kernel migrate_disable() maps to preempt_disable()
which makes the above code fully equivalent. On a PREEMPT_RT kernel
migrate_disable() ensures that the task is pinned on the current CPU which
in turn guarantees that the per-CPU access to var1 and var2 are staying on
the same CPU while the task remains preemptible.
the same CPU.
The migrate_disable() substitution is not valid for the following
scenario::
@@ -454,8 +456,9 @@ scenario::
p = this_cpu_ptr(&var1);
p->val = func2();
This breaks because migrate_disable() does not protect against reentrancy from
a preempting task. A correct substitution for this case is::
While correct on a non-PREEMPT_RT kernel, this breaks on PREEMPT_RT because
here migrate_disable() does not protect against reentrancy from a
preempting task. A correct substitution for this case is::
func()
{

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@@ -196,12 +196,11 @@ ad_actor_sys_prio
ad_actor_system
In an AD system, this specifies the mac-address for the actor in
protocol packet exchanges (LACPDUs). The value cannot be a multicast
address. If the all-zeroes MAC is specified, bonding will internally
use the MAC of the bond itself. It is preferred to have the
local-admin bit set for this mac but driver does not enforce it. If
the value is not given then system defaults to using the masters'
mac address as actors' system address.
protocol packet exchanges (LACPDUs). The value cannot be NULL or
multicast. It is preferred to have the local-admin bit set for this
mac but driver does not enforce it. If the value is not given then
system defaults to using the masters' mac address as actors' system
address.
This parameter has effect only in 802.3ad mode and is available through
SysFs interface.

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@@ -440,22 +440,6 @@ NOTE: For 82599-based network connections, if you are enabling jumbo frames in
a virtual function (VF), jumbo frames must first be enabled in the physical
function (PF). The VF MTU setting cannot be larger than the PF MTU.
NBASE-T Support
---------------
The ixgbe driver supports NBASE-T on some devices. However, the advertisement
of NBASE-T speeds is suppressed by default, to accommodate broken network
switches which cannot cope with advertised NBASE-T speeds. Use the ethtool
command to enable advertising NBASE-T speeds on devices which support it::
ethtool -s eth? advertise 0x1800000001028
On Linux systems with INTERFACES(5), this can be specified as a pre-up command
in /etc/network/interfaces so that the interface is always brought up with
NBASE-T support, e.g.::
iface eth? inet dhcp
pre-up ethtool -s eth? advertise 0x1800000001028 || true
Generic Receive Offload, aka GRO
--------------------------------
The driver supports the in-kernel software implementation of GRO. GRO has

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@@ -326,8 +326,6 @@ usi-headset
Headset support on USI machines
dual-codecs
Lenovo laptops with dual codecs
alc285-hp-amp-init
HP laptops which require speaker amplifier initialization (ALC285)
ALC680
======

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@@ -58,23 +58,3 @@ Image Source Control IDs
The unit cell consists of the whole area of the pixel, sensitive and
non-sensitive.
This control is required for automatic calibration of sensors/cameras.
``V4L2_CID_NOTIFY_GAINS (integer array)``
The sensor is notified what gains will be applied to the different
colour channels by subsequent processing (such as by an ISP). The
sensor is merely informed of these values in case it performs
processing that requires them, but it does not apply them itself to
the output pixels.
Currently it is defined only for Bayer sensors, and is an array
control taking 4 gain values, being the gains for each of the
Bayer channels. The gains are always in the order B, Gb, Gr and R,
irrespective of the exact Bayer order of the sensor itself.
The use of an array allows this control to be extended to sensors
with, for example, non-Bayer CFAs (colour filter arrays).
The units for the gain values are linear, with the default value
representing a gain of exactly 1.0. For example, if this default value
is reported as being (say) 128, then a value of 192 would represent
a gain of exactly 1.5.

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@@ -7341,6 +7341,7 @@ L: linux-hardening@vger.kernel.org
S: Maintained
F: Documentation/kbuild/gcc-plugins.rst
F: scripts/Makefile.gcc-plugins
F: scripts/gcc-plugin.sh
F: scripts/gcc-plugins/
GCOV BASED KERNEL PROFILING

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@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 92
SUBLEVEL = 83
EXTRAVERSION =
NAME = Dare mighty things

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@@ -16,8 +16,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-400.dtb \
bcm2710-rpi-cm3.dtb \
bcm2711-rpi-cm4.dtb \
bcm2711-rpi-cm4s.dtb
bcm2711-rpi-cm4.dtb
dtb-$(CONFIG_ARCH_ALPINE) += \
alpine-db.dtb

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -4,6 +4,7 @@
#include "bcm2708-rpi.dtsi"
#include "bcm283x-rpi-smsc9512.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b", "brcm,bcm2835";
@@ -122,9 +123,6 @@ i2c_csi_dsi: &i2c1 {
gpio = <&gpio 27 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9512.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b", "brcm,bcm2835";
@@ -109,9 +110,6 @@
gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -8,15 +8,21 @@
/ {
compatible = "raspberrypi,compute-module", "brcm,bcm2835";
model = "Raspberry Pi Compute Module";
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-regulator";
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
cam0_reg: cam0_reg {
compatible = "regulator-fixed";
regulator-name = "cam0-regulator";
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
};
&uart0 {

View File

@@ -14,9 +14,5 @@
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
cam0_reg = <&cam0_reg>,"status";
cam0_reg_gpio = <&cam0_reg>,"gpios:4";
cam1_reg = <&cam1_reg>,"status";
cam1_reg_gpio = <&cam1_reg>,"gpios:4";
};
};

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm2708-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
@@ -166,9 +167,6 @@
gpio = <&gpio 44 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -4,6 +4,7 @@
#include "bcm2708-rpi.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero", "brcm,bcm2835";
@@ -113,9 +114,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -153,39 +153,6 @@
};
};
cam1_reg: cam1_regulator {
compatible = "regulator-fixed";
regulator-name = "cam1-reg";
enable-active-high;
/* Needs to be enabled, as removing a regulator is very unsafe */
status = "okay";
};
cam1_clk: cam1_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
status = "disabled";
};
cam0_regulator: cam0_regulator {
compatible = "regulator-fixed";
regulator-name = "cam0-reg";
enable-active-high;
status = "disabled";
};
cam0_clk: cam0_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
status = "disabled";
};
cam_dummy_reg: cam_dummy_reg {
compatible = "regulator-fixed";
regulator-name = "cam-dummy-reg";
status = "okay";
};
__overrides__ {
cam0-pwdn-ctrl;
cam0-pwdn;

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -6,6 +6,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm271x-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
@@ -187,9 +188,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -6,6 +6,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm271x-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
@@ -196,9 +197,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -8,15 +8,21 @@
/ {
compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
model = "Raspberry Pi Compute Module 3";
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-regulator";
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
cam0_reg: cam0_reg {
compatible = "regulator-fixed";
regulator-name = "cam0-regulator";
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
};
&uart0 {
@@ -138,9 +144,5 @@ cam0_reg: &cam0_regulator {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
cam0_reg = <&cam0_reg>,"status";
cam0_reg_gpio = <&cam0_reg>,"gpios:4";
cam1_reg = <&cam1_reg>,"status";
cam1_reg_gpio = <&cam1_reg>,"gpios:4";
};
};

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm2708-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837";
@@ -187,9 +188,6 @@
gpio = <&gpio 40 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -339,6 +339,7 @@
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
chosen {
@@ -607,9 +608,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -353,6 +353,7 @@
#include "bcm283x-rpi-csi0-2lane.dtsi"
#include "bcm283x-rpi-csi1-4lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
chosen {

View File

@@ -1,459 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711.dtsi"
#include "bcm2835-rpi.dtsi"
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
/ {
compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711";
model = "Raspberry Pi Compute Module 4S";
chosen {
/* 8250 auxiliary UART instead of pl011 */
stdout-path = "serial1:115200n8";
};
/* Will be filled by the bootloader */
memory@0 {
device_type = "memory";
reg = <0 0 0>;
};
aliases {
emmc2bus = &emmc2bus;
blconfig = &blconfig;
};
leds {
led-act {
gpios = <&virtgpio 0 0>;
};
};
};
&ddc0 {
status = "okay";
};
&firmware {
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;
};
};
&gpio {
/*
* Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
* the official GPU firmware DT blob.
*
* Legend:
* "FOO" = GPIO line named "FOO" on the schematic
* "FOO_N" = GPIO line named "FOO" on schematic, active low
*/
gpio-line-names = "ID_SDA",
"ID_SCL",
"SDA1",
"SCL1",
"GPIO_GCLK",
"GPIO5",
"GPIO6",
"SPI_CE1_N",
"SPI_CE0_N",
"SPI_MISO",
"SPI_MOSI",
"SPI_SCLK",
"GPIO12",
"GPIO13",
/* Serial port */
"TXD1",
"RXD1",
"GPIO16",
"GPIO17",
"GPIO18",
"GPIO19",
"GPIO20",
"GPIO21",
"GPIO22",
"GPIO23",
"GPIO24",
"GPIO25",
"GPIO26",
"GPIO27",
"GPIO28",
"GPIO29",
"GPIO30",
"GPIO31",
"GPIO32",
"GPIO33",
"GPIO34",
"GPIO35",
"GPIO36",
"GPIO37",
"GPIO38",
"GPIO39",
"PWM0_MISO",
"PWM1_MOSI",
"GPIO42",
"GPIO43",
"GPIO44",
"GPIO45";
};
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
wifi-2.4ghz-coexistence;
status = "okay";
};
&hvs {
clocks = <&firmware_clocks 4>;
};
&pixelvalve0 {
status = "okay";
};
&pixelvalve1 {
status = "okay";
};
&pixelvalve2 {
status = "okay";
};
&pixelvalve4 {
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
status = "okay";
};
&rmem {
/*
* RPi4's co-processor will copy the board's bootloader configuration
* into memory for the OS to consume. It'll also update this node with
* its placement information.
*/
blconfig: nvram@0 {
compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x0>;
no-map;
status = "disabled";
};
};
/* EMMC2 is used to drive the EMMC card */
&emmc2 {
bus-width = <8>;
broken-cd;
status = "okay";
};
&pcie0 {
status = "disabled";
};
&vchiq {
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
&vc4 {
status = "okay";
};
&vec {
status = "disabled";
};
// =============================================
// Downstream rpi- changes
#define BCM2711
#include "bcm270x.dtsi"
/ {
soc {
/delete-node/ pixelvalve@7e807000;
/delete-node/ hdmi@7e902000;
virtgpio: virtgpio {
compatible = "brcm,bcm2835-virtgpio";
gpio-controller;
#gpio-cells = <2>;
firmware = <&firmware>;
status = "okay";
};
};
};
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-csi0-2lane.dtsi"
#include "bcm283x-rpi-csi1-4lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
/delete-node/ &hdmi1;
/ {
chosen {
bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
};
aliases {
serial0 = &uart0;
mmc0 = &emmc2;
mmc1 = &mmcnr;
mmc2 = &sdhost;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
spi3 = &spi3;
spi4 = &spi4;
spi5 = &spi5;
spi6 = &spi6;
/delete-property/ intc;
};
/delete-node/ wifi-pwrseq;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
spidev0: spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <125000000>;
};
spidev1: spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <125000000>;
};
};
&gpio {
spi0_pins: spi0_pins {
brcm,pins = <9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
spi0_cs_pins: spi0_cs_pins {
brcm,pins = <8 7>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi3_pins: spi3_pins {
brcm,pins = <1 2 3>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi3_cs_pins: spi3_cs_pins {
brcm,pins = <0 24>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi4_pins: spi4_pins {
brcm,pins = <5 6 7>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi4_cs_pins: spi4_cs_pins {
brcm,pins = <4 25>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi5_pins: spi5_pins {
brcm,pins = <13 14 15>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi5_cs_pins: spi5_cs_pins {
brcm,pins = <12 26>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi6_pins: spi6_pins {
brcm,pins = <19 20 21>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi6_cs_pins: spi6_cs_pins {
brcm,pins = <18 27>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT0>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <BCM2835_FSEL_ALT0>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c3_pins: i2c3 {
brcm,pins = <4 5>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c4_pins: i2c4 {
brcm,pins = <8 9>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c5_pins: i2c5 {
brcm,pins = <12 13>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c6_pins: i2c6 {
brcm,pins = <22 23>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2s_pins: i2s {
brcm,pins = <18 19 20 21>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
sdio_pins: sdio_pins {
brcm,pins = <34 35 36 37 38 39>;
brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
brcm,pull = <0 2 2 2 2 2>;
};
uart0_pins: uart0_pins {
brcm,pins;
brcm,function;
brcm,pull;
};
uart2_pins: uart2_pins {
brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart3_pins: uart3_pins {
brcm,pins = <4 5>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart4_pins: uart4_pins {
brcm,pins = <8 9>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart5_pins: uart5_pins {
brcm,pins = <12 13>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
};
&i2c0if {
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&i2s {
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
// =============================================
// Board specific stuff here
&sdhost {
status = "disabled";
};
&gpio {
audio_pins: audio_pins {
brcm,pins = <>;
brcm,function = <>;
};
};
&leds {
act_led: led-act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&virtgpio 0 0>;
};
};
&pwm1 {
status = "disabled";
};
&audio {
pinctrl-names = "default";
pinctrl-0 = <&audio_pins>;
brcm,disable-headphones = <1>;
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
sd_poll_once = <&emmc2>, "non-removable?";
spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
<&spi0>, "dmas:8=", <&dma40>;
};
};

View File

@@ -0,0 +1,10 @@
// SPDX-License-Identifier: GPL-2.0
/ {
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-reg";
enable-active-high;
status = "disabled";
};
};

View File

@@ -765,7 +765,7 @@
compatible = "brcm,bcm4330-bt";
shutdown-gpios = <&gpl0 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
};

View File

@@ -289,7 +289,6 @@
ethphy: ethernet-phy@1 {
reg = <1>;
qca,clk-out-frequency = <125000000>;
};
};
};

View File

@@ -82,6 +82,6 @@
#define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0
#endif /* __DTS_IMX6ULL_PINFUNC_H */

View File

@@ -34,7 +34,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
cap1106.dtbo \
chipdip-dac.dtbo \
cma.dtbo \
cutiepi-panel.dtbo \
dht11.dtbo \
dionaudio-loco.dtbo \
dionaudio-loco-v2.dtbo \
@@ -242,7 +241,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
vc4-kms-v3d-pi4.dtbo \
vc4-kms-vga666.dtbo \
vga666.dtbo \
vl805.dtbo \
w1-gpio.dtbo \
w1-gpio-pullup.dtbo \
w5500.dtbo \

View File

@@ -144,16 +144,6 @@ Params:
See /sys/kernel/debug/raspberrypi_axi_monitor
for the results.
cam0_reg Enables CAM 0 regulator. CM1 & 3 only.
cam0_reg_gpio Set GPIO for CAM 0 regulator. Default 30.
CM1 & 3 only.
cam1_reg Enables CAM 1 regulator. CM1 & 3 only.
cam1_reg_gpio Set GPIO for CAM 1 regulator. Default 2.
CM1 & 3 only.
eee Enable Energy Efficient Ethernet support for
compatible devices (default "on"). See also
"tx_lpi_timer". Pi3B+ only.
@@ -679,12 +669,6 @@ Params: cma-512 CMA is 512MB (needs 1GB)
cma-default Use upstream's default value
Name: cutiepi-panel
Info: 8" TFT LCD display and touch panel used by cutiepi.io
Load: dtoverlay=cutiepi-panel
Params: <None>
Name: dht11
Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
Also sometimes found with the part number(s) AM230x.
@@ -1861,8 +1845,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx290
@@ -1885,8 +1867,6 @@ Params: 4lane Enable 4 CSI2 lanes. This requires a Compute
180, default 0)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx378
@@ -1900,8 +1880,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx477
@@ -1915,8 +1893,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx519
@@ -1930,8 +1906,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: iqaudio-codec
@@ -1998,8 +1972,6 @@ Info: Infineon irs1125 TOF camera module.
Load: dtoverlay=irs1125,<param>=<val>
Params: media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: jedec-spi-nor
@@ -2413,8 +2385,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: ov7251
@@ -2428,8 +2398,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: ov9281
@@ -2443,8 +2411,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: papirus
@@ -3427,8 +3393,6 @@ Params: 4lane Use 4 lanes (only applicable to Compute Modules
are supported by the driver.
media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: tc358743-audio
@@ -3625,8 +3589,6 @@ Params: clock-frequency Display clock frequency (Hz)
rgb888 Change to RGB888 output on GPIOs 0-27
bus-format Override the bus format for a MEDIA_BUS_FMT_*
value. NB also overridden by rgbXXX overrides.
backlight-gpio Defines a GPIO to be used for backlight control
(default of none).
Name: vc4-kms-dsi-7inch
@@ -3731,14 +3693,6 @@ Load: dtoverlay=vga666
Params: <None>
Name: vl805
Info: Overlay to enable a VIA VL805 USB3 controller on CM4 carriers
Will be loaded automatically by up-to-date firmware if "VL805=1" is
set in the EEPROM config.
Load: dtoverlay=vl805
Params: <None>
Name: w1-gpio
Info: Configures the w1-gpio Onewire interface module.
Use this overlay if you *don't* need a GPIO to drive an external pullup.

View File

@@ -1,117 +0,0 @@
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2711";
fragment@0 {
target=<&dsi1>;
__overlay__ {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port {
dsi1_out_port: endpoint {
remote-endpoint = <&panel_dsi_in1>;
};
};
display1: panel@0 {
compatible = "nwe,nwe080";
reg=<0>;
backlight = <&rpi_backlight>;
reset-gpios = <&gpio 20 0>;
port {
panel_dsi_in1: endpoint {
remote-endpoint = <&dsi1_out_port>;
};
};
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
pwm_pins: pwm_pins {
brcm,pins = <12>;
brcm,function = <4>; // ALT0
};
};
};
fragment@2 {
target = <&pwm>;
frag1: __overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
assigned-clock-rates = <1000000>;
status = "okay";
};
};
fragment@3 {
target-path = "/";
__overlay__ {
rpi_backlight: rpi_backlight {
compatible = "pwm-backlight";
brightness-levels = <0 6 8 12 16 24 32 40 48 64 96 128 160 192 224 255>;
default-brightness-level = <6>;
pwms = <&pwm 0 200000>;
power-supply = <&vdd_3v3_reg>;
status = "okay";
};
};
};
fragment@4 {
target = <&i2c6>;
frag0: __overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_pins>;
clock-frequency = <100000>;
};
};
fragment@5 {
target = <&i2c6_pins>;
__overlay__ {
brcm,pins = <22 23>;
};
};
fragment@6 {
target = <&gpio>;
__overlay__ {
goodix_pins: goodix_pins {
brcm,pins = <21 26>; // interrupt and reset
brcm,function = <0 0>; // in
brcm,pull = <2 2>; // pull-up
};
};
};
fragment@7 {
target = <&i2c6>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
gt9xx: gt9xx@5d {
compatible = "goodix,gt9271";
reg = <0x5D>;
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
interrupt-parent = <&gpio>;
interrupts = <21 2>; // high-to-low edge triggered
irq-gpios = <&gpio 21 0>;
reset-gpios = <&gpio 26 0>;
};
};
};
};

View File

@@ -9,28 +9,6 @@
compatible = "brcm,bcm2835";
fragment@0 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@1 {
target = <&cam1_clk>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
};
};
fragment@2 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
i2c_frag: fragment@100 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -42,19 +20,19 @@
reg = <0x10>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx219_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.8v */
VDDL-supply = <&cam_dummy_reg>; /* 1.2v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
rotation = <180>;
orientation = <2>;
port {
imx219_0: endpoint {
remote-endpoint = <&csi_ep>;
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
data-lanes = <1 2>;
clock-noncontinuous;
@@ -66,14 +44,13 @@
};
};
csi_frag: fragment@101 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi_ep: endpoint {
csi1_ep: endpoint {
remote-endpoint = <&imx219_0>;
clock-lanes = <0>;
data-lanes = <1 2>;
@@ -83,14 +60,64 @@
};
};
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target-path="/";
__overlay__ {
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx219>,"rotation:0";
orientation = <&imx219>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx219>, "clocks:0=",<&cam0_clk>,
<&imx219>, "VANA-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -9,7 +9,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,7 +20,7 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx290_clk>;
clock-names = "xclk";
clock-frequency = <37125000>;
@@ -28,8 +28,8 @@
orientation = <2>;
vdda-supply = <&cam1_reg>; /* 2.8v */
vdddo-supply = <&cam_dummy_reg>; /* 1.8v */
vddd-supply = <&cam_dummy_reg>; /* 1.5v */
vdddo-supply = <&imx290_vdddo>; /* 1.8v */
vddd-supply = <&imx290_vddd>; /* 1.5v */
port {
imx290_0: endpoint {
@@ -41,11 +41,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -62,11 +61,27 @@
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
cam_clk: __overlay__ {
status = "okay";
clock-frequency = <37125000>;
fragment@3 {
target-path="/";
__overlay__ {
imx290_vdddo: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx290_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx290_vddd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx290_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
};
imx290_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <37125000>;
};
};
};
@@ -77,6 +92,16 @@
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx290_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&imx290_0>;
__overlay__ {
@@ -109,17 +134,19 @@
};
};
fragment@10 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
4lane = <0>, "-6+7-8+9";
clock-frequency = <&cam_clk>,"clock-frequency:0",
clock-frequency = <&imx290_clk>,"clock-frequency:0",
<&imx290>,"clock-frequency:0";
rotation = <&imx290>,"rotation:0";
orientation = <&imx290>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx290>, "clocks:0=",<&cam0_clk>,
<&imx290>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=10";
};
};

View File

@@ -4,36 +4,7 @@
/{
compatible = "brcm,bcm2835";
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
cam_clk: __overlay__ {
clock-frequency = <24000000>;
status = "okay";
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
reg_frag: fragment@5 {
target = <&cam1_reg>;
cam_reg: __overlay__ {
startup-delay-us = <300000>;
};
};
i2c_frag: fragment@100 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -44,19 +15,19 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx477_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.05v */
VDDL-supply = <&cam_dummy_reg>; /* 1.8v */
VDIG-supply = <&imx477_vdig>; /* 1.05v */
VDDL-supply = <&imx477_vddl>; /* 1.8v */
rotation = <180>;
orientation = <2>;
port {
imx477_0: endpoint {
remote-endpoint = <&csi_ep>;
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
data-lanes = <1 2>;
clock-noncontinuous;
@@ -68,14 +39,13 @@
};
};
csi_frag: fragment@101 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi_ep: endpoint {
csi1_ep: endpoint {
remote-endpoint = <&imx477_0>;
clock-lanes = <0>;
data-lanes = <1 2>;
@@ -85,15 +55,64 @@
};
};
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target-path="/";
__overlay__ {
imx477_vdig: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx477_vdig";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
imx477_vddl: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx477_vddl";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx477_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx477_vana";
startup-delay-us = <300000>;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx477>,"rotation:0";
orientation = <&imx477>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&reg_frag>, "target:0=",<&cam0_reg>,
<&imx477>, "clocks:0=",<&cam0_clk>,
<&imx477>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,12 +20,12 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx519_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.8v */
VDDL-supply = <&cam_dummy_reg>; /* 1.2v */
VDIG-supply = <&imx519_vdig>; /* 1.8v */
VDDL-supply = <&imx519_vddl>; /* 1.2v */
rotation = <0>;
orientation = <2>;
@@ -44,11 +44,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port{
csi1_ep: endpoint{
@@ -68,11 +67,27 @@
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
fragment@3 {
target-path="/";
__overlay__ {
clock-frequency = <24000000>;
status = "okay";
imx519_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx519_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx519_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx519_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx519_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
@@ -83,14 +98,26 @@
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx519_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx519>,"rotation:0";
orientation = <&imx519>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx519>, "clocks:0=",<&cam0_clk>,
<&imx519>, "VANA-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -6,20 +6,20 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
irs1125: irs1125@3d {
irs1125: irs1125@3D {
compatible = "infineon,irs1125";
reg = <0x3d>;
reg = <0x3D>;
status = "okay";
pwdn-gpios = <&gpio 5 0>;
clocks = <&cam1_clk>;
clocks = <&irs1125_clk>;
port {
irs1125_0: endpoint {
@@ -35,9 +35,9 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
@@ -72,19 +72,25 @@
};
};
clk_frag: fragment@5 {
target = <&cam1_clk>;
fragment@5 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <26000000>;
irs1125_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
};
};
fragment@6 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&irs1125>, "clocks:0=",<&cam0_clk>;
media-controller = <0>,"=6";
};
};

View File

@@ -6,7 +6,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -18,11 +18,8 @@
reg = <0x36>;
status = "okay";
clocks = <&cam1_clk>;
avdd-supply = <&cam1_reg>;
dovdd-supply = <&cam_dummy_reg>;
dvdd-supply = <&cam_dummy_reg>;
pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
clocks = <&ov5647_clk>;
rotation = <0>;
orientation = <2>;
@@ -41,11 +38,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -70,30 +66,37 @@
};
};
reg_frag: fragment@4 {
target = <&cam1_reg>;
fragment@4 {
target-path="/__overrides__";
__overlay__ {
startup-delay-us = <20000>;
cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
cam0-led = <&ov5647>,"pwdn-gpios:16";
};
};
clk_frag: fragment@5 {
target = <&cam1_clk>;
fragment@5 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <25000000>;
ov5647_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov5647>,"rotation:0";
orientation = <&ov5647>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&reg_frag>, "target:0=",<&cam0_reg>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov5647>, "clocks:0=",<&cam0_clk>,
<&ov5647>, "avdd-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,13 +20,13 @@
reg = <0x60>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&ov7251_clk>;
clock-names = "xclk";
clock-frequency = <24000000>;
vdddo-supply = <&cam_dummy_reg>;
vdddo-supply = <&ov7251_dovdd>;
vdda-supply = <&cam1_reg>;
vddd-supply = <&cam_dummy_reg>;
vddd-supply = <&ov7251_dvdd>;
rotation = <0>;
orientation = <2>;
@@ -45,9 +45,9 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
@@ -67,28 +67,55 @@
};
fragment@3 {
target-path="/";
__overlay__ {
ov7251_dovdd: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "ov7251_dovdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ov7251_dvdd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "ov7251_dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ov7251_clk: ov7251-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@4 {
target = <&cam1_clk>;
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
regulator-name = "ov7251_avdd";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov7251>,"rotation:0";
orientation = <&ov7251>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov7251>, "clocks:0=",<&cam0_clk>,
<&ov7251>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,12 +20,12 @@
reg = <0x60>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&ov9281_clk>;
clock-names = "xvclk";
avdd-supply = <&cam1_reg>;
dovdd-supply = <&cam_dummy_reg>;
dvdd-supply = <&cam_dummy_reg>;
dovdd-supply = <&ov9281_dovdd>;
dvdd-supply = <&ov9281_dvdd>;
rotation = <0>;
orientation = <2>;
@@ -44,11 +44,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -68,28 +67,55 @@
};
fragment@3 {
target-path="/";
__overlay__ {
ov9281_dovdd: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "ov9281_dovdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ov9281_dvdd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "ov9281_dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ov9281_clk: ov9281-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@4 {
target = <&cam1_clk>;
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
regulator-name = "ov9281_avdd";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov9281>,"rotation:0";
orientation = <&ov9281>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov9281>, "clocks:0=",<&cam0_clk>,
<&ov9281>, "avdd-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -5,10 +5,6 @@
deprecated = "use i2c-sensor,bmp085";
};
cutiepi-panel {
bcm2711;
};
highperi {
bcm2711;
};

View File

@@ -6,23 +6,23 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
tc358743: tc358743@f {
tc358743@0f {
compatible = "toshiba,tc358743";
reg = <0x0f>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&tc358743_clk>;
clock-names = "refclk";
port {
tc358743_0: endpoint {
tc358743: endpoint {
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
clock-noncontinuous;
@@ -34,28 +34,28 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
csi1_ep: endpoint {
remote-endpoint = <&tc358743_0>;
remote-endpoint = <&tc358743>;
};
};
};
};
fragment@2 {
target = <&tc358743_0>;
target = <&tc358743>;
__overlay__ {
data-lanes = <1 2>;
};
};
fragment@3 {
target = <&tc358743_0>;
target = <&tc358743>;
__dormant__ {
data-lanes = <1 2 3 4>;
};
@@ -75,11 +75,14 @@
};
};
clk_frag: fragment@6 {
target = <&cam1_clk>;
fragment@6 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <27000000>;
tc358743_clk: bridge-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
};
@@ -97,13 +100,16 @@
};
};
fragment@9 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
4lane = <0>, "-2+3-7+8";
link-frequency = <&tc358743_0>,"link-frequencies#0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&tc358743>, "clocks:0=",<&cam0_clk>;
link-frequency = <&tc358743>,"link-frequencies#0";
media-controller = <0>,"=9";
};
};

View File

@@ -63,23 +63,6 @@
};
};
fragment@2 {
target = <&panel>;
__dormant__ {
backlight = <&backlight>;
};
};
fragment@3 {
target-path = "/";
__dormant__ {
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 255 GPIO_ACTIVE_HIGH>;
};
};
};
__overrides__ {
clock-frequency = <&timing>, "clock-frequency:0";
hactive = <&timing>, "hactive:0";
@@ -105,7 +88,5 @@
rgb888 = <&panel>, "bus-format:0=0x100a",
<&dpi_node>, "pinctrl-0:0=",<&dpi_gpio0>;
bus-format = <&panel>, "bus-format:0";
backlight-gpio = <0>, "+2+3",
<&backlight>, "gpios:4";
};
};

View File

@@ -1,18 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
/ {
compatible = "brcm,bcm2711";
fragment@0 {
target-path = "pcie0/pci@0,0";
__overlay__ {
usb@0,0 {
reg = <0 0 0 0 0>;
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
};
};
};
};

View File

@@ -12,7 +12,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00aa";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -119,7 +119,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
compatible = "n25q256a";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -124,7 +124,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;

View File

@@ -169,7 +169,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -80,7 +80,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
compatible = "n25q256a";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -116,7 +116,7 @@
flash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q512a", "jedec,spi-nor";
compatible = "n25q512a";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -224,7 +224,7 @@
n25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128", "jedec,spi-nor";
compatible = "n25q128";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
@@ -241,7 +241,7 @@
n25q00@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <1>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -1257,7 +1257,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -953,7 +953,6 @@ CONFIG_DRM=m
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_UDL=m
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_DISPLAY_CONNECTOR=m
@@ -975,7 +974,6 @@ CONFIG_FB_UDL=m
CONFIG_FB_SIMPLE=y
CONFIG_FB_SSD1307=m
CONFIG_FB_RPISENSE=m
CONFIG_BACKLIGHT_PWM=m
CONFIG_BACKLIGHT_RPI=m
CONFIG_BACKLIGHT_GPIO=m
CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -1279,7 +1277,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -1250,7 +1250,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -596,9 +596,11 @@ call_fpe:
tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2
reteq lr
and r8, r0, #0x00000f00 @ mask out CP number
THUMB( lsr r8, r8, #8 )
mov r7, #1
add r6, r10, r8, lsr #8 @ add used_cp[] array offset first
strb r7, [r6, #TI_USED_CP] @ set appropriate used_cp[]
add r6, r10, #TI_USED_CP
ARM( strb r7, [r6, r8, lsr #8] ) @ set appropriate used_cp[]
THUMB( strb r7, [r6, r8] ) @ set appropriate used_cp[]
#ifdef CONFIG_IWMMXT
@ Test if we need to give access to iWMMXt coprocessors
ldr r5, [r10, #TI_FLAGS]
@@ -607,7 +609,7 @@ call_fpe:
bcs iwmmxt_task_enable
#endif
ARM( add pc, pc, r8, lsr #6 )
THUMB( lsr r8, r8, #6 )
THUMB( lsl r8, r8, #2 )
THUMB( add pc, r8 )
nop

View File

@@ -27,8 +27,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "arm-mem.h"
#include "memcpymove.h"

View File

@@ -280,7 +280,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
199:
pop {DAT3, DAT4, DAT5, DAT6, DAT7}
pop {D, DAT1, DAT2, pc}
UNWIND( .fnend )
.endm
.macro memcpy_medium_inner_loop backwards, align
@@ -359,13 +358,19 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
LAST .req ip
OFF .req lr
UNWIND( .fnstart )
.cfi_startproc
push {D, DAT1, DAT2, lr}
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_undefined S
.cfi_undefined N
.cfi_undefined DAT0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_undefined LAST
.cfi_rel_offset lr, 12
.if backwards
add D, D, N
@@ -381,11 +386,17 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
/* Long case */
push {DAT3, DAT4, DAT5, DAT6, DAT7}
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
UNWIND( .save {DAT3, DAT4, DAT5, DAT6, DAT7} )
.cfi_def_cfa_offset 36
.cfi_rel_offset D, 20
.cfi_rel_offset DAT1, 24
.cfi_rel_offset DAT2, 28
.cfi_rel_offset DAT3, 0
.cfi_rel_offset DAT4, 4
.cfi_rel_offset DAT5, 8
.cfi_rel_offset DAT6, 12
.cfi_rel_offset DAT7, 16
.cfi_rel_offset lr, 32
/* Adjust N so that the decrement instruction can also test for
* inner loop termination. We want it to stop when there are
@@ -425,10 +436,16 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
156: memcpy_long_inner_loop backwards, 2
157: memcpy_long_inner_loop backwards, 3
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_same_value DAT3
.cfi_same_value DAT4
.cfi_same_value DAT5
.cfi_same_value DAT6
.cfi_same_value DAT7
.cfi_rel_offset lr, 12
160: /* Medium case */
preload_all backwards, 0, 0, S, N, DAT2, OFF
@@ -471,7 +488,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
memcpy_short_inner_loop backwards, 0
140: memcpy_short_inner_loop backwards, 1
UNWIND( .fnend )
.cfi_endproc
.unreq D
.unreq S

View File

@@ -27,8 +27,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "arm-mem.h"
#include "memcpymove.h"

View File

@@ -52,6 +52,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
ENTRY(mmioset)
ENTRY(memset)
ENTRY(__memset32)
ENTRY(__memset64)
S .req a1
DAT0 .req a2
@@ -61,13 +63,9 @@ ENTRY(memset)
DAT3 .req lr
orr DAT0, DAT0, DAT0, lsl #8
orr DAT0, DAT0, DAT0, lsl #16
ENTRY(__memset32)
mov DAT1, DAT0
ENTRY(__memset64)
push {S, lr}
orr DAT0, DAT0, DAT0, lsl #16
mov DAT1, DAT0
/* See if we're guaranteed to have at least one 16-byte aligned 16-byte write */
cmp N, #31
@@ -90,7 +88,7 @@ ENTRY(__memset64)
stmcsia S!, {DAT0, DAT1}
164: /* Delayed set up of DAT2 and DAT3 so we could use them as scratch registers above */
mov DAT2, DAT0
mov DAT3, DAT1
mov DAT3, DAT0
/* Now the inner loop of 16-byte stores */
165: stmia S!, {DAT0, DAT1, DAT2, DAT3}
subs N, N, #16
@@ -106,7 +104,7 @@ ENTRY(__memset64)
170: /* Short case */
mov DAT2, DAT0
mov DAT3, DAT1
mov DAT3, DAT0
tst S, #3
beq 174f
172: subs N, N, #1

View File

@@ -125,22 +125,11 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max_low,
int pfn_valid(unsigned long pfn)
{
phys_addr_t addr = __pfn_to_phys(pfn);
unsigned long pageblock_size = PAGE_SIZE * pageblock_nr_pages;
if (__phys_to_pfn(addr) != pfn)
return 0;
/*
* If address less than pageblock_size bytes away from a present
* memory chunk there still will be a memory map entry for it
* because we round freed memory map to the pageblock boundaries.
*/
if (memblock_overlaps_region(&memblock.memory,
ALIGN_DOWN(addr, pageblock_size),
pageblock_size))
return 1;
return 0;
return memblock_is_map_memory(addr);
}
EXPORT_SYMBOL(pfn_valid);
#endif
@@ -324,14 +313,14 @@ static void __init free_unused_memmap(void)
*/
start = min(start,
ALIGN(prev_end, PAGES_PER_SECTION));
#endif
#else
/*
* Align down here since many operations in VM subsystem
* presume that there are no holes in the memory map inside
* a pageblock
* Align down here since the VM subsystem insists that the
* memmap entries are valid from the bank start aligned to
* MAX_ORDER_NR_PAGES.
*/
start = round_down(start, pageblock_nr_pages);
start = round_down(start, MAX_ORDER_NR_PAGES);
#endif
/*
* If we had a previous bank, and there is a space
* between the current bank and the previous, free it.
@@ -340,19 +329,17 @@ static void __init free_unused_memmap(void)
free_memmap(prev_end, start);
/*
* Align up here since many operations in VM subsystem
* presume that there are no holes in the memory map inside
* a pageblock
* Align up here since the VM subsystem insists that the
* memmap entries are valid from the bank end aligned to
* MAX_ORDER_NR_PAGES.
*/
prev_end = ALIGN(end, pageblock_nr_pages);
prev_end = ALIGN(end, MAX_ORDER_NR_PAGES);
}
#ifdef CONFIG_SPARSEMEM
if (!IS_ALIGNED(prev_end, PAGES_PER_SECTION)) {
prev_end = ALIGN(end, pageblock_nr_pages);
if (!IS_ALIGNED(prev_end, PAGES_PER_SECTION))
free_memmap(prev_end,
ALIGN(prev_end, PAGES_PER_SECTION));
}
#endif
}

View File

@@ -27,7 +27,6 @@
#include <linux/vmalloc.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <linux/memblock.h>
#include <asm/cp15.h>
#include <asm/cputype.h>
@@ -285,8 +284,7 @@ static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
* Don't allow RAM to be mapped with mismatched attributes - this
* causes problems with ARMv6+
*/
if (WARN_ON(memblock_is_map_memory(PFN_PHYS(pfn)) &&
mtype != MT_MEMORY_RW))
if (WARN_ON(pfn_valid(pfn) && mtype != MT_MEMORY_RW))
return NULL;
area = get_vm_area_caller(size, VM_IOREMAP, caller);

View File

@@ -1265,8 +1265,7 @@ config KUSER_HELPERS
config COMPAT_VDSO
bool "Enable vDSO for 32-bit applications"
depends on !CPU_BIG_ENDIAN
depends on (CC_IS_CLANG && LD_IS_LLD) || "$(CROSS_COMPILE_COMPAT)" != ""
depends on !CPU_BIG_ENDIAN && "$(CROSS_COMPILE_COMPAT)" != ""
select GENERIC_COMPAT_VDSO
default y
help

View File

@@ -69,7 +69,7 @@
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
phy-mode = "rgmii";
status = "okay";
};

View File

@@ -866,12 +866,11 @@
assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>,
<&clk IMX8MM_CLK_ENET_TIMER>,
<&clk IMX8MM_CLK_ENET_REF>,
<&clk IMX8MM_CLK_ENET_PHY_REF>;
<&clk IMX8MM_CLK_ENET_TIMER>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
<&clk IMX8MM_SYS_PLL2_100M>,
<&clk IMX8MM_SYS_PLL2_125M>,
<&clk IMX8MM_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
<&clk IMX8MM_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

View File

@@ -753,12 +753,11 @@
assigned-clocks = <&clk IMX8MN_CLK_ENET_AXI>,
<&clk IMX8MN_CLK_ENET_TIMER>,
<&clk IMX8MN_CLK_ENET_REF>,
<&clk IMX8MN_CLK_ENET_PHY_REF>;
<&clk IMX8MN_CLK_ENET_TIMER>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
<&clk IMX8MN_SYS_PLL2_100M>,
<&clk IMX8MN_SYS_PLL2_125M>,
<&clk IMX8MN_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
<&clk IMX8MN_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

View File

@@ -62,8 +62,6 @@
reg = <1>;
eee-broken-1000t;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
};
};
};

View File

@@ -725,12 +725,11 @@
assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
<&clk IMX8MP_CLK_ENET_TIMER>,
<&clk IMX8MP_CLK_ENET_REF>,
<&clk IMX8MP_CLK_ENET_PHY_REF>;
<&clk IMX8MP_CLK_ENET_TIMER>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_125M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
<&clk IMX8MP_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

View File

@@ -91,7 +91,7 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_io>;
vim-supply = <&vcc_io>;
};
vdd_core: vdd-core {

View File

@@ -699,6 +699,7 @@
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};

View File

@@ -49,7 +49,7 @@
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
vim-supply = <&vcc3v3_sys>;
};
vcc3v3_sys: vcc3v3-sys {

View File

@@ -459,7 +459,7 @@
status = "okay";
bt656-supply = <&vcc_3v0>;
audio-supply = <&vcc1v8_codec>;
audio-supply = <&vcc_3v0>;
sdmmc-supply = <&vcc_sdio>;
gpio1830-supply = <&vcc_3v0>;
};

View File

@@ -956,7 +956,6 @@ CONFIG_DRM=m
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_UDL=m
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_DISPLAY_CONNECTOR=m
@@ -978,7 +977,6 @@ CONFIG_FB_UDL=m
CONFIG_FB_SIMPLE=y
CONFIG_FB_SSD1307=m
CONFIG_FB_RPISENSE=m
CONFIG_BACKLIGHT_PWM=m
CONFIG_BACKLIGHT_RPI=m
CONFIG_BACKLIGHT_GPIO=m
CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -1282,7 +1280,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -1143,7 +1143,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -83,7 +83,7 @@
#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
/* TCR_EL2 Registers bits */
#define TCR_EL2_RES1 ((1U << 31) | (1 << 23))
#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
#define TCR_EL2_TBI (1 << 20)
#define TCR_EL2_PS_SHIFT 16
#define TCR_EL2_PS_MASK (7 << TCR_EL2_PS_SHIFT)
@@ -268,7 +268,7 @@
#define CPTR_EL2_TFP_SHIFT 10
/* Hyp Coprocessor Trap Register */
#define CPTR_EL2_TCPAC (1U << 31)
#define CPTR_EL2_TCPAC (1 << 31)
#define CPTR_EL2_TAM (1 << 30)
#define CPTR_EL2_TTA (1 << 20)
#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)

View File

@@ -77,17 +77,11 @@
.endm
SYM_CODE_START(ftrace_regs_caller)
#ifdef BTI_C
BTI_C
#endif
ftrace_regs_entry 1
b ftrace_common
SYM_CODE_END(ftrace_regs_caller)
SYM_CODE_START(ftrace_caller)
#ifdef BTI_C
BTI_C
#endif
ftrace_regs_entry 0
b ftrace_common
SYM_CODE_END(ftrace_caller)

View File

@@ -10,17 +10,28 @@ include $(srctree)/lib/vdso/Makefile
# Same as cc-*option, but using CC_COMPAT instead of CC
ifeq ($(CONFIG_CC_IS_CLANG), y)
CC_COMPAT ?= $(CC)
CC_COMPAT += --target=arm-linux-gnueabi
else
CC_COMPAT ?= $(CROSS_COMPILE_COMPAT)gcc
COMPAT_GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE_COMPAT)elfedit))
COMPAT_GCC_TOOLCHAIN := $(realpath $(COMPAT_GCC_TOOLCHAIN_DIR)/..)
CC_COMPAT_CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%))
CC_COMPAT_CLANG_FLAGS += --prefix=$(COMPAT_GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE_COMPAT))
CC_COMPAT_CLANG_FLAGS += -no-integrated-as -Qunused-arguments
ifneq ($(COMPAT_GCC_TOOLCHAIN),)
CC_COMPAT_CLANG_FLAGS += --gcc-toolchain=$(COMPAT_GCC_TOOLCHAIN)
endif
ifeq ($(CONFIG_LD_IS_LLD), y)
CC_COMPAT ?= $(CC)
CC_COMPAT += $(CC_COMPAT_CLANG_FLAGS)
ifneq ($(LLVM),)
LD_COMPAT ?= $(LD)
else
LD_COMPAT ?= $(CROSS_COMPILE_COMPAT)ld
endif
else
CC_COMPAT ?= $(CROSS_COMPILE_COMPAT)gcc
LD_COMPAT ?= $(CROSS_COMPILE_COMPAT)ld
endif
cc32-option = $(call try-run,\
$(CC_COMPAT) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
@@ -44,6 +55,10 @@ VDSO_CPPFLAGS += $(LINUXINCLUDE)
# Common C and assembly flags
# From top-level Makefile
VDSO_CAFLAGS := $(VDSO_CPPFLAGS)
ifneq ($(shell $(CC_COMPAT) --version 2>&1 | head -n 1 | grep clang),)
VDSO_CAFLAGS += --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%))
endif
VDSO_CAFLAGS += $(call cc32-option,-fno-PIE)
ifdef CONFIG_DEBUG_INFO
VDSO_CAFLAGS += -g

View File

@@ -406,12 +406,6 @@ static inline bool __hyp_handle_ptrauth(struct kvm_vcpu *vcpu)
*/
static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
{
/*
* Save PSTATE early so that we can evaluate the vcpu mode
* early on.
*/
vcpu->arch.ctxt.regs.pstate = read_sysreg_el2(SYS_SPSR);
if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)
vcpu->arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR);

View File

@@ -54,12 +54,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
{
ctxt->regs.pc = read_sysreg_el2(SYS_ELR);
/*
* Guest PSTATE gets saved at guest fixup time in all
* cases. We still need to handle the nVHE host side here.
*/
if (!has_vhe() && ctxt->__hyp_running_vcpu)
ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR);
ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR);
if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN))
ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2);

View File

@@ -211,7 +211,7 @@ asmlinkage void do_trap_illinsn(struct pt_regs *regs)
asmlinkage void do_trap_fpe(struct pt_regs *regs)
{
#ifdef CONFIG_CPU_HAS_FPU
#ifdef CONFIG_CPU_HAS_FP
return fpu_fpe(regs);
#else
do_trap_error(regs, SIGILL, ILL_ILLOPC, regs->pc,
@@ -221,7 +221,7 @@ asmlinkage void do_trap_fpe(struct pt_regs *regs)
asmlinkage void do_trap_priv(struct pt_regs *regs)
{
#ifdef CONFIG_CPU_HAS_FPU
#ifdef CONFIG_CPU_HAS_FP
if (user_mode(regs) && fpu_libc_helper(regs))
return;
#endif

View File

@@ -17,12 +17,7 @@
# Mike Shaver, Helge Deller and Martin K. Petersen
#
ifdef CONFIG_PARISC_SELF_EXTRACT
boot := arch/parisc/boot
KBUILD_IMAGE := $(boot)/bzImage
else
KBUILD_IMAGE := vmlinuz
endif
NM = sh $(srctree)/arch/parisc/nm
CHECKFLAGS += -D__hppa__=1

View File

@@ -16,7 +16,7 @@ static inline void
_futex_spin_lock_irqsave(u32 __user *uaddr, unsigned long int *flags)
{
extern u32 lws_lock_start[];
long index = ((long)uaddr & 0x7f8) >> 1;
long index = ((long)uaddr & 0x3f8) >> 1;
arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
local_irq_save(*flags);
arch_spin_lock(s);
@@ -26,7 +26,7 @@ static inline void
_futex_spin_unlock_irqrestore(u32 __user *uaddr, unsigned long int *flags)
{
extern u32 lws_lock_start[];
long index = ((long)uaddr & 0x7f8) >> 1;
long index = ((long)uaddr & 0x3f8) >> 1;
arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
arch_spin_unlock(s);
local_irq_restore(*flags);

View File

@@ -39,7 +39,6 @@ verify "$3"
if [ -n "${INSTALLKERNEL}" ]; then
if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
if [ -x /usr/sbin/${INSTALLKERNEL} ]; then exec /usr/sbin/${INSTALLKERNEL} "$@"; fi
fi
# Default install

View File

@@ -478,7 +478,7 @@ lws_start:
extrd,u %r1,PSW_W_BIT,1,%r1
/* sp must be aligned on 4, so deposit the W bit setting into
* the bottom of sp temporarily */
or,od %r1,%r30,%r30
or,ev %r1,%r30,%r30
/* Clip LWS number to a 32-bit value for 32-bit processes */
depdi 0, 31, 32, %r20

View File

@@ -252,13 +252,27 @@ void __init time_init(void)
static int __init init_cr16_clocksource(void)
{
/*
* The cr16 interval timers are not syncronized across CPUs, even if
* they share the same socket.
* The cr16 interval timers are not syncronized across CPUs on
* different sockets, so mark them unstable and lower rating on
* multi-socket SMP systems.
*/
if (num_online_cpus() > 1 && !running_on_qemu) {
clocksource_cr16.name = "cr16_unstable";
clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
clocksource_cr16.rating = 0;
int cpu;
unsigned long cpu0_loc;
cpu0_loc = per_cpu(cpu_data, 0).cpu_loc;
for_each_online_cpu(cpu) {
if (cpu == 0)
continue;
if ((cpu0_loc != 0) &&
(cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc))
continue;
clocksource_cr16.name = "cr16_unstable";
clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
clocksource_cr16.rating = 0;
break;
}
}
/* XXX: We may want to mark sched_clock stable here if cr16 clocks are

View File

@@ -729,8 +729,6 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
}
mmap_read_unlock(current->mm);
}
/* CPU could not fetch instruction, so clear stale IIR value. */
regs->iir = 0xbaadf00d;
fallthrough;
case 27:
/* Data memory protection ID trap */

View File

@@ -220,7 +220,7 @@ static int smp_85xx_start_cpu(int cpu)
local_irq_save(flags);
hard_irq_disable();
if (qoriq_pm_ops && qoriq_pm_ops->cpu_up_prepare)
if (qoriq_pm_ops)
qoriq_pm_ops->cpu_up_prepare(cpu);
/* if cpu is not spinning, reset it */
@@ -292,7 +292,7 @@ static int smp_85xx_kick_cpu(int nr)
booting_thread_hwid = cpu_thread_in_core(nr);
primary = cpu_first_thread_sibling(nr);
if (qoriq_pm_ops && qoriq_pm_ops->cpu_up_prepare)
if (qoriq_pm_ops)
qoriq_pm_ops->cpu_up_prepare(nr);
/*

View File

@@ -1034,6 +1034,15 @@ static phys_addr_t ddw_memory_hotplug_max(void)
phys_addr_t max_addr = memory_hotplug_max();
struct device_node *memory;
/*
* The "ibm,pmemory" can appear anywhere in the address space.
* Assuming it is still backed by page structs, set the upper limit
* for the huge DMA window as MAX_PHYSMEM_BITS.
*/
if (of_find_node_by_type(NULL, "ibm,pmemory"))
return (sizeof(phys_addr_t) * 8 <= MAX_PHYSMEM_BITS) ?
(phys_addr_t) -1 : (1ULL << MAX_PHYSMEM_BITS);
for_each_node_by_type(memory, "memory") {
unsigned long start, size;
int n_mem_addr_cells, n_mem_size_cells, len;

View File

@@ -14,13 +14,12 @@
/* I/O Map */
#define ZPCI_IOMAP_SHIFT 48
#define ZPCI_IOMAP_ADDR_SHIFT 62
#define ZPCI_IOMAP_ADDR_BASE (1UL << ZPCI_IOMAP_ADDR_SHIFT)
#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000UL
#define ZPCI_IOMAP_ADDR_OFF_MASK ((1UL << ZPCI_IOMAP_SHIFT) - 1)
#define ZPCI_IOMAP_MAX_ENTRIES \
(1UL << (ZPCI_IOMAP_ADDR_SHIFT - ZPCI_IOMAP_SHIFT))
((ULONG_MAX - ZPCI_IOMAP_ADDR_BASE + 1) / (1UL << ZPCI_IOMAP_SHIFT))
#define ZPCI_IOMAP_ADDR_IDX_MASK \
((ZPCI_IOMAP_ADDR_BASE - 1) & ~ZPCI_IOMAP_ADDR_OFF_MASK)
(~ZPCI_IOMAP_ADDR_OFF_MASK - ZPCI_IOMAP_ADDR_BASE)
struct zpci_iomap_entry {
u32 fh;

View File

@@ -277,7 +277,6 @@ int arch_kexec_apply_relocations_add(struct purgatory_info *pi,
{
Elf_Rela *relas;
int i, r_type;
int ret;
relas = (void *)pi->ehdr + relsec->sh_offset;
@@ -312,11 +311,7 @@ int arch_kexec_apply_relocations_add(struct purgatory_info *pi,
addr = section->sh_addr + relas[i].r_offset;
r_type = ELF64_R_TYPE(relas[i].r_info);
ret = arch_kexec_do_relocs(r_type, loc, val, addr);
if (ret) {
pr_err("Unknown rela relocation: %d\n", r_type);
return -ENOEXEC;
}
arch_kexec_do_relocs(r_type, loc, val, addr);
}
return 0;
}

View File

@@ -845,6 +845,9 @@ static void __init setup_memory(void)
storage_key_init_range(start, end);
psw_set_key(PAGE_DEFAULT_KEY);
/* Only cosmetics */
memblock_enforce_memory_limit(memblock_end_of_DRAM());
}
/*

View File

@@ -171,11 +171,10 @@ static noinline int unwindme_func4(struct unwindme *u)
}
/*
* Trigger operation exception; use insn notation to bypass
* llvm's integrated assembler sanity checks.
* trigger specification exception
*/
asm volatile(
" .insn e,0x0000\n" /* illegal opcode */
" mvcl %%r1,%%r1\n"
"0: nopr %%r7\n"
EX_TABLE(0b, 0b)
:);

View File

@@ -1939,7 +1939,6 @@ config EFI
depends on ACPI
select UCS2_STRING
select EFI_RUNTIME_WRAPPERS
select ARCH_USE_MEMREMAP_PROT
help
This enables the kernel to use EFI runtime services that are
available (such as the EFI variable services).

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