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Author SHA1 Message Date
Dom Cobley
9d8e963f36 fixup! vc4/drm: Ignore vc4_hdmi->output_enabled for allowing audio 2021-12-08 15:26:30 +00:00
Dom Cobley
010586f1bd vc4/drm: Ignore vc4_hdmi->output_enabled for allowing audio
Otherwise we reject audio playback when switching hdmi modes

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
2021-12-08 14:44:35 +00:00
1644 changed files with 8916 additions and 19100 deletions

34
.github/ISSUE_TEMPLATE/bug_report.md vendored Normal file
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@@ -0,0 +1,34 @@
---
name: Bug report
about: Create a report to help us fix your issue
---
**Is this the right place for my bug report?**
This repository contains the Linux kernel used on the Raspberry Pi. If you believe that the issue you are seeing is kernel-related, this is the right place. If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland). If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo). If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it.
**Describe the bug**
Add a clear and concise description of what you think the bug is.
**To reproduce**
List the steps required to reproduce the issue.
**Expected behaviour**
Add a clear and concise description of what you expected to happen.
**Actual behaviour**
Add a clear and concise description of what actually happened.
**System**
Copy and paste the results of the raspinfo command in to this section. Alternatively, copy and paste a pastebin link, or add answers to the following questions:
* Which model of Raspberry Pi? e.g. Pi3B+, PiZeroW
* Which OS and version (`cat /etc/rpi-issue`)?
* Which firmware version (`vcgencmd version`)?
* Which kernel version (`uname -a`)?
**Logs**
If applicable, add the relevant output from `dmesg` or similar.
**Additional context**
Add any other relevant context for the problem.

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@@ -1,91 +0,0 @@
name: "Bug report"
description: Create a report to help us fix your issue
body:
- type: markdown
attributes:
value: |
**Is this the right place for my bug report?**
This repository contains the Linux kernel used on the Raspberry Pi.
If you believe that the issue you are seeing is kernel-related, this is the right place.
If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland).
If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo).
If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it.
- type: textarea
id: description
attributes:
label: Describe the bug
description: |
Add a clear and concise description of what you think the bug is.
validations:
required: true
- type: textarea
id: reproduce
attributes:
label: Steps to reproduce the behaviour
description: |
List the steps required to reproduce the issue.
validations:
required: true
- type: dropdown
id: model
attributes:
label: Device (s)
description: On which device you are facing the bug?
multiple: true
options:
- Raspberry Pi Zero
- Raspberry Pi Zero W/WH
- Raspberry Pi Zero 2 W
- Raspberry Pi 1 Mod. A
- Raspberry Pi 1 Mod. A+
- Raspberry Pi 1 Mod. B
- Raspberry Pi 1 Mod. B+
- Raspberry Pi 2 Mod. B
- Raspberry Pi 2 Mod. B v1.2
- Raspberry Pi 3 Mod. A+
- Raspberry Pi 3 Mod. B
- Raspberry Pi 3 Mod. B+
- Raspberry Pi 4 Mod. B
- Raspberry Pi 400
- Raspberry Pi CM1
- Raspberry Pi CM3
- Raspberry Pi CM3 Lite
- Raspberry Pi CM3+
- Raspberry Pi CM3+ Lite
- Raspberry Pi CM4
- Raspberry Pi CM4 Lite
- Other
validations:
required: true
- type: textarea
id: system
attributes:
label: System
description: |
Copy and paste the results of the raspinfo command in to this section.
Alternatively, copy and paste a pastebin link, or add answers to the following questions:
* Which OS and version (`cat /etc/rpi-issue`)?
* Which firmware version (`vcgencmd version`)?
* Which kernel version (`uname -a`)?
validations:
required: true
- type: textarea
id: logs
attributes:
label: Logs
description: |
If applicable, add the relevant output from `dmesg` or similar.
- type: textarea
id: additional
attributes:
label: Additional context
description: |
Add any other relevant context for the problem.

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@@ -1,9 +0,0 @@
blank_issues_enabled: false
contact_links:
- name: "⛔ Question"
url: https://www.raspberrypi.org/forums
about: "Please do not use GitHub for asking questions. If you simply have a question, then the Raspberry Pi forums are the best place to ask it. Thanks in advance for helping us keep the issue tracker clean!"
- name: "⛔ Problems with the Raspbian distribution packages"
url: https://github.com/RPi-Distro/repo
about: "If you have problems with the Raspbian distribution packages, please report them in the github.com/RPi-Distro/repo."

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@@ -0,0 +1,62 @@
What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the current preset value. Writing sets the
preset value. Encoder counts continuously from 0 to preset
value, depending on direction (up/down).
What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible quadrature modes.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device counter quadrature modes:
- non-quadrature:
Encoder IN1 input servers as the count input (up
direction).
- quadrature:
Encoder IN1 and IN2 inputs are mixed to get direction
and count.
What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible active edges.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device encoder/counter active edge:
- rising-edge
- falling-edge
- both-edges
In non-quadrature mode, device counts up on active edge.
In quadrature mode, encoder counting scenarios are as follows:
+---------+----------+--------------------+--------------------+
| Active | Level on | IN1 signal | IN2 signal |
| edge | opposite +----------+---------+----------+---------+
| | signal | Rising | Falling | Rising | Falling |
+---------+----------+----------+---------+----------+---------+
| Rising | High -> | Down | - | Up | - |
| edge | Low -> | Up | - | Down | - |
+---------+----------+----------+---------+----------+---------+
| Falling | High -> | - | Up | - | Down |
| edge | Low -> | - | Down | - | Up |
+---------+----------+----------+---------+----------+---------+
| Both | High -> | Down | Up | Up | Down |
| edges | Low -> | Up | Down | Down | Up |
+---------+----------+----------+---------+----------+---------+

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@@ -92,8 +92,7 @@ Triggers can be set on more than one psi metric and more than one trigger
for the same psi metric can be specified. However for each trigger a separate
file descriptor is required to be able to poll it separately from others,
therefore for each trigger a separate open() syscall should be made even
when opening the same psi interface file. Write operations to a file descriptor
with an already existing psi trigger will fail with EBUSY.
when opening the same psi interface file.
Monitors activate only when system enters stall state for the monitored
psi metric and deactivates upon exit from the stall state. While system is

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@@ -468,7 +468,7 @@ Spectre variant 2
before invoking any firmware code to prevent Spectre variant 2 exploits
using the firmware.
Using kernel address space randomization (CONFIG_RANDOMIZE_BASE=y
Using kernel address space randomization (CONFIG_RANDOMIZE_SLAB=y
and CONFIG_SLAB_FREELIST_RANDOM=y in the kernel configuration) makes
attacks on the kernel generally more difficult.

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@@ -1617,8 +1617,6 @@
architectures force reset to be always executed
i8042.unlock [HW] Unlock (ignore) the keylock
i8042.kbdreset [HW] Reset device connected to KBD port
i8042.probe_defer
[HW] Allow deferred probing upon i8042 probe errors
i810= [HW,DRM]
@@ -2296,12 +2294,8 @@
Default is 1 (enabled)
kvm-intel.emulate_invalid_guest_state=
[KVM,Intel] Disable emulation of invalid guest state.
Ignored if kvm-intel.enable_unrestricted_guest=1, as
guest state is never invalid for unrestricted guests.
This param doesn't apply to nested guests (L2), as KVM
never emulates invalid L2 guest state.
Default is 1 (enabled)
[KVM,Intel] Enable emulation of invalid guest states
Default is 0 (disabled)
kvm-intel.flexpriority=
[KVM,Intel] Disable FlexPriority feature (TPR shadow).

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@@ -1457,22 +1457,11 @@ unprivileged_bpf_disabled
=========================
Writing 1 to this entry will disable unprivileged calls to ``bpf()``;
once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` or ``CAP_BPF``
will return ``-EPERM``. Once set to 1, this can't be cleared from the
running kernel anymore.
once disabled, calling ``bpf()`` without ``CAP_SYS_ADMIN`` will return
``-EPERM``.
Writing 2 to this entry will also disable unprivileged calls to ``bpf()``,
however, an admin can still change this setting later on, if needed, by
writing 0 or 1 to this entry.
Once set, this can't be cleared.
If ``BPF_UNPRIV_DEFAULT_OFF`` is enabled in the kernel config, then this
entry will default to 2 instead of 0.
= =============================================================
0 Unprivileged calls to ``bpf()`` are enabled
1 Unprivileged calls to ``bpf()`` are disabled without recovery
2 Unprivileged calls to ``bpf()`` are disabled
= =============================================================
watchdog
========

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@@ -119,9 +119,6 @@ Boards (incomplete list of examples):
- OMAP3 BeagleBoard : Low cost community board
compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"
- OMAP3 BeagleBoard A to B4 : Early BeagleBoard revisions A to B4 with a timer quirk
compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3"
- OMAP3 Tobi with Overo : Commercial expansion board with daughter board
compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3"

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@@ -10,9 +10,6 @@ title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
maintainers:
- Neil Armstrong <narmstrong@baylibre.com>
allOf:
- $ref: /schemas/sound/name-prefix.yaml#
description: |
The Amlogic Meson Synopsys Designware Integration is composed of
- A Synopsys DesignWare HDMI Controller IP
@@ -102,8 +99,6 @@ properties:
"#sound-dai-cells":
const: 0
sound-name-prefix: true
required:
- compatible
- reg

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@@ -78,10 +78,6 @@ properties:
interrupts:
maxItems: 1
amlogic,canvas:
description: should point to a canvas provider node
$ref: /schemas/types.yaml#/definitions/phandle
power-domains:
maxItems: 1
description: phandle to the associated power domain
@@ -110,7 +106,6 @@ required:
- port@1
- "#address-cells"
- "#size-cells"
- amlogic,canvas
additionalProperties: false
@@ -123,7 +118,6 @@ examples:
interrupts = <3>;
#address-cells = <1>;
#size-cells = <0>;
amlogic,canvas = <&canvas>;
/* CVBS VDAC output port */
port@0 {

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@@ -31,7 +31,7 @@ tcan4x5x: tcan4x5x@0 {
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <10000000>;
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
interrupt-parent = <&gpio1>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;

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@@ -91,14 +91,6 @@ properties:
compensate for the board being designed with the lanes
swapped.
enet-phy-lane-no-swap:
$ref: /schemas/types.yaml#/definitions/flag
description:
If set, indicates that PHY will disable swap of the
TX/RX lanes. This property allows the PHY to work correcly after
e.g. wrong bootstrap configuration caused by issues in PCB
layout design.
eee-broken-100tx:
$ref: /schemas/types.yaml#definitions/flag
description:

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@@ -199,11 +199,12 @@ patternProperties:
contribution:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 100
description:
The cooling contribution to the thermal zone of the referred
cooling device at the referred trip point. The contribution is
a ratio of the sum of all cooling contributions within a
thermal zone.
The percentage contribution of the cooling devices at the
specific trip temperature referenced in this map
to this thermal zone
required:
- trip

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@@ -39,8 +39,8 @@ properties:
samsung,syscon-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the PMU system controller node (in case of Exynos5250,
Exynos5420 and Exynos7).
Phandle to the PMU system controller node (in case of Exynos5250
and Exynos5420).
required:
- compatible
@@ -58,7 +58,6 @@ allOf:
enum:
- samsung,exynos5250-wdt
- samsung,exynos5420-wdt
- samsung,exynos7-wdt
then:
required:
- samsung,syscon-phandle

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@@ -143,14 +143,13 @@ Part 5 - Handling channel allocation
Allocating Channels
-------------------
Channels do not need to be configured prior to starting a test run. Attempting
to run the test without configuring the channels will result in testing any
channels that are available.
Channels are required to be configured prior to starting the test run.
Attempting to run the test without configuring the channels will fail.
Example::
% echo 1 > /sys/module/dmatest/parameters/run
dmatest: No channels configured, continue with any
dmatest: Could not start test, no channels configured
Channels are registered using the "channel" parameter. Channels can be requested by their
name, once requested, the channel is registered and a pending thread is added to the test list.

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@@ -19,7 +19,7 @@ of kernel interfaces is available via exported symbols in `firewire-core` module
Firewire char device data structures
====================================
.. include:: ../ABI/stable/firewire-cdev
.. include:: /ABI/stable/firewire-cdev
:literal:
.. kernel-doc:: include/uapi/linux/firewire-cdev.h
@@ -28,7 +28,7 @@ Firewire char device data structures
Firewire device probing and sysfs interfaces
============================================
.. include:: ../ABI/stable/sysfs-bus-firewire
.. include:: /ABI/stable/sysfs-bus-firewire
:literal:
.. kernel-doc:: drivers/firewire/core-device.c

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@@ -5,7 +5,7 @@
Referencing hierarchical data nodes
===================================
:Copyright: |copy| 2018, 2021 Intel Corporation
:Copyright: |copy| 2018 Intel Corporation
:Author: Sakari Ailus <sakari.ailus@linux.intel.com>
ACPI in general allows referring to device objects in the tree only.
@@ -52,14 +52,12 @@ the ANOD object which is also the final target node of the reference.
Name (NOD0, Package() {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "reg", 0 },
Package () { "random-property", 3 },
}
})
Name (NOD1, Package() {
ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "reg", 1 },
Package () { "anothernode", "ANOD" },
}
})
@@ -76,11 +74,7 @@ the ANOD object which is also the final target node of the reference.
Name (_DSD, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {
"reference", Package () {
^DEV0, "node@1", "anothernode"
}
},
Package () { "reference", ^DEV0, "node@1", "anothernode" },
}
})
}

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@@ -273,6 +273,24 @@ Contact: Daniel Vetter, Noralf Tronnes
Level: Advanced
Garbage collect fbdev scrolling acceleration
--------------------------------------------
Scroll acceleration is disabled in fbcon by hard-wiring p->scrollmode =
SCROLL_REDRAW. There's a ton of code this will allow us to remove:
- lots of code in fbcon.c
- a bunch of the hooks in fbcon_ops, maybe the remaining hooks could be called
directly instead of the function table (with a switch on p->rotate)
- fb_copyarea is unused after this, and can be deleted from all drivers
Note that not all acceleration code can be deleted, since clearing and cursor
support is still accelerated, which might be good candidates for further
deletion projects.
Contact: Daniel Vetter
Level: Intermediate
idr_init_base()
---------------

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@@ -265,16 +265,6 @@ Supported chips:
https://www.ti.com/litv/pdf/sbos686
* Texas Instruments TMP461
Prefix: 'tmp461'
Addresses scanned: I2C 0x48 through 0x4F
Datasheet: Publicly available at TI website
https://www.ti.com/lit/gpn/tmp461
Author: Jean Delvare <jdelvare@suse.de>

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@@ -11,13 +11,16 @@ compiler [1]_. They are useful for runtime instrumentation and static analysis.
We can analyse, change and add further code during compilation via
callbacks [2]_, GIMPLE [3]_, IPA [4]_ and RTL passes [5]_.
The GCC plugin infrastructure of the kernel supports building out-of-tree
modules, cross-compilation and building in a separate directory.
Plugin source files have to be compilable by a C++ compiler.
The GCC plugin infrastructure of the kernel supports all gcc versions from
4.5 to 6.0, building out-of-tree modules, cross-compilation and building in a
separate directory.
Plugin source files have to be compilable by both a C and a C++ compiler as well
because gcc versions 4.5 and 4.6 are compiled by a C compiler,
gcc-4.7 can be compiled by a C or a C++ compiler,
and versions 4.8+ can only be compiled by a C++ compiler.
Currently the GCC plugin infrastructure supports only some architectures.
Grep "select HAVE_GCC_PLUGINS" to find out which architectures support
GCC plugins.
Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and
powerpc architectures.
This infrastructure was ported from grsecurity [6]_ and PaX [7]_.
@@ -44,13 +47,20 @@ Files
This is a compatibility header for GCC plugins.
It should be always included instead of individual gcc headers.
**$(src)/scripts/gcc-plugin.sh**
This script checks the availability of the included headers in
gcc-common.h and chooses the proper host compiler to build the plugins
(gcc-4.7 can be built by either gcc or g++).
**$(src)/scripts/gcc-plugins/gcc-generate-gimple-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-rtl-pass.h**
These headers automatically generate the registration structures for
GIMPLE, SIMPLE_IPA, IPA and RTL passes.
GIMPLE, SIMPLE_IPA, IPA and RTL passes. They support all gcc versions
from 4.5 to 6.0.
They should be preferred to creating the structures by hand.
@@ -58,25 +68,21 @@ Usage
=====
You must install the gcc plugin headers for your gcc version,
e.g., on Ubuntu for gcc-10::
e.g., on Ubuntu for gcc-4.9::
apt-get install gcc-10-plugin-dev
apt-get install gcc-4.9-plugin-dev
Or on Fedora::
dnf install gcc-plugin-devel
Enable the GCC plugin infrastructure and some plugin(s) you want to use
in the kernel config::
Enable a GCC plugin based feature in the kernel config::
CONFIG_GCC_PLUGINS=y
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY=y
CONFIG_GCC_PLUGIN_LATENT_ENTROPY=y
...
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY = y
To compile the minimum tool set including the plugin(s)::
To compile only the plugin(s)::
make scripts
make gcc-plugins
or just run the kernel make and compile the whole kernel with
the cyclomatic complexity GCC plugin.
@@ -85,8 +91,7 @@ the cyclomatic complexity GCC plugin.
4. How to add a new GCC plugin
==============================
The GCC plugins are in scripts/gcc-plugins/. You need to put plugin source files
right under scripts/gcc-plugins/. Creating subdirectories is not supported.
It must be added to scripts/gcc-plugins/Makefile, scripts/Makefile.gcc-plugins
and a relevant Kconfig file.
The GCC plugins are in $(src)/scripts/gcc-plugins/. You can use a file or a directory
here. It must be added to $(src)/scripts/gcc-plugins/Makefile,
$(src)/scripts/Makefile.gcc-plugins and $(src)/arch/Kconfig.
See the cyc_complexity_plugin.c (CONFIG_GCC_PLUGIN_CYC_COMPLEXITY) GCC plugin.

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@@ -439,9 +439,11 @@ preemption. The following substitution works on both kernels::
spin_lock(&p->lock);
p->count += this_cpu_read(var2);
On a non-PREEMPT_RT kernel migrate_disable() maps to preempt_disable()
which makes the above code fully equivalent. On a PREEMPT_RT kernel
migrate_disable() ensures that the task is pinned on the current CPU which
in turn guarantees that the per-CPU access to var1 and var2 are staying on
the same CPU while the task remains preemptible.
the same CPU.
The migrate_disable() substitution is not valid for the following
scenario::
@@ -454,8 +456,9 @@ scenario::
p = this_cpu_ptr(&var1);
p->val = func2();
This breaks because migrate_disable() does not protect against reentrancy from
a preempting task. A correct substitution for this case is::
While correct on a non-PREEMPT_RT kernel, this breaks on PREEMPT_RT because
here migrate_disable() does not protect against reentrancy from a
preempting task. A correct substitution for this case is::
func()
{

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@@ -196,12 +196,11 @@ ad_actor_sys_prio
ad_actor_system
In an AD system, this specifies the mac-address for the actor in
protocol packet exchanges (LACPDUs). The value cannot be a multicast
address. If the all-zeroes MAC is specified, bonding will internally
use the MAC of the bond itself. It is preferred to have the
local-admin bit set for this mac but driver does not enforce it. If
the value is not given then system defaults to using the masters'
mac address as actors' system address.
protocol packet exchanges (LACPDUs). The value cannot be NULL or
multicast. It is preferred to have the local-admin bit set for this
mac but driver does not enforce it. If the value is not given then
system defaults to using the masters' mac address as actors' system
address.
This parameter has effect only in 802.3ad mode and is available through
SysFs interface.

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@@ -440,22 +440,6 @@ NOTE: For 82599-based network connections, if you are enabling jumbo frames in
a virtual function (VF), jumbo frames must first be enabled in the physical
function (PF). The VF MTU setting cannot be larger than the PF MTU.
NBASE-T Support
---------------
The ixgbe driver supports NBASE-T on some devices. However, the advertisement
of NBASE-T speeds is suppressed by default, to accommodate broken network
switches which cannot cope with advertised NBASE-T speeds. Use the ethtool
command to enable advertising NBASE-T speeds on devices which support it::
ethtool -s eth? advertise 0x1800000001028
On Linux systems with INTERFACES(5), this can be specified as a pre-up command
in /etc/network/interfaces so that the interface is always brought up with
NBASE-T support, e.g.::
iface eth? inet dhcp
pre-up ethtool -s eth? advertise 0x1800000001028 || true
Generic Receive Offload, aka GRO
--------------------------------
The driver supports the in-kernel software implementation of GRO. GRO has

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@@ -326,8 +326,6 @@ usi-headset
Headset support on USI machines
dual-codecs
Lenovo laptops with dual codecs
alc285-hp-amp-init
HP laptops which require speaker amplifier initialization (ALC285)
ALC680
======

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@@ -58,23 +58,3 @@ Image Source Control IDs
The unit cell consists of the whole area of the pixel, sensitive and
non-sensitive.
This control is required for automatic calibration of sensors/cameras.
``V4L2_CID_NOTIFY_GAINS (integer array)``
The sensor is notified what gains will be applied to the different
colour channels by subsequent processing (such as by an ISP). The
sensor is merely informed of these values in case it performs
processing that requires them, but it does not apply them itself to
the output pixels.
Currently it is defined only for Bayer sensors, and is an array
control taking 4 gain values, being the gains for each of the
Bayer channels. The gains are always in the order B, Gb, Gr and R,
irrespective of the exact Bayer order of the sensor itself.
The use of an array allows this control to be extended to sensors
with, for example, non-Bayer CFAs (colour filter arrays).
The units for the gain values are linear, with the default value
representing a gain of exactly 1.0. For example, if this default value
is reported as being (say) 128, then a value of 192 would represent
a gain of exactly 1.5.

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@@ -7341,6 +7341,7 @@ L: linux-hardening@vger.kernel.org
S: Maintained
F: Documentation/kbuild/gcc-plugins.rst
F: scripts/Makefile.gcc-plugins
F: scripts/gcc-plugin.sh
F: scripts/gcc-plugins/
GCOV BASED KERNEL PROFILING

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@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 103
SUBLEVEL = 83
EXTRAVERSION =
NAME = Dare mighty things
@@ -1073,7 +1073,7 @@ export mod_sign_cmd
HOST_LIBELF_LIBS = $(shell pkg-config libelf --libs 2>/dev/null || echo -lelf)
has_libelf = $(call try-run,\
echo "int main() {}" | $(HOSTCC) $(KBUILD_HOSTLDFLAGS) -xc -o /dev/null $(HOST_LIBELF_LIBS) -,1,0)
echo "int main() {}" | $(HOSTCC) -xc -o /dev/null $(HOST_LIBELF_LIBS) -,1,0)
ifdef CONFIG_STACK_VALIDATION
ifeq ($(has_libelf),1)

View File

@@ -400,12 +400,12 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX25.
config DEBUG_IMX27_UART
bool "i.MX27 Debug UART"
depends on SOC_IMX27
config DEBUG_IMX21_IMX27_UART
bool "i.MX21 and i.MX27 Debug UART"
depends on SOC_IMX21 || SOC_IMX27
help
Say Y here if you want kernel low-level debugging support
on i.MX27.
on i.MX21 or i.MX27.
config DEBUG_IMX28_UART
bool "i.MX28 Debug UART"
@@ -1523,7 +1523,7 @@ config DEBUG_IMX_UART_PORT
int "i.MX Debug UART Port Selection"
depends on DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
DEBUG_IMX27_UART || \
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX50_UART || \
@@ -1591,12 +1591,12 @@ config DEBUG_LL_INCLUDE
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/imx.S" if DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
DEBUG_IMX27_UART || \
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX50_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX53_UART || \
DEBUG_IMX53_UART ||\
DEBUG_IMX6Q_UART || \
DEBUG_IMX6SL_UART || \
DEBUG_IMX6SX_UART || \

View File

@@ -9,22 +9,16 @@
#include <linux/sizes.h>
.macro __nop
#ifdef CONFIG_EFI_STUB
@ This is almost but not quite a NOP, since it does clobber the
@ condition flags. But it is the best we can do for EFI, since
@ PE/COFF expects the magic string "MZ" at offset 0, while the
@ ARM/Linux boot protocol expects an executable instruction
@ there.
.inst MZ_MAGIC | (0x1310 << 16) @ tstne r0, #0x4d000
#else
AR_CLASS( mov r0, r0 )
M_CLASS( nop.w )
.endm
.macro __initial_nops
#ifdef CONFIG_EFI_STUB
@ This is a two-instruction NOP, which happens to bear the
@ PE/COFF signature "MZ" in the first two bytes, so the kernel
@ is accepted as an EFI binary. Booting via the UEFI stub
@ will not execute those instructions, but the ARM/Linux
@ boot protocol does, so we need some NOPs here.
.inst MZ_MAGIC | (0xe225 << 16) @ eor r5, r5, 0x4d000
eor r5, r5, 0x4d000 @ undo previous insn
#else
__nop
__nop
#endif
.endm

View File

@@ -190,8 +190,7 @@ start:
* were patching the initial instructions of the kernel, i.e
* had started to exploit this "patch area".
*/
__initial_nops
.rept 5
.rept 7
__nop
.endr
#ifndef CONFIG_THUMB2_KERNEL

View File

@@ -16,8 +16,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-400.dtb \
bcm2710-rpi-cm3.dtb \
bcm2711-rpi-cm4.dtb \
bcm2711-rpi-cm4s.dtb
bcm2711-rpi-cm4.dtb
dtb-$(CONFIG_ARCH_ALPINE) += \
alpine-db.dtb
@@ -750,7 +749,6 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
logicpd-som-lv-37xx-devkit.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
omap3-beagle-ab4.dtb \
omap3-beagle-xm.dtb \
omap3-beagle-xm-ab.dtb \
omap3-cm-t3517.dtb \

View File

@@ -168,7 +168,7 @@
};
uart0: serial@12000 {
compatible = "marvell,armada-38x-uart", "ns16550a";
compatible = "marvell,armada-38x-uart";
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@@ -178,7 +178,7 @@
};
uart1: serial@12100 {
compatible = "marvell,armada-38x-uart", "ns16550a";
compatible = "marvell,armada-38x-uart";
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -4,6 +4,7 @@
#include "bcm2708-rpi.dtsi"
#include "bcm283x-rpi-smsc9512.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b", "brcm,bcm2835";
@@ -122,9 +123,6 @@ i2c_csi_dsi: &i2c1 {
gpio = <&gpio 27 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9512.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-b", "brcm,bcm2835";
@@ -109,9 +110,6 @@
gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -8,15 +8,21 @@
/ {
compatible = "raspberrypi,compute-module", "brcm,bcm2835";
model = "Raspberry Pi Compute Module";
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-regulator";
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
cam0_reg: cam0_reg {
compatible = "regulator-fixed";
regulator-name = "cam0-regulator";
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
};
&uart0 {

View File

@@ -14,9 +14,5 @@
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
cam0_reg = <&cam0_reg>,"status";
cam0_reg_gpio = <&cam0_reg>,"gpios:4";
cam1_reg = <&cam1_reg>,"status";
cam1_reg_gpio = <&cam1_reg>,"gpios:4";
};
};

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm2708-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
@@ -166,9 +167,6 @@
gpio = <&gpio 44 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -4,6 +4,7 @@
#include "bcm2708-rpi.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero", "brcm,bcm2835";
@@ -113,9 +114,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -153,39 +153,6 @@
};
};
cam1_reg: cam1_regulator {
compatible = "regulator-fixed";
regulator-name = "cam1-reg";
enable-active-high;
/* Needs to be enabled, as removing a regulator is very unsafe */
status = "okay";
};
cam1_clk: cam1_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
status = "disabled";
};
cam0_regulator: cam0_regulator {
compatible = "regulator-fixed";
regulator-name = "cam0-reg";
enable-active-high;
status = "disabled";
};
cam0_clk: cam0_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
status = "disabled";
};
cam_dummy_reg: cam_dummy_reg {
compatible = "regulator-fixed";
regulator-name = "cam-dummy-reg";
status = "okay";
};
__overrides__ {
cam0-pwdn-ctrl;
cam0-pwdn;

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
@@ -115,9 +116,6 @@
gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -6,6 +6,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm271x-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
@@ -187,9 +188,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -6,6 +6,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm271x-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
@@ -196,9 +197,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -8,15 +8,21 @@
/ {
compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
model = "Raspberry Pi Compute Module 3";
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-regulator";
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
cam0_reg: cam0_reg {
compatible = "regulator-fixed";
regulator-name = "cam0-regulator";
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
enable-active-high;
status = "disabled";
};
};
&uart0 {
@@ -138,9 +144,5 @@ cam0_reg: &cam0_regulator {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
cam0_reg = <&cam0_reg>,"status";
cam0_reg_gpio = <&cam0_reg>,"gpios:4";
cam1_reg = <&cam1_reg>,"status";
cam1_reg_gpio = <&cam1_reg>,"gpios:4";
};
};

View File

@@ -5,6 +5,7 @@
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm2708-rpi-bt.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837";
@@ -187,9 +188,6 @@
gpio = <&gpio 40 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -339,6 +339,7 @@
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-csi1-2lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
chosen {
@@ -607,9 +608,6 @@
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
cam0_reg: &cam_dummy_reg {
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";

View File

@@ -353,6 +353,7 @@
#include "bcm283x-rpi-csi0-2lane.dtsi"
#include "bcm283x-rpi-csi1-4lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
#include "bcm283x-rpi-cam1-regulator.dtsi"
/ {
chosen {

View File

@@ -1,459 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2711.dtsi"
#include "bcm2835-rpi.dtsi"
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
/ {
compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711";
model = "Raspberry Pi Compute Module 4S";
chosen {
/* 8250 auxiliary UART instead of pl011 */
stdout-path = "serial1:115200n8";
};
/* Will be filled by the bootloader */
memory@0 {
device_type = "memory";
reg = <0 0 0>;
};
aliases {
emmc2bus = &emmc2bus;
blconfig = &blconfig;
};
leds {
led-act {
gpios = <&virtgpio 0 0>;
};
};
};
&ddc0 {
status = "okay";
};
&firmware {
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;
};
};
&gpio {
/*
* Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
* the official GPU firmware DT blob.
*
* Legend:
* "FOO" = GPIO line named "FOO" on the schematic
* "FOO_N" = GPIO line named "FOO" on schematic, active low
*/
gpio-line-names = "ID_SDA",
"ID_SCL",
"SDA1",
"SCL1",
"GPIO_GCLK",
"GPIO5",
"GPIO6",
"SPI_CE1_N",
"SPI_CE0_N",
"SPI_MISO",
"SPI_MOSI",
"SPI_SCLK",
"GPIO12",
"GPIO13",
/* Serial port */
"TXD1",
"RXD1",
"GPIO16",
"GPIO17",
"GPIO18",
"GPIO19",
"GPIO20",
"GPIO21",
"GPIO22",
"GPIO23",
"GPIO24",
"GPIO25",
"GPIO26",
"GPIO27",
"GPIO28",
"GPIO29",
"GPIO30",
"GPIO31",
"GPIO32",
"GPIO33",
"GPIO34",
"GPIO35",
"GPIO36",
"GPIO37",
"GPIO38",
"GPIO39",
"PWM0_MISO",
"PWM1_MOSI",
"GPIO42",
"GPIO43",
"GPIO44",
"GPIO45";
};
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
wifi-2.4ghz-coexistence;
status = "okay";
};
&hvs {
clocks = <&firmware_clocks 4>;
};
&pixelvalve0 {
status = "okay";
};
&pixelvalve1 {
status = "okay";
};
&pixelvalve2 {
status = "okay";
};
&pixelvalve4 {
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
status = "okay";
};
&rmem {
/*
* RPi4's co-processor will copy the board's bootloader configuration
* into memory for the OS to consume. It'll also update this node with
* its placement information.
*/
blconfig: nvram@0 {
compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x0>;
no-map;
status = "disabled";
};
};
/* EMMC2 is used to drive the EMMC card */
&emmc2 {
bus-width = <8>;
broken-cd;
status = "okay";
};
&pcie0 {
status = "disabled";
};
&vchiq {
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
&vc4 {
status = "okay";
};
&vec {
status = "disabled";
};
// =============================================
// Downstream rpi- changes
#define BCM2711
#include "bcm270x.dtsi"
/ {
soc {
/delete-node/ pixelvalve@7e807000;
/delete-node/ hdmi@7e902000;
virtgpio: virtgpio {
compatible = "brcm,bcm2835-virtgpio";
gpio-controller;
#gpio-cells = <2>;
firmware = <&firmware>;
status = "okay";
};
};
};
#include "bcm2711-rpi.dtsi"
#include "bcm283x-rpi-csi0-2lane.dtsi"
#include "bcm283x-rpi-csi1-4lane.dtsi"
#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
/delete-node/ &hdmi1;
/ {
chosen {
bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
};
aliases {
serial0 = &uart0;
mmc0 = &emmc2;
mmc1 = &mmcnr;
mmc2 = &sdhost;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
spi3 = &spi3;
spi4 = &spi4;
spi5 = &spi5;
spi6 = &spi6;
/delete-property/ intc;
};
/delete-node/ wifi-pwrseq;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
spidev0: spidev@0{
compatible = "spidev";
reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <125000000>;
};
spidev1: spidev@1{
compatible = "spidev";
reg = <1>; /* CE1 */
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <125000000>;
};
};
&gpio {
spi0_pins: spi0_pins {
brcm,pins = <9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
spi0_cs_pins: spi0_cs_pins {
brcm,pins = <8 7>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi3_pins: spi3_pins {
brcm,pins = <1 2 3>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi3_cs_pins: spi3_cs_pins {
brcm,pins = <0 24>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi4_pins: spi4_pins {
brcm,pins = <5 6 7>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi4_cs_pins: spi4_cs_pins {
brcm,pins = <4 25>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi5_pins: spi5_pins {
brcm,pins = <13 14 15>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi5_cs_pins: spi5_cs_pins {
brcm,pins = <12 26>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
spi6_pins: spi6_pins {
brcm,pins = <19 20 21>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
spi6_cs_pins: spi6_cs_pins {
brcm,pins = <18 27>;
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
};
i2c0_pins: i2c0 {
brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT0>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c1_pins: i2c1 {
brcm,pins = <2 3>;
brcm,function = <BCM2835_FSEL_ALT0>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c3_pins: i2c3 {
brcm,pins = <4 5>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c4_pins: i2c4 {
brcm,pins = <8 9>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c5_pins: i2c5 {
brcm,pins = <12 13>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2c6_pins: i2c6 {
brcm,pins = <22 23>;
brcm,function = <BCM2835_FSEL_ALT5>;
brcm,pull = <BCM2835_PUD_UP>;
};
i2s_pins: i2s {
brcm,pins = <18 19 20 21>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
sdio_pins: sdio_pins {
brcm,pins = <34 35 36 37 38 39>;
brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
brcm,pull = <0 2 2 2 2 2>;
};
uart0_pins: uart0_pins {
brcm,pins;
brcm,function;
brcm,pull;
};
uart2_pins: uart2_pins {
brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart3_pins: uart3_pins {
brcm,pins = <4 5>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart4_pins: uart4_pins {
brcm,pins = <8 9>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
uart5_pins: uart5_pins {
brcm,pins = <12 13>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,pull = <0 2>;
};
};
&i2c0if {
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
};
&i2s {
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
};
// =============================================
// Board specific stuff here
&sdhost {
status = "disabled";
};
&gpio {
audio_pins: audio_pins {
brcm,pins = <>;
brcm,function = <>;
};
};
&leds {
act_led: led-act {
label = "led0";
linux,default-trigger = "mmc0";
gpios = <&virtgpio 0 0>;
};
};
&pwm1 {
status = "disabled";
};
&audio {
pinctrl-names = "default";
pinctrl-0 = <&audio_pins>;
brcm,disable-headphones = <1>;
};
&cam1_reg {
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
cam0_reg: &cam0_regulator {
gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
/ {
__overrides__ {
act_led_gpio = <&act_led>,"gpios:4";
act_led_activelow = <&act_led>,"gpios:8";
act_led_trigger = <&act_led>,"linux,default-trigger";
sd_poll_once = <&emmc2>, "non-removable?";
spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
<&spi0>, "dmas:8=", <&dma40>;
};
};

View File

@@ -0,0 +1,10 @@
// SPDX-License-Identifier: GPL-2.0
/ {
cam1_reg: cam1_reg {
compatible = "regulator-fixed";
regulator-name = "cam1-reg";
enable-active-high;
status = "disabled";
};
};

View File

@@ -765,7 +765,7 @@
compatible = "brcm,bcm4330-bt";
shutdown-gpios = <&gpl0 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
};

View File

@@ -84,7 +84,7 @@
partitions {
compatible = "redboot-fis";
/* Eraseblock at 0xfe0000 */
fis-index-block = <0x7f>;
fis-index-block = <0x1fc>;
};
};

View File

@@ -79,6 +79,7 @@
MX23_PAD_LCD_RESET__GPIO_1_18
MX23_PAD_PWM3__GPIO_1_29
MX23_PAD_PWM4__GPIO_1_30
MX23_PAD_SSP1_DETECT__SSP1_DETECT
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;

View File

@@ -5,8 +5,6 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
backlight = &backlight;
@@ -228,7 +226,6 @@
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
>;
};
@@ -307,7 +304,7 @@
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
non-removable;
status = "okay";
};

View File

@@ -289,7 +289,6 @@
ethphy: ethernet-phy@1 {
reg = <1>;
qca,clk-out-frequency = <125000000>;
};
};
};

View File

@@ -82,6 +82,6 @@
#define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0
#endif /* __DTS_IMX6ULL_PINFUNC_H */

View File

@@ -259,7 +259,7 @@
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
timeout-sec = <40>;
};

View File

@@ -42,14 +42,14 @@
};
uart_A: serial@84c0 {
compatible = "amlogic,meson6-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x84c0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
uart_B: serial@84dc {
compatible = "amlogic,meson6-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x84dc 0x18>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@@ -87,7 +87,7 @@
};
uart_C: serial@8700 {
compatible = "amlogic,meson6-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x8700 0x18>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@@ -203,7 +203,7 @@
};
uart_AO: serial@4c0 {
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
reg = <0x4c0 0x18>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
status = "disabled";

View File

@@ -598,27 +598,27 @@
};
&uart_AO {
compatible = "amlogic,meson8-uart", "amlogic,meson-ao-uart";
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
};
&uart_A {
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
};
&uart_B {
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
};
&uart_C {
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
};
&usb0 {

View File

@@ -586,27 +586,27 @@
};
&uart_AO {
compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
};
&uart_A {
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
};
&uart_B {
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
};
&uart_C {
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
};
&usb0 {

View File

@@ -1,47 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "omap3-beagle.dts"
/ {
model = "TI OMAP3 BeagleBoard A to B4";
compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
};
/*
* Workaround for capacitor C70 issue, see "Boards revision A and < B5"
* section at https://elinux.org/BeagleBoard_Community
*/
/* Unusable as clocksource because of unreliable oscillator */
&counter32k {
status = "disabled";
};
/* Unusable as clockevent because of unreliable oscillator, allow to idle */
&timer1_target {
/delete-property/ti,no-reset-on-init;
/delete-property/ti,no-idle;
timer@0 {
/delete-property/ti,timer-alwon;
};
};
/* Preferred always-on timer for clocksource */
&timer12_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
/* Always clocked by secure_32k_fck */
};
};
/* Preferred timer for clockevent */
&timer2_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
assigned-clocks = <&gpt2_fck>;
assigned-clock-parents = <&sys_ck>;
};
};

View File

@@ -304,6 +304,39 @@
phys = <0 &hsusb2_phy>;
};
/* Unusable as clocksource because of unreliable oscillator */
&counter32k {
status = "disabled";
};
/* Unusable as clockevent because if unreliable oscillator, allow to idle */
&timer1_target {
/delete-property/ti,no-reset-on-init;
/delete-property/ti,no-idle;
timer@0 {
/delete-property/ti,timer-alwon;
};
};
/* Preferred always-on timer for clocksource */
&timer12_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
/* Always clocked by secure_32k_fck */
};
};
/* Preferred timer for clockevent */
&timer2_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
assigned-clocks = <&gpt2_fck>;
assigned-clock-parents = <&sys_ck>;
};
};
&twl_gpio {
ti,use-leds;
/* pullups: BIT(1) */

View File

@@ -8,7 +8,6 @@
#include "omap34xx.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/*
* Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
@@ -631,92 +630,63 @@
};
lp5523: lp5523@32 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "national,lp5523";
reg = <0x32>;
clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
led@0 {
reg = <0>;
chan0 {
chan-name = "lp5523:kb1";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
led@1 {
reg = <1>;
chan1 {
chan-name = "lp5523:kb2";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
led@2 {
reg = <2>;
chan2 {
chan-name = "lp5523:kb3";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
led@3 {
reg = <3>;
chan3 {
chan-name = "lp5523:kb4";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
led@4 {
reg = <4>;
chan4 {
chan-name = "lp5523:b";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
led@5 {
reg = <5>;
chan5 {
chan-name = "lp5523:g";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
led@6 {
reg = <6>;
chan6 {
chan-name = "lp5523:r";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led@7 {
reg = <7>;
chan7 {
chan-name = "lp5523:kb5";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
led@8 {
reg = <8>;
chan8 {
chan-name = "lp5523:kb6";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
};

View File

@@ -34,7 +34,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
cap1106.dtbo \
chipdip-dac.dtbo \
cma.dtbo \
cutiepi-panel.dtbo \
dht11.dtbo \
dionaudio-loco.dtbo \
dionaudio-loco-v2.dtbo \
@@ -242,7 +241,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
vc4-kms-v3d-pi4.dtbo \
vc4-kms-vga666.dtbo \
vga666.dtbo \
vl805.dtbo \
w1-gpio.dtbo \
w1-gpio-pullup.dtbo \
w5500.dtbo \

View File

@@ -144,16 +144,6 @@ Params:
See /sys/kernel/debug/raspberrypi_axi_monitor
for the results.
cam0_reg Enables CAM 0 regulator. CM1 & 3 only.
cam0_reg_gpio Set GPIO for CAM 0 regulator. Default 30.
CM1 & 3 only.
cam1_reg Enables CAM 1 regulator. CM1 & 3 only.
cam1_reg_gpio Set GPIO for CAM 1 regulator. Default 2.
CM1 & 3 only.
eee Enable Energy Efficient Ethernet support for
compatible devices (default "on"). See also
"tx_lpi_timer". Pi3B+ only.
@@ -679,12 +669,6 @@ Params: cma-512 CMA is 512MB (needs 1GB)
cma-default Use upstream's default value
Name: cutiepi-panel
Info: 8" TFT LCD display and touch panel used by cutiepi.io
Load: dtoverlay=cutiepi-panel
Params: <None>
Name: dht11
Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
Also sometimes found with the part number(s) AM230x.
@@ -1861,8 +1845,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx290
@@ -1885,8 +1867,6 @@ Params: 4lane Enable 4 CSI2 lanes. This requires a Compute
180, default 0)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx378
@@ -1900,8 +1880,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx477
@@ -1915,8 +1893,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: imx519
@@ -1930,8 +1906,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: iqaudio-codec
@@ -1998,8 +1972,6 @@ Info: Infineon irs1125 TOF camera module.
Load: dtoverlay=irs1125,<param>=<val>
Params: media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: jedec-spi-nor
@@ -2413,8 +2385,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: ov7251
@@ -2428,8 +2398,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: ov9281
@@ -2443,8 +2411,6 @@ Params: rotation Mounting rotation of the camera sensor (0 or
2 = external, default external)
media-controller Configure use of Media Controller API for
configuring the sensor (default on)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: papirus
@@ -3427,8 +3393,6 @@ Params: 4lane Use 4 lanes (only applicable to Compute Modules
are supported by the driver.
media-controller Configure use of Media Controller API for
configuring the sensor (default off)
cam0 Adopt the default configuration for CAM0 on a
Compute Module (CSI0, i2c_vc, and cam0_reg).
Name: tc358743-audio
@@ -3625,8 +3589,6 @@ Params: clock-frequency Display clock frequency (Hz)
rgb888 Change to RGB888 output on GPIOs 0-27
bus-format Override the bus format for a MEDIA_BUS_FMT_*
value. NB also overridden by rgbXXX overrides.
backlight-gpio Defines a GPIO to be used for backlight control
(default of none).
Name: vc4-kms-dsi-7inch
@@ -3731,14 +3693,6 @@ Load: dtoverlay=vga666
Params: <None>
Name: vl805
Info: Overlay to enable a VIA VL805 USB3 controller on CM4 carriers
Will be loaded automatically by up-to-date firmware if "VL805=1" is
set in the EEPROM config.
Load: dtoverlay=vl805
Params: <None>
Name: w1-gpio
Info: Configures the w1-gpio Onewire interface module.
Use this overlay if you *don't* need a GPIO to drive an external pullup.

View File

@@ -1,117 +0,0 @@
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2711";
fragment@0 {
target=<&dsi1>;
__overlay__ {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port {
dsi1_out_port: endpoint {
remote-endpoint = <&panel_dsi_in1>;
};
};
display1: panel@0 {
compatible = "nwe,nwe080";
reg=<0>;
backlight = <&rpi_backlight>;
reset-gpios = <&gpio 20 0>;
port {
panel_dsi_in1: endpoint {
remote-endpoint = <&dsi1_out_port>;
};
};
};
};
};
fragment@1 {
target = <&gpio>;
__overlay__ {
pwm_pins: pwm_pins {
brcm,pins = <12>;
brcm,function = <4>; // ALT0
};
};
};
fragment@2 {
target = <&pwm>;
frag1: __overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
assigned-clock-rates = <1000000>;
status = "okay";
};
};
fragment@3 {
target-path = "/";
__overlay__ {
rpi_backlight: rpi_backlight {
compatible = "pwm-backlight";
brightness-levels = <0 6 8 12 16 24 32 40 48 64 96 128 160 192 224 255>;
default-brightness-level = <6>;
pwms = <&pwm 0 200000>;
power-supply = <&vdd_3v3_reg>;
status = "okay";
};
};
};
fragment@4 {
target = <&i2c6>;
frag0: __overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_pins>;
clock-frequency = <100000>;
};
};
fragment@5 {
target = <&i2c6_pins>;
__overlay__ {
brcm,pins = <22 23>;
};
};
fragment@6 {
target = <&gpio>;
__overlay__ {
goodix_pins: goodix_pins {
brcm,pins = <21 26>; // interrupt and reset
brcm,function = <0 0>; // in
brcm,pull = <2 2>; // pull-up
};
};
};
fragment@7 {
target = <&i2c6>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
gt9xx: gt9xx@5d {
compatible = "goodix,gt9271";
reg = <0x5D>;
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
interrupt-parent = <&gpio>;
interrupts = <21 2>; // high-to-low edge triggered
irq-gpios = <&gpio 21 0>;
reset-gpios = <&gpio 26 0>;
};
};
};
};

View File

@@ -9,28 +9,6 @@
compatible = "brcm,bcm2835";
fragment@0 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@1 {
target = <&cam1_clk>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
};
};
fragment@2 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
i2c_frag: fragment@100 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -42,19 +20,19 @@
reg = <0x10>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx219_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.8v */
VDDL-supply = <&cam_dummy_reg>; /* 1.2v */
VDIG-supply = <&imx219_vdig>; /* 1.8v */
VDDL-supply = <&imx219_vddl>; /* 1.2v */
rotation = <180>;
orientation = <2>;
port {
imx219_0: endpoint {
remote-endpoint = <&csi_ep>;
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
data-lanes = <1 2>;
clock-noncontinuous;
@@ -66,14 +44,13 @@
};
};
csi_frag: fragment@101 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi_ep: endpoint {
csi1_ep: endpoint {
remote-endpoint = <&imx219_0>;
clock-lanes = <0>;
data-lanes = <1 2>;
@@ -83,14 +60,64 @@
};
};
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target-path="/";
__overlay__ {
imx219_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx219_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx219_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx219_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx219_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx219_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx219>,"rotation:0";
orientation = <&imx219>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx219>, "clocks:0=",<&cam0_clk>,
<&imx219>, "VANA-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -9,7 +9,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,7 +20,7 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx290_clk>;
clock-names = "xclk";
clock-frequency = <37125000>;
@@ -28,8 +28,8 @@
orientation = <2>;
vdda-supply = <&cam1_reg>; /* 2.8v */
vdddo-supply = <&cam_dummy_reg>; /* 1.8v */
vddd-supply = <&cam_dummy_reg>; /* 1.5v */
vdddo-supply = <&imx290_vdddo>; /* 1.8v */
vddd-supply = <&imx290_vddd>; /* 1.5v */
port {
imx290_0: endpoint {
@@ -41,11 +41,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -62,11 +61,27 @@
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
cam_clk: __overlay__ {
status = "okay";
clock-frequency = <37125000>;
fragment@3 {
target-path="/";
__overlay__ {
imx290_vdddo: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx290_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx290_vddd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx290_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
};
imx290_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <37125000>;
};
};
};
@@ -77,6 +92,16 @@
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx290_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&imx290_0>;
__overlay__ {
@@ -109,17 +134,19 @@
};
};
fragment@10 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
4lane = <0>, "-6+7-8+9";
clock-frequency = <&cam_clk>,"clock-frequency:0",
clock-frequency = <&imx290_clk>,"clock-frequency:0",
<&imx290>,"clock-frequency:0";
rotation = <&imx290>,"rotation:0";
orientation = <&imx290>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx290>, "clocks:0=",<&cam0_clk>,
<&imx290>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=10";
};
};

View File

@@ -4,36 +4,7 @@
/{
compatible = "brcm,bcm2835";
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
cam_clk: __overlay__ {
clock-frequency = <24000000>;
status = "okay";
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
reg_frag: fragment@5 {
target = <&cam1_reg>;
cam_reg: __overlay__ {
startup-delay-us = <300000>;
};
};
i2c_frag: fragment@100 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -44,19 +15,19 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx477_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.05v */
VDDL-supply = <&cam_dummy_reg>; /* 1.8v */
VDIG-supply = <&imx477_vdig>; /* 1.05v */
VDDL-supply = <&imx477_vddl>; /* 1.8v */
rotation = <180>;
orientation = <2>;
port {
imx477_0: endpoint {
remote-endpoint = <&csi_ep>;
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
data-lanes = <1 2>;
clock-noncontinuous;
@@ -68,14 +39,13 @@
};
};
csi_frag: fragment@101 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi_ep: endpoint {
csi1_ep: endpoint {
remote-endpoint = <&imx477_0>;
clock-lanes = <0>;
data-lanes = <1 2>;
@@ -85,15 +55,64 @@
};
};
fragment@2 {
target = <&i2c0if>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target-path="/";
__overlay__ {
imx477_vdig: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "imx477_vdig";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
imx477_vddl: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx477_vddl";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx477_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx477_vana";
startup-delay-us = <300000>;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx477>,"rotation:0";
orientation = <&imx477>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&reg_frag>, "target:0=",<&cam0_reg>,
<&imx477>, "clocks:0=",<&cam0_clk>,
<&imx477>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,12 +20,12 @@
reg = <0x1a>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&imx519_clk>;
clock-names = "xclk";
VANA-supply = <&cam1_reg>; /* 2.8v */
VDIG-supply = <&cam_dummy_reg>; /* 1.8v */
VDDL-supply = <&cam_dummy_reg>; /* 1.2v */
VDIG-supply = <&imx519_vdig>; /* 1.8v */
VDDL-supply = <&imx519_vddl>; /* 1.2v */
rotation = <0>;
orientation = <2>;
@@ -44,11 +44,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port{
csi1_ep: endpoint{
@@ -68,11 +67,27 @@
};
};
clk_frag: fragment@3 {
target = <&cam1_clk>;
fragment@3 {
target-path="/";
__overlay__ {
clock-frequency = <24000000>;
status = "okay";
imx519_vdig: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "imx519_vdig";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
imx519_vddl: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "imx519_vddl";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
imx519_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
@@ -83,14 +98,26 @@
};
};
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
regulator-name = "imx519_vana";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&imx519>,"rotation:0";
orientation = <&imx519>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&imx519>, "clocks:0=",<&cam0_clk>,
<&imx519>, "VANA-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -6,20 +6,20 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
irs1125: irs1125@3d {
irs1125: irs1125@3D {
compatible = "infineon,irs1125";
reg = <0x3d>;
reg = <0x3D>;
status = "okay";
pwdn-gpios = <&gpio 5 0>;
clocks = <&cam1_clk>;
clocks = <&irs1125_clk>;
port {
irs1125_0: endpoint {
@@ -35,9 +35,9 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
@@ -72,19 +72,25 @@
};
};
clk_frag: fragment@5 {
target = <&cam1_clk>;
fragment@5 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <26000000>;
irs1125_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
};
};
fragment@6 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&irs1125>, "clocks:0=",<&cam0_clk>;
media-controller = <0>,"=6";
};
};

View File

@@ -6,7 +6,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -18,11 +18,8 @@
reg = <0x36>;
status = "okay";
clocks = <&cam1_clk>;
avdd-supply = <&cam1_reg>;
dovdd-supply = <&cam_dummy_reg>;
dvdd-supply = <&cam_dummy_reg>;
pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
clocks = <&ov5647_clk>;
rotation = <0>;
orientation = <2>;
@@ -41,11 +38,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -70,30 +66,37 @@
};
};
reg_frag: fragment@4 {
target = <&cam1_reg>;
fragment@4 {
target-path="/__overrides__";
__overlay__ {
startup-delay-us = <20000>;
cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
cam0-led = <&ov5647>,"pwdn-gpios:16";
};
};
clk_frag: fragment@5 {
target = <&cam1_clk>;
fragment@5 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <25000000>;
ov5647_clk: camera-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov5647>,"rotation:0";
orientation = <&ov5647>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&reg_frag>, "target:0=",<&cam0_reg>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov5647>, "clocks:0=",<&cam0_clk>,
<&ov5647>, "avdd-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,13 +20,13 @@
reg = <0x60>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&ov7251_clk>;
clock-names = "xclk";
clock-frequency = <24000000>;
vdddo-supply = <&cam_dummy_reg>;
vdddo-supply = <&ov7251_dovdd>;
vdda-supply = <&cam1_reg>;
vddd-supply = <&cam_dummy_reg>;
vddd-supply = <&ov7251_dvdd>;
rotation = <0>;
orientation = <2>;
@@ -45,9 +45,9 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
@@ -67,28 +67,55 @@
};
fragment@3 {
target-path="/";
__overlay__ {
ov7251_dovdd: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "ov7251_dovdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ov7251_dvdd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "ov7251_dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ov7251_clk: ov7251-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@4 {
target = <&cam1_clk>;
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
regulator-name = "ov7251_avdd";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov7251>,"rotation:0";
orientation = <&ov7251>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov7251>, "clocks:0=",<&cam0_clk>,
<&ov7251>, "vdda-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -8,7 +8,7 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
@@ -20,12 +20,12 @@
reg = <0x60>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&ov9281_clk>;
clock-names = "xvclk";
avdd-supply = <&cam1_reg>;
dovdd-supply = <&cam_dummy_reg>;
dvdd-supply = <&cam_dummy_reg>;
dovdd-supply = <&ov9281_dovdd>;
dvdd-supply = <&ov9281_dvdd>;
rotation = <0>;
orientation = <2>;
@@ -44,11 +44,10 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
brcm,media-controller;
port {
csi1_ep: endpoint {
@@ -68,28 +67,55 @@
};
fragment@3 {
target-path="/";
__overlay__ {
ov9281_dovdd: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "ov9281_dovdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ov9281_dvdd: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "ov9281_dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ov9281_clk: ov9281-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
};
fragment@4 {
target = <&i2c0mux>;
__overlay__ {
status = "okay";
};
};
clk_frag: fragment@4 {
target = <&cam1_clk>;
fragment@5 {
target = <&cam1_reg>;
__overlay__ {
status = "okay";
clock-frequency = <24000000>;
regulator-name = "ov9281_avdd";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
fragment@6 {
target = <&csi1>;
__overlay__ {
brcm,media-controller;
};
};
__overrides__ {
rotation = <&ov9281>,"rotation:0";
orientation = <&ov9281>,"orientation:0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&ov9281>, "clocks:0=",<&cam0_clk>,
<&ov9281>, "avdd-supply:0=",<&cam0_reg>;
media-controller = <0>,"=6";
};
};

View File

@@ -5,10 +5,6 @@
deprecated = "use i2c-sensor,bmp085";
};
cutiepi-panel {
bcm2711;
};
highperi {
bcm2711;
};

View File

@@ -6,23 +6,23 @@
/{
compatible = "brcm,bcm2835";
i2c_frag: fragment@0 {
fragment@0 {
target = <&i2c_csi_dsi>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
tc358743: tc358743@f {
tc358743@0f {
compatible = "toshiba,tc358743";
reg = <0x0f>;
status = "okay";
clocks = <&cam1_clk>;
clocks = <&tc358743_clk>;
clock-names = "refclk";
port {
tc358743_0: endpoint {
tc358743: endpoint {
remote-endpoint = <&csi1_ep>;
clock-lanes = <0>;
clock-noncontinuous;
@@ -34,28 +34,28 @@
};
};
csi_frag: fragment@1 {
fragment@1 {
target = <&csi1>;
csi: __overlay__ {
__overlay__ {
status = "okay";
port {
csi1_ep: endpoint {
remote-endpoint = <&tc358743_0>;
remote-endpoint = <&tc358743>;
};
};
};
};
fragment@2 {
target = <&tc358743_0>;
target = <&tc358743>;
__overlay__ {
data-lanes = <1 2>;
};
};
fragment@3 {
target = <&tc358743_0>;
target = <&tc358743>;
__dormant__ {
data-lanes = <1 2 3 4>;
};
@@ -75,11 +75,14 @@
};
};
clk_frag: fragment@6 {
target = <&cam1_clk>;
fragment@6 {
target-path = "/";
__overlay__ {
status = "okay";
clock-frequency = <27000000>;
tc358743_clk: bridge-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
};
@@ -97,13 +100,16 @@
};
};
fragment@9 {
target = <&csi1>;
__dormant__ {
brcm,media-controller;
};
};
__overrides__ {
4lane = <0>, "-2+3-7+8";
link-frequency = <&tc358743_0>,"link-frequencies#0";
media-controller = <&csi>,"brcm,media-controller?";
cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
<&csi_frag>, "target:0=",<&csi0>,
<&clk_frag>, "target:0=",<&cam0_clk>,
<&tc358743>, "clocks:0=",<&cam0_clk>;
link-frequency = <&tc358743>,"link-frequencies#0";
media-controller = <0>,"=9";
};
};

View File

@@ -63,23 +63,6 @@
};
};
fragment@2 {
target = <&panel>;
__dormant__ {
backlight = <&backlight>;
};
};
fragment@3 {
target-path = "/";
__dormant__ {
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 255 GPIO_ACTIVE_HIGH>;
};
};
};
__overrides__ {
clock-frequency = <&timing>, "clock-frequency:0";
hactive = <&timing>, "hactive:0";
@@ -105,7 +88,5 @@
rgb888 = <&panel>, "bus-format:0=0x100a",
<&dpi_node>, "pinctrl-0:0=",<&dpi_gpio0>;
bus-format = <&panel>, "bus-format:0";
backlight-gpio = <0>, "+2+3",
<&backlight>, "gpios:4";
};
};

View File

@@ -1,18 +0,0 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
/ {
compatible = "brcm,bcm2711";
fragment@0 {
target-path = "pcie0/pci@0,0";
__overlay__ {
usb@0,0 {
reg = <0 0 0 0 0>;
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
};
};
};
};

View File

@@ -12,7 +12,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00aa";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -119,7 +119,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
compatible = "n25q256a";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -124,7 +124,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;

View File

@@ -169,7 +169,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -80,7 +80,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
compatible = "n25q256a";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -116,7 +116,7 @@
flash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q512a", "jedec,spi-nor";
compatible = "n25q512a";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@@ -224,7 +224,7 @@
n25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128", "jedec,spi-nor";
compatible = "n25q128";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
@@ -241,7 +241,7 @@
n25q00@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
compatible = "n25q00";
reg = <1>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;

View File

@@ -154,6 +154,10 @@
cap-sd-highspeed;
cap-mmc-highspeed;
/* All direction control is used */
st,sig-dir-cmd;
st,sig-dir-dat0;
st,sig-dir-dat2;
st,sig-dir-dat31;
st,sig-pin-fbclk;
full-pwr-cycle;
vmmc-supply = <&ab8500_ldo_aux3_reg>;

View File

@@ -192,7 +192,7 @@
display: display@1{
/* Connect panel-ilitek-9341 to ltdc */
compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
compatible = "st,sf-tc240t-9370-t";
reg = <1>;
spi-3wire;
spi-max-frequency = <10000000>;

View File

@@ -1257,7 +1257,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -953,7 +953,6 @@ CONFIG_DRM=m
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_UDL=m
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_DISPLAY_CONNECTOR=m
@@ -975,7 +974,6 @@ CONFIG_FB_UDL=m
CONFIG_FB_SIMPLE=y
CONFIG_FB_SSD1307=m
CONFIG_FB_RPISENSE=m
CONFIG_BACKLIGHT_PWM=m
CONFIG_BACKLIGHT_RPI=m
CONFIG_BACKLIGHT_GPIO=m
CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -1279,7 +1277,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -1250,7 +1250,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_INPUT=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_ACTPWR=y
CONFIG_ACCESSIBILITY=y
CONFIG_SPEAKUP=m

View File

@@ -11,6 +11,13 @@
#define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR
#define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n)
#define IMX21_UART1_BASE_ADDR 0x1000a000
#define IMX21_UART2_BASE_ADDR 0x1000b000
#define IMX21_UART3_BASE_ADDR 0x1000c000
#define IMX21_UART4_BASE_ADDR 0x1000d000
#define IMX21_UART_BASE_ADDR(n) IMX21_UART##n##_BASE_ADDR
#define IMX21_UART_BASE(n) IMX21_UART_BASE_ADDR(n)
#define IMX25_UART1_BASE_ADDR 0x43f90000
#define IMX25_UART2_BASE_ADDR 0x43f94000
#define IMX25_UART3_BASE_ADDR 0x5000c000
@@ -19,13 +26,6 @@
#define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR
#define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n)
#define IMX27_UART1_BASE_ADDR 0x1000a000
#define IMX27_UART2_BASE_ADDR 0x1000b000
#define IMX27_UART3_BASE_ADDR 0x1000c000
#define IMX27_UART4_BASE_ADDR 0x1000d000
#define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR
#define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n)
#define IMX31_UART1_BASE_ADDR 0x43f90000
#define IMX31_UART2_BASE_ADDR 0x43f94000
#define IMX31_UART3_BASE_ADDR 0x5000c000
@@ -112,10 +112,10 @@
#ifdef CONFIG_DEBUG_IMX1_UART
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX1)
#elif defined(CONFIG_DEBUG_IMX21_IMX27_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX21)
#elif defined(CONFIG_DEBUG_IMX25_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX25)
#elif defined(CONFIG_DEBUG_IMX27_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX27)
#elif defined(CONFIG_DEBUG_IMX31_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX31)
#elif defined(CONFIG_DEBUG_IMX35_UART)

View File

@@ -596,9 +596,11 @@ call_fpe:
tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2
reteq lr
and r8, r0, #0x00000f00 @ mask out CP number
THUMB( lsr r8, r8, #8 )
mov r7, #1
add r6, r10, r8, lsr #8 @ add used_cp[] array offset first
strb r7, [r6, #TI_USED_CP] @ set appropriate used_cp[]
add r6, r10, #TI_USED_CP
ARM( strb r7, [r6, r8, lsr #8] ) @ set appropriate used_cp[]
THUMB( strb r7, [r6, r8] ) @ set appropriate used_cp[]
#ifdef CONFIG_IWMMXT
@ Test if we need to give access to iWMMXt coprocessors
ldr r5, [r10, #TI_FLAGS]
@@ -607,7 +609,7 @@ call_fpe:
bcs iwmmxt_task_enable
#endif
ARM( add pc, pc, r8, lsr #6 )
THUMB( lsr r8, r8, #6 )
THUMB( lsl r8, r8, #2 )
THUMB( add pc, r8 )
nop

View File

@@ -62,10 +62,9 @@ user_backtrace(struct frame_tail __user *tail,
void
perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
struct frame_tail __user *tail;
if (guest_cbs && guest_cbs->is_in_guest()) {
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
/* We don't support guest os callchain now */
return;
}
@@ -99,10 +98,9 @@ callchain_trace(struct stackframe *fr,
void
perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
struct stackframe fr;
if (guest_cbs && guest_cbs->is_in_guest()) {
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
/* We don't support guest os callchain now */
return;
}
@@ -113,21 +111,18 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *re
unsigned long perf_instruction_pointer(struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
if (guest_cbs && guest_cbs->is_in_guest())
return guest_cbs->get_guest_ip();
if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
return perf_guest_cbs->get_guest_ip();
return instruction_pointer(regs);
}
unsigned long perf_misc_flags(struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
int misc = 0;
if (guest_cbs && guest_cbs->is_in_guest()) {
if (guest_cbs->is_user_mode())
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
if (perf_guest_cbs->is_user_mode())
misc |= PERF_RECORD_MISC_GUEST_USER;
else
misc |= PERF_RECORD_MISC_GUEST_KERNEL;

View File

@@ -27,8 +27,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "arm-mem.h"
#include "memcpymove.h"

View File

@@ -280,7 +280,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
199:
pop {DAT3, DAT4, DAT5, DAT6, DAT7}
pop {D, DAT1, DAT2, pc}
UNWIND( .fnend )
.endm
.macro memcpy_medium_inner_loop backwards, align
@@ -359,13 +358,19 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
LAST .req ip
OFF .req lr
UNWIND( .fnstart )
.cfi_startproc
push {D, DAT1, DAT2, lr}
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_undefined S
.cfi_undefined N
.cfi_undefined DAT0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_undefined LAST
.cfi_rel_offset lr, 12
.if backwards
add D, D, N
@@ -381,11 +386,17 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
/* Long case */
push {DAT3, DAT4, DAT5, DAT6, DAT7}
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
UNWIND( .save {DAT3, DAT4, DAT5, DAT6, DAT7} )
.cfi_def_cfa_offset 36
.cfi_rel_offset D, 20
.cfi_rel_offset DAT1, 24
.cfi_rel_offset DAT2, 28
.cfi_rel_offset DAT3, 0
.cfi_rel_offset DAT4, 4
.cfi_rel_offset DAT5, 8
.cfi_rel_offset DAT6, 12
.cfi_rel_offset DAT7, 16
.cfi_rel_offset lr, 32
/* Adjust N so that the decrement instruction can also test for
* inner loop termination. We want it to stop when there are
@@ -425,10 +436,16 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
156: memcpy_long_inner_loop backwards, 2
157: memcpy_long_inner_loop backwards, 3
UNWIND( .fnend )
UNWIND( .fnstart )
UNWIND( .save {D, DAT1, DAT2, lr} )
.cfi_def_cfa_offset 16
.cfi_rel_offset D, 0
.cfi_rel_offset DAT1, 4
.cfi_rel_offset DAT2, 8
.cfi_same_value DAT3
.cfi_same_value DAT4
.cfi_same_value DAT5
.cfi_same_value DAT6
.cfi_same_value DAT7
.cfi_rel_offset lr, 12
160: /* Medium case */
preload_all backwards, 0, 0, S, N, DAT2, OFF
@@ -471,7 +488,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
memcpy_short_inner_loop backwards, 0
140: memcpy_short_inner_loop backwards, 1
UNWIND( .fnend )
.cfi_endproc
.unreq D
.unreq S

View File

@@ -27,8 +27,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "arm-mem.h"
#include "memcpymove.h"

View File

@@ -52,6 +52,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
ENTRY(mmioset)
ENTRY(memset)
ENTRY(__memset32)
ENTRY(__memset64)
S .req a1
DAT0 .req a2
@@ -61,13 +63,9 @@ ENTRY(memset)
DAT3 .req lr
orr DAT0, DAT0, DAT0, lsl #8
orr DAT0, DAT0, DAT0, lsl #16
ENTRY(__memset32)
mov DAT1, DAT0
ENTRY(__memset64)
push {S, lr}
orr DAT0, DAT0, DAT0, lsl #16
mov DAT1, DAT0
/* See if we're guaranteed to have at least one 16-byte aligned 16-byte write */
cmp N, #31
@@ -90,7 +88,7 @@ ENTRY(__memset64)
stmcsia S!, {DAT0, DAT1}
164: /* Delayed set up of DAT2 and DAT3 so we could use them as scratch registers above */
mov DAT2, DAT0
mov DAT3, DAT1
mov DAT3, DAT0
/* Now the inner loop of 16-byte stores */
165: stmia S!, {DAT0, DAT1, DAT2, DAT3}
subs N, N, #16
@@ -106,7 +104,7 @@ ENTRY(__memset64)
170: /* Short case */
mov DAT2, DAT0
mov DAT3, DAT1
mov DAT3, DAT0
tst S, #3
beq 174f
172: subs N, N, #1

View File

@@ -263,9 +263,9 @@ static int __init omapdss_init_of(void)
}
r = of_platform_populate(node, NULL, NULL, &pdev->dev);
put_device(&pdev->dev);
if (r) {
pr_err("Unable to populate DSS submodule devices\n");
put_device(&pdev->dev);
return r;
}

View File

@@ -749,10 +749,8 @@ static int __init _init_clkctrl_providers(void)
for_each_matching_node(np, ti_clkctrl_match_table) {
ret = _setup_clkctrl_provider(np);
if (ret) {
of_node_put(np);
if (ret)
break;
}
}
return ret;

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